Merge pull request #1066 from larsclausen/vvp-concat-performance
vvp: Improve concat performance
This commit is contained in:
commit
6d1a9181bb
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@ -25,6 +25,7 @@ assign array6[2:1] = 8'h32;
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reg failed = 0;
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reg failed = 0;
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initial begin
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initial begin
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#0
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$display("%h", array1);
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$display("%h", array1);
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if (array1 !== 16'h4321) failed = 1;
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if (array1 !== 16'h4321) failed = 1;
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$display("%h", array2);
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$display("%h", array2);
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@ -33,6 +33,7 @@ mod_test dut(test_string[1:8]);
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mod_test2 dut2(test_string[9:16]);
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mod_test2 dut2(test_string[9:16]);
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initial begin
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initial begin
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#0
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if(test_string !== "testTESTabcdefgh") begin
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if(test_string !== "testTESTabcdefgh") begin
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$display("FAILED");
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$display("FAILED");
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$finish();
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$finish();
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@ -8,29 +8,11 @@ assign dataout = datain >>> 2;
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reg test_failed;
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reg test_failed;
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initial
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begin
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test_failed = 0;
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#1 datain = 14'h0FFF;
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#1 datain = 14'h0000;
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#1 datain = 14'h1FFF;
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#1 datain = 14'h1000;
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#1 datain = 14'h2FFF;
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#1 datain = 14'h2000;
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#1 datain = 14'h3FFF;
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#1 datain = 14'h3000;
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#2;
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if (test_failed)
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$display("TEST FAILED :-(");
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else
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$display("TEST PASSED :-)");
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end
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wire signed [15:0] expected_dataout;
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wire signed [15:0] expected_dataout;
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assign expected_dataout = ($signed({datain[13:2], 2'b0}) / 4) ;
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assign expected_dataout = ($signed({datain[13:2], 2'b0}) / 4) ;
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always @(dataout)
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task check_data;
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if (expected_dataout != dataout)
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if (expected_dataout != dataout)
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begin
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begin
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$display("datain = %d dataout = %h expected = %h ... CHECK FAILED", datain, dataout, expected_dataout);
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$display("datain = %d dataout = %h expected = %h ... CHECK FAILED", datain, dataout, expected_dataout);
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@ -38,5 +20,32 @@ always @(dataout)
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end
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end
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else
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else
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$display("datain = %d dataout = %d expected = %d ... CHECK PASSED", datain, dataout, expected_dataout);
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$display("datain = %d dataout = %d expected = %d ... CHECK PASSED", datain, dataout, expected_dataout);
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endtask
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initial
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begin
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test_failed = 0;
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#1 datain = 14'h0FFF;
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#0 check_data; // #0 delay to allow the wire to resolve
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#1 datain = 14'h0000;
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#0 check_data;
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#1 datain = 14'h1FFF;
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#0 check_data;
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#1 datain = 14'h1000;
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#0 check_data;
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#1 datain = 14'h2FFF;
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#0 check_data;
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#1 datain = 14'h2000;
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#0 check_data;
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#1 datain = 14'h3FFF;
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#0 check_data;
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#1 datain = 14'h3000;
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#0 check_data;
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#2;
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if (test_failed)
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$display("TEST FAILED :-(");
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else
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$display("TEST PASSED :-)");
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end
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endmodule // top
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endmodule // top
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101
vvp/concat.cc
101
vvp/concat.cc
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@ -18,7 +18,7 @@
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*/
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*/
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# include "compile.h"
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# include "compile.h"
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# include "vvp_net.h"
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# include "concat.h"
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# include <cstdlib>
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# include <cstdlib>
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# include <iostream>
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# include <iostream>
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# include <cassert>
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# include <cassert>
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@ -27,15 +27,12 @@ using namespace std;
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vvp_fun_concat::vvp_fun_concat(unsigned w0, unsigned w1,
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vvp_fun_concat::vvp_fun_concat(unsigned w0, unsigned w1,
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unsigned w2, unsigned w3)
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unsigned w2, unsigned w3)
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: val_(w0+w1+w2+w3)
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: val_(w0+w1+w2+w3, BIT4_Z)
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{
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{
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wid_[0] = w0;
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wid_[0] = w0;
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wid_[1] = w1;
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wid_[1] = w1;
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wid_[2] = w2;
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wid_[2] = w2;
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wid_[3] = w3;
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wid_[3] = w3;
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for (unsigned idx = 0 ; idx < val_.size() ; idx += 1)
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val_.set_bit(idx, BIT4_Z);
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}
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}
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vvp_fun_concat::~vvp_fun_concat()
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vvp_fun_concat::~vvp_fun_concat()
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@ -43,33 +40,15 @@ vvp_fun_concat::~vvp_fun_concat()
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}
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}
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void vvp_fun_concat::recv_vec4(vvp_net_ptr_t port, const vvp_vector4_t&bit,
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void vvp_fun_concat::recv_vec4(vvp_net_ptr_t port, const vvp_vector4_t&bit,
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vvp_context_t)
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vvp_context_t context)
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{
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{
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unsigned pdx = port.port();
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recv_vec4_pv(port, bit, 0, bit.size(), context);
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if (bit.size() != wid_[pdx]) {
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cerr << "internal error: port " << pdx
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<< " expects wid=" << wid_[pdx]
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<< ", got wid=" << bit.size() << endl;
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assert(0);
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}
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unsigned off = 0;
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for (unsigned idx = 0 ; idx < pdx ; idx += 1)
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off += wid_[idx];
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for (unsigned idx = 0 ; idx < wid_[pdx] ; idx += 1) {
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val_.set_bit(off+idx, bit.value(idx));
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}
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port.ptr()->send_vec4(val_, 0);
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}
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}
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void vvp_fun_concat::recv_vec4_pv(vvp_net_ptr_t port, const vvp_vector4_t&bit,
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void vvp_fun_concat::recv_vec4_pv(vvp_net_ptr_t port, const vvp_vector4_t&bit,
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unsigned base, unsigned vwid, vvp_context_t)
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unsigned base, unsigned vwid, vvp_context_t)
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{
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{
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unsigned pdx = port.port();
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unsigned pdx = port.port();
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unsigned wid = bit.size();
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if (vwid != wid_[pdx]) {
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if (vwid != wid_[pdx]) {
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cerr << "internal error: port " << pdx
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cerr << "internal error: port " << pdx
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@ -78,19 +57,25 @@ void vvp_fun_concat::recv_vec4_pv(vvp_net_ptr_t port, const vvp_vector4_t&bit,
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assert(0);
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assert(0);
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}
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}
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unsigned off = 0;
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unsigned off = base;
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for (unsigned idx = 0 ; idx < pdx ; idx += 1)
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for (unsigned idx = 0 ; idx < pdx ; idx += 1)
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off += wid_[idx];
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off += wid_[idx];
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unsigned limit = off + wid_[pdx];
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if (!val_.set_vec(off, bit))
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return;
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off += base;
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if (net_)
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for (unsigned idx = 0 ; idx < wid ; idx += 1) {
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return;
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if (off+idx >= limit) break;
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val_.set_bit(off+idx, bit.value(idx));
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}
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port.ptr()->send_vec4(val_, 0);
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net_ = port.ptr();
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schedule_functor(this);
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}
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void vvp_fun_concat::run_run()
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{
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vvp_net_t *ptr = net_;
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net_ = nullptr;
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ptr->send_vec4(val_, 0);
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}
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}
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void compile_concat(char*label, unsigned w0, unsigned w1,
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void compile_concat(char*label, unsigned w0, unsigned w1,
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@ -118,9 +103,6 @@ vvp_fun_concat8::vvp_fun_concat8(unsigned w0, unsigned w1,
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wid_[1] = w1;
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wid_[1] = w1;
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wid_[2] = w2;
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wid_[2] = w2;
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wid_[3] = w3;
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wid_[3] = w3;
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for (unsigned idx = 0 ; idx < val_.size() ; idx += 1)
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val_.set_bit(idx, vvp_scalar_t(BIT4_Z, 0, 0));
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}
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}
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vvp_fun_concat8::~vvp_fun_concat8()
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vvp_fun_concat8::~vvp_fun_concat8()
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@ -131,7 +113,7 @@ void vvp_fun_concat8::recv_vec4(vvp_net_ptr_t port, const vvp_vector4_t&bit,
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vvp_context_t)
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vvp_context_t)
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{
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{
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vvp_vector8_t bit8 (bit, 6, 6);
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vvp_vector8_t bit8 (bit, 6, 6);
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recv_vec8(port, bit8);
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recv_vec8_pv(port, bit8, 0, bit8.size());
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}
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}
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void vvp_fun_concat8::recv_vec4_pv(vvp_net_ptr_t port, const vvp_vector4_t&bit,
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void vvp_fun_concat8::recv_vec4_pv(vvp_net_ptr_t port, const vvp_vector4_t&bit,
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@ -143,31 +125,13 @@ void vvp_fun_concat8::recv_vec4_pv(vvp_net_ptr_t port, const vvp_vector4_t&bit,
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void vvp_fun_concat8::recv_vec8(vvp_net_ptr_t port, const vvp_vector8_t&bit)
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void vvp_fun_concat8::recv_vec8(vvp_net_ptr_t port, const vvp_vector8_t&bit)
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{
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{
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unsigned pdx = port.port();
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recv_vec8_pv(port, bit, 0, bit.size());
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if (bit.size() != wid_[pdx]) {
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cerr << "internal error: port " << pdx
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<< " expects wid=" << wid_[pdx]
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<< ", got wid=" << bit.size() << endl;
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assert(0);
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}
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unsigned off = 0;
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for (unsigned idx = 0 ; idx < pdx ; idx += 1)
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off += wid_[idx];
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for (unsigned idx = 0 ; idx < wid_[pdx] ; idx += 1) {
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val_.set_bit(off+idx, bit.value(idx));
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}
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port.ptr()->send_vec8(val_);
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}
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}
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void vvp_fun_concat8::recv_vec8_pv(vvp_net_ptr_t port, const vvp_vector8_t&bit,
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void vvp_fun_concat8::recv_vec8_pv(vvp_net_ptr_t port, const vvp_vector8_t&bit,
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unsigned base, unsigned vwid)
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unsigned base, unsigned vwid)
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{
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{
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unsigned pdx = port.port();
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unsigned pdx = port.port();
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unsigned wid = bit.size();
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if (vwid != wid_[pdx]) {
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if (vwid != wid_[pdx]) {
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cerr << "internal error: port " << pdx
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cerr << "internal error: port " << pdx
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@ -176,19 +140,24 @@ void vvp_fun_concat8::recv_vec8_pv(vvp_net_ptr_t port, const vvp_vector8_t&bit,
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assert(0);
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assert(0);
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}
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}
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unsigned off = 0;
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unsigned off = base;
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for (unsigned idx = 0 ; idx < pdx ; idx += 1)
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for (unsigned idx = 0 ; idx < pdx ; idx += 1)
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off += wid_[idx];
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off += wid_[idx];
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unsigned limit = off + wid_[pdx];
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val_.set_vec(off, bit);
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off += base;
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if (net_)
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for (unsigned idx = 0 ; idx < wid ; idx += 1) {
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return;
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if (off+idx >= limit) break;
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val_.set_bit(off+idx, bit.value(idx));
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}
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port.ptr()->send_vec8(val_);
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net_ = port.ptr();
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schedule_functor(this);
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}
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void vvp_fun_concat8::run_run()
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{
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vvp_net_t *ptr = net_;
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net_ = nullptr;
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ptr->send_vec8(val_);
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}
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}
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void compile_concat8(char*label, unsigned w0, unsigned w1,
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void compile_concat8(char*label, unsigned w0, unsigned w1,
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@ -226,9 +195,7 @@ void vvp_fun_repeat::recv_vec4(vvp_net_ptr_t port, const vvp_vector4_t&bit,
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for (unsigned rdx = 0 ; rdx < rep_ ; rdx += 1) {
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for (unsigned rdx = 0 ; rdx < rep_ ; rdx += 1) {
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unsigned off = rdx * bit.size();
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unsigned off = rdx * bit.size();
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for (unsigned idx = 0 ; idx < bit.size() ; idx += 1)
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val.set_vec(off, bit);
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val.set_bit(off+idx, bit.value(idx));
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}
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}
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port.ptr()->send_vec4(val, 0);
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port.ptr()->send_vec4(val, 0);
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@ -0,0 +1,102 @@
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#ifndef IVL_concat_H
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#define IVL_concat_H
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/*
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* Copyright (c) 2004-2024 Stephen Williams (steve@icarus.com)
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
|
||||||
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* General Public License as published by the Free Software
|
||||||
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* Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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# include "vvp_net.h"
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/* vvp_fun_concat
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* This node function creates vectors (vvp_vector4_t) from the
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* concatenation of the inputs. The inputs (4) may be vector or
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* vector8 objects, but they are reduced to vector4 values and
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* strength information lost.
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*
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* The expected widths of the input vectors must be given up front so
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* that the positions in the output vector (and also the size of the
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* output vector) can be worked out. The input vectors must match the
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* expected width.
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*/
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class vvp_fun_concat : public vvp_net_fun_t, protected vvp_gen_event_s {
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public:
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vvp_fun_concat(unsigned w0, unsigned w1,
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unsigned w2, unsigned w3);
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~vvp_fun_concat();
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void recv_vec4(vvp_net_ptr_t port, const vvp_vector4_t&bit,
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vvp_context_t context) final;
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void recv_vec4_pv(vvp_net_ptr_t port, const vvp_vector4_t&bit,
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unsigned base, unsigned vwid, vvp_context_t) final;
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private:
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void run_run() final;
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unsigned wid_[4];
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vvp_vector4_t val_;
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vvp_net_t *net_ = nullptr;
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};
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class vvp_fun_concat8 : public vvp_net_fun_t, protected vvp_gen_event_s {
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public:
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vvp_fun_concat8(unsigned w0, unsigned w1,
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unsigned w2, unsigned w3);
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~vvp_fun_concat8();
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void recv_vec4(vvp_net_ptr_t port, const vvp_vector4_t&bit,
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vvp_context_t context) final;
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void recv_vec8(vvp_net_ptr_t port, const vvp_vector8_t&bit) final;
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||||||
|
void recv_vec4_pv(vvp_net_ptr_t port, const vvp_vector4_t&bit,
|
||||||
|
unsigned base, unsigned vwid, vvp_context_t) final;
|
||||||
|
void recv_vec8_pv(vvp_net_ptr_t p, const vvp_vector8_t&bit,
|
||||||
|
unsigned base, unsigned vwid) final;
|
||||||
|
|
||||||
|
private:
|
||||||
|
void run_run() final;
|
||||||
|
|
||||||
|
unsigned wid_[4];
|
||||||
|
vvp_vector8_t val_;
|
||||||
|
vvp_net_t *net_ = nullptr;
|
||||||
|
};
|
||||||
|
|
||||||
|
/* vvp_fun_repeat
|
||||||
|
* This node function create vectors by repeating the input. The width
|
||||||
|
* is the width of the output vector, and the repeat is the number of
|
||||||
|
* times to repeat the input. The width of the input vector is
|
||||||
|
* implicit from these values.
|
||||||
|
*/
|
||||||
|
class vvp_fun_repeat : public vvp_net_fun_t {
|
||||||
|
|
||||||
|
public:
|
||||||
|
vvp_fun_repeat(unsigned width, unsigned repeat);
|
||||||
|
~vvp_fun_repeat();
|
||||||
|
|
||||||
|
void recv_vec4(vvp_net_ptr_t port, const vvp_vector4_t&bit,
|
||||||
|
vvp_context_t context);
|
||||||
|
void recv_vec4_pv(vvp_net_ptr_t port, const vvp_vector4_t&bit,
|
||||||
|
unsigned int base, unsigned int vwid,
|
||||||
|
vvp_context_t context) final;
|
||||||
|
|
||||||
|
private:
|
||||||
|
unsigned wid_;
|
||||||
|
unsigned rep_;
|
||||||
|
};
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -23,6 +23,7 @@
|
||||||
# include "schedule.h"
|
# include "schedule.h"
|
||||||
# include "logic.h"
|
# include "logic.h"
|
||||||
# include "part.h"
|
# include "part.h"
|
||||||
|
# include "concat.h"
|
||||||
#ifdef CHECK_WITH_VALGRIND
|
#ifdef CHECK_WITH_VALGRIND
|
||||||
# include "vvp_cleanup.h"
|
# include "vvp_cleanup.h"
|
||||||
#endif
|
#endif
|
||||||
|
|
|
||||||
|
|
@ -52,7 +52,6 @@ class vvp_net_fun_t;
|
||||||
class vvp_net_fil_t;
|
class vvp_net_fil_t;
|
||||||
|
|
||||||
/* Core net function types. */
|
/* Core net function types. */
|
||||||
class vvp_fun_concat;
|
|
||||||
class vvp_fun_drive;
|
class vvp_fun_drive;
|
||||||
class vvp_fun_part;
|
class vvp_fun_part;
|
||||||
|
|
||||||
|
|
@ -1366,55 +1365,6 @@ class vvp_net_fil_t : public vvp_vpi_callback {
|
||||||
|
|
||||||
/* **** Some core net functions **** */
|
/* **** Some core net functions **** */
|
||||||
|
|
||||||
/* vvp_fun_concat
|
|
||||||
* This node function creates vectors (vvp_vector4_t) from the
|
|
||||||
* concatenation of the inputs. The inputs (4) may be vector or
|
|
||||||
* vector8 objects, but they are reduced to vector4 values and
|
|
||||||
* strength information lost.
|
|
||||||
*
|
|
||||||
* The expected widths of the input vectors must be given up front so
|
|
||||||
* that the positions in the output vector (and also the size of the
|
|
||||||
* output vector) can be worked out. The input vectors must match the
|
|
||||||
* expected width.
|
|
||||||
*/
|
|
||||||
class vvp_fun_concat : public vvp_net_fun_t {
|
|
||||||
|
|
||||||
public:
|
|
||||||
vvp_fun_concat(unsigned w0, unsigned w1,
|
|
||||||
unsigned w2, unsigned w3);
|
|
||||||
~vvp_fun_concat();
|
|
||||||
|
|
||||||
void recv_vec4(vvp_net_ptr_t port, const vvp_vector4_t&bit,
|
|
||||||
vvp_context_t context);
|
|
||||||
|
|
||||||
void recv_vec4_pv(vvp_net_ptr_t port, const vvp_vector4_t&bit,
|
|
||||||
unsigned base, unsigned vwid, vvp_context_t);
|
|
||||||
private:
|
|
||||||
unsigned wid_[4];
|
|
||||||
vvp_vector4_t val_;
|
|
||||||
};
|
|
||||||
|
|
||||||
class vvp_fun_concat8 : public vvp_net_fun_t {
|
|
||||||
|
|
||||||
public:
|
|
||||||
vvp_fun_concat8(unsigned w0, unsigned w1,
|
|
||||||
unsigned w2, unsigned w3);
|
|
||||||
~vvp_fun_concat8();
|
|
||||||
|
|
||||||
void recv_vec4(vvp_net_ptr_t port, const vvp_vector4_t&bit,
|
|
||||||
vvp_context_t context);
|
|
||||||
void recv_vec8(vvp_net_ptr_t port, const vvp_vector8_t&bit);
|
|
||||||
|
|
||||||
void recv_vec4_pv(vvp_net_ptr_t port, const vvp_vector4_t&bit,
|
|
||||||
unsigned base, unsigned vwid, vvp_context_t);
|
|
||||||
void recv_vec8_pv(vvp_net_ptr_t p, const vvp_vector8_t&bit,
|
|
||||||
unsigned base, unsigned vwid);
|
|
||||||
|
|
||||||
private:
|
|
||||||
unsigned wid_[4];
|
|
||||||
vvp_vector8_t val_;
|
|
||||||
};
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* The vvp_fun_force class objects are net functors that use their input
|
* The vvp_fun_force class objects are net functors that use their input
|
||||||
* to force the associated filter. They do not actually have an
|
* to force the associated filter. They do not actually have an
|
||||||
|
|
@ -1436,29 +1386,6 @@ class vvp_fun_force : public vvp_net_fun_t {
|
||||||
void recv_real(vvp_net_ptr_t port, double bit, vvp_context_t);
|
void recv_real(vvp_net_ptr_t port, double bit, vvp_context_t);
|
||||||
};
|
};
|
||||||
|
|
||||||
/* vvp_fun_repeat
|
|
||||||
* This node function create vectors by repeating the input. The width
|
|
||||||
* is the width of the output vector, and the repeat is the number of
|
|
||||||
* times to repeat the input. The width of the input vector is
|
|
||||||
* implicit from these values.
|
|
||||||
*/
|
|
||||||
class vvp_fun_repeat : public vvp_net_fun_t {
|
|
||||||
|
|
||||||
public:
|
|
||||||
vvp_fun_repeat(unsigned width, unsigned repeat);
|
|
||||||
~vvp_fun_repeat();
|
|
||||||
|
|
||||||
void recv_vec4(vvp_net_ptr_t port, const vvp_vector4_t&bit,
|
|
||||||
vvp_context_t context);
|
|
||||||
void recv_vec4_pv(vvp_net_ptr_t port, const vvp_vector4_t&bit,
|
|
||||||
unsigned int base, unsigned int vwid,
|
|
||||||
vvp_context_t context) final;
|
|
||||||
|
|
||||||
private:
|
|
||||||
unsigned wid_;
|
|
||||||
unsigned rep_;
|
|
||||||
};
|
|
||||||
|
|
||||||
/* vvp_fun_drive
|
/* vvp_fun_drive
|
||||||
* This node function takes an input vvp_vector4_t as input, and
|
* This node function takes an input vvp_vector4_t as input, and
|
||||||
* repeats that value as a vvp_vector8_t with all the bits given the
|
* repeats that value as a vvp_vector8_t with all the bits given the
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue