Initial support for NetCondit synth_async.
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synth2.cc
56
synth2.cc
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@ -24,7 +24,7 @@
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# include "netvector.h"
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# include "netmisc.h"
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# include "compiler.h"
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# include <cassert>
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# include "ivl_assert.h"
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bool NetProc::synth_async(Design*, NetScope*, const NetBus&, NetBus&)
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@ -237,69 +237,59 @@ bool NetCase::synth_async(Design*des, NetScope*scope,
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return true;
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}
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bool NetCondit::synth_async(Design*des, NetScope* /*scope*/,
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const NetBus& /*nex_map*/, NetBus& /*nex_out*/)
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bool NetCondit::synth_async(Design*des, NetScope*scope,
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const NetBus&nex_map, NetBus&nex_out)
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{
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cerr << get_fileline() << ": sorry: "
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<< "Forgot to implement NetCondit::synth_async" << endl;
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des->errors += 1;
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return false;
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#if 0
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NetNet*ssig = expr_->synthesize(des);
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assert(ssig);
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if (if_ == 0) {
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DEBUG_SYNTH2_EXIT("NetCondit",false)
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return false;
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}
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if (else_ == 0) {
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cerr << get_line() << ": error: Asynchronous if statement"
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cerr << get_fileline() << ": error: Asynchronous if statement"
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<< " is missing the else clause." << endl;
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DEBUG_SYNTH2_EXIT("NetCondit",false)
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return false;
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}
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assert(if_ != 0);
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assert(else_ != 0);
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NetNet*asig = new NetNet(scope, scope->local_symbol(),
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NetNet::WIRE, nex_map->pin_count());
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asig->local_flag(true);
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// Synthesize the condition. This will act as a select signal
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// for a binary mux.
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NetNet*ssig = expr_->synthesize(des, scope, expr_);
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assert(ssig);
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// Calculate the vector width of the result.
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unsigned mux_width = 0;
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for (unsigned idx = 0 ; idx < nex_out.pin_count() ; idx += 1)
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mux_width += nex_out.pin(idx).nexus()->vector_width();
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bool flag;
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NetBus asig(scope, 1);
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flag = if_->synth_async(des, scope, nex_map, asig);
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if (!flag) {
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delete asig;
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DEBUG_SYNTH2_EXIT("NetCondit",false)
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return false;
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}
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NetNet*bsig = new NetNet(scope, scope->local_symbol(),
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NetNet::WIRE, nex_map->pin_count());
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bsig->local_flag(true);
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NetBus bsig(scope, 1);
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flag = else_->synth_async(des, scope, nex_map, bsig);
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if (!flag) {
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delete asig;
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delete bsig;
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DEBUG_SYNTH2_EXIT("NetCondit",false)
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return false;
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}
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NetMux*mux = new NetMux(scope, scope->local_symbol(),
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nex_out->vector_width(), 2, 1);
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mux_width, 2, 1);
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connect(mux->pin_Sel(), ssig->pin(0));
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connect(mux->pin_Data(1), asig->pin(0));
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connect(mux->pin_Data(0), bsig->pin(0));
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connect(nex_out->pin(0), mux->pin_Result());
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connect(mux->pin_Data(1), asig.pin(0));
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connect(mux->pin_Data(0), bsig.pin(0));
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// For now, only support nex_out with 1 item.
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ivl_assert(*this, nex_out.pin_count()==1);
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connect(nex_out.pin(0), mux->pin_Result());
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des->add_node(mux);
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DEBUG_SYNTH2_EXIT("NetCondit",true)
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return true;
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#endif
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}
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bool NetEvWait::synth_async(Design*des, NetScope*scope,
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