Fix for br930 - support attributes on old-style port declarations.
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parent
10ec58703f
commit
6364aba975
83
parse.y
83
parse.y
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@ -4169,63 +4169,60 @@ module_item
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delete $4;
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delete $4;
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}
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}
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| port_direction unsigned_signed_opt range_opt delay3_opt list_of_identifiers ';'
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| attribute_list_opt port_direction unsigned_signed_opt range_opt delay3_opt list_of_identifiers ';'
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{ pform_set_port_type(@1, $5, $3, $2, $1);
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{ pform_set_port_type(@2, $6, $4, $3, $2, $1); }
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}
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/* The next two rules handle Verilog 2001 statements of the form:
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/* The next two rules handle Verilog 2001 statements of the form:
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input wire signed [h:l] <list>;
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input wire signed [h:l] <list>;
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This creates the wire and sets the port type all at once. */
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This creates the wire and sets the port type all at once. */
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| port_direction net_type unsigned_signed_opt range_opt list_of_identifiers ';'
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| attribute_list_opt port_direction net_type unsigned_signed_opt range_opt list_of_identifiers ';'
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{ pform_makewire(@1, $4, $3, $5, $2, $1, IVL_VT_NO_TYPE, 0,
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{ pform_makewire(@2, $5, $4, $6, $3, $2, IVL_VT_NO_TYPE, $1, SR_BOTH); }
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SR_BOTH);
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}
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| K_output var_type unsigned_signed_opt range_opt list_of_port_identifiers ';'
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| attribute_list_opt K_output var_type unsigned_signed_opt range_opt list_of_port_identifiers ';'
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{ list<pair<perm_string,PExpr*> >::const_iterator pp;
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{ list<pair<perm_string,PExpr*> >::const_iterator pp;
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list<perm_string>*tmp = new list<perm_string>;
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list<perm_string>*tmp = new list<perm_string>;
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for (pp = $5->begin(); pp != $5->end(); ++ pp ) {
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for (pp = $6->begin(); pp != $6->end(); ++ pp ) {
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tmp->push_back((*pp).first);
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tmp->push_back((*pp).first);
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}
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}
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pform_makewire(@1, $4, $3, tmp, $2, NetNet::POUTPUT,
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pform_makewire(@2, $5, $4, tmp, $3, NetNet::POUTPUT,
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IVL_VT_NO_TYPE, 0, SR_BOTH);
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IVL_VT_NO_TYPE, $1, SR_BOTH);
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for (pp = $5->begin(); pp != $5->end(); ++ pp ) {
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for (pp = $6->begin(); pp != $6->end(); ++ pp ) {
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if ((*pp).second) {
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if ((*pp).second) {
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pform_make_reginit(@1, (*pp).first, (*pp).second);
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pform_make_reginit(@2, (*pp).first, (*pp).second);
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}
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}
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}
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}
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delete $5;
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delete $6;
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}
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}
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| port_direction K_wreal list_of_identifiers ';'
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| attribute_list_opt port_direction K_wreal list_of_identifiers ';'
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{ pform_makewire(@1, 0, true, $3, NetNet::WIRE, $1,
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{ pform_makewire(@2, 0, true, $4, NetNet::WIRE, $2,
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IVL_VT_REAL, 0, SR_BOTH);
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IVL_VT_REAL, $1, SR_BOTH);
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}
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}
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/* var_type declaration (reg variables) cannot be input or output,
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/* var_type declaration (reg variables) cannot be input or output,
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because the port declaration implies an external driver, which
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because the port declaration implies an external driver, which
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cannot be attached to a reg. These rules catch that error early. */
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cannot be attached to a reg. These rules catch that error early. */
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| K_input var_type unsigned_signed_opt range_opt list_of_identifiers ';'
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| attribute_list_opt K_input var_type unsigned_signed_opt range_opt list_of_identifiers ';'
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{ pform_makewire(@1, $4, $3, $5, $2, NetNet::PINPUT,
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{ pform_makewire(@2, $5, $4, $6, $3, NetNet::PINPUT,
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IVL_VT_NO_TYPE, 0);
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IVL_VT_NO_TYPE, $1);
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yyerror(@2, "error: reg variables cannot be inputs.");
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yyerror(@3, "error: reg variables cannot be inputs.");
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}
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}
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| K_inout var_type unsigned_signed_opt range_opt list_of_identifiers ';'
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| attribute_list_opt K_inout var_type unsigned_signed_opt range_opt list_of_identifiers ';'
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{ pform_makewire(@1, $4, $3, $5, $2, NetNet::PINOUT,
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{ pform_makewire(@2, $5, $4, $6, $3, NetNet::PINOUT,
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IVL_VT_NO_TYPE, 0);
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IVL_VT_NO_TYPE, $1);
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yyerror(@2, "error: reg variables cannot be inouts.");
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yyerror(@3, "error: reg variables cannot be inouts.");
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}
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}
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| port_direction unsigned_signed_opt range_opt delay3_opt error ';'
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| attribute_list_opt port_direction unsigned_signed_opt range_opt delay3_opt error ';'
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{ yyerror(@1, "error: Invalid variable list"
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{ yyerror(@2, "error: Invalid variable list in port declaration.");
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" in port declaration.");
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if ($1) delete $1;
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if ($3) delete $3;
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if ($4) delete $4;
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if ($4) delete $4;
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if ($5) delete $5;
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yyerrok;
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yyerrok;
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}
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}
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/* Maybe this is a discipline declaration? If so, then the lexor
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/* Maybe this is a discipline declaration? If so, then the lexor
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will see the discipline name as an identifier. We match it to the
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will see the discipline name as an identifier. We match it to the
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7
pform.cc
7
pform.cc
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@ -2297,6 +2297,7 @@ void pform_makewire(const vlltype&li,
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delete names;
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delete names;
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delete range;
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delete range;
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delete attr;
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}
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}
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/*
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/*
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@ -2916,7 +2917,8 @@ void pform_set_port_type(const struct vlltype&li,
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list<perm_string>*names,
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list<perm_string>*names,
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list<pform_range_t>*range,
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list<pform_range_t>*range,
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bool signed_flag,
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bool signed_flag,
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NetNet::PortType pt)
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NetNet::PortType pt,
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list<named_pexpr_t>*attr)
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{
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{
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assert(pt != NetNet::PIMPLICIT && pt != NetNet::NOT_A_PORT);
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assert(pt != NetNet::PIMPLICIT && pt != NetNet::NOT_A_PORT);
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@ -2925,11 +2927,12 @@ void pform_set_port_type(const struct vlltype&li,
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perm_string txt = *cur;
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perm_string txt = *cur;
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pform_set_port_type(txt, pt, li.text, li.first_line);
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pform_set_port_type(txt, pt, li.text, li.first_line);
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pform_set_net_range(txt, NetNet::NONE, range, signed_flag, IVL_VT_NO_TYPE,
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pform_set_net_range(txt, NetNet::NONE, range, signed_flag, IVL_VT_NO_TYPE,
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SR_PORT, 0);
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SR_PORT, attr);
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}
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}
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delete names;
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delete names;
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delete range;
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delete range;
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delete attr;
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}
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}
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static void pform_set_integer_2atom(uint64_t width, bool signed_flag, perm_string name, NetNet::Type net_type, list<named_pexpr_t>*attr)
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static void pform_set_integer_2atom(uint64_t width, bool signed_flag, perm_string name, NetNet::Type net_type, list<named_pexpr_t>*attr)
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3
pform.h
3
pform.h
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@ -340,7 +340,8 @@ extern void pform_set_port_type(const struct vlltype&li,
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list<perm_string>*names,
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list<perm_string>*names,
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list<pform_range_t>*range,
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list<pform_range_t>*range,
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bool signed_flag,
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bool signed_flag,
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NetNet::PortType);
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NetNet::PortType,
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list<named_pexpr_t>*attr);
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extern void pform_set_reg_idx(perm_string name,
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extern void pform_set_reg_idx(perm_string name,
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std::list<pform_range_t>*indices);
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std::list<pform_range_t>*indices);
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