Fix space issues
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@ -8,10 +8,10 @@ source code itself, so that you can find the global parts where you
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can look for even better detail.
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The documentation for getting, building and installing Icarus Verilog
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is kept and maintained at :doc:`Getting Started as a Contributer <../getting_started>`
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is kept and maintained at :doc:`Getting Started as a Contributer <../getting_started>`
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See the Installation Guide for getting the current source from the git
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repository (and how to use the git repository) and see the Developer Guide
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repository (and how to use the git repository) and see the Developer Guide
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for instructions on participating in the Icarus Verilog development process.
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That information will not be repeated here.
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@ -21,7 +21,7 @@ Procedural assignments have to be given one at a time, to be
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always @ (posedge Clk) Y = newY;
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always @ (posedge Clk) Z = newZ;
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rather than
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::
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@ -32,7 +32,7 @@ include implementations of private functions used to support VHDL.
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Compiling A VPI Module
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----------------------
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See the documentation under: :doc:`Using VPI <../../../usage/vpi>`
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See the documentation under: :doc:`Using VPI <../../../usage/vpi>`
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Tracing VPI Use
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---------------
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@ -10,4 +10,4 @@ VVP - Verilog Virtual Processor
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vpi
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vthread
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debug
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@ -531,7 +531,7 @@ the description when it is executed. The output is sent to stderr and
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the format of the output is:
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<file>:<line>: <description>
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<file> is the unsigned numeric file index.
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<line> is the unsigned line number.
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<description> is a string, if string is 0 then the following default
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@ -28,7 +28,7 @@ With this example code:
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out <= !out;
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end
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end
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assign blink = out;
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endmodule
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@ -60,4 +60,4 @@ Next are some directives. The first one, `:ivl_version` specifies which version
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Opcodes
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-------
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The various available opcodes can be seen in :doc:`Opcodes <../developer/guide/vvp/opcodes>`
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The various available opcodes can be seen in :doc:`Opcodes <../developer/guide/vvp/opcodes>`
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