Fix assigned vector size in constant user functions.
When assigning to a bit/logic variable, the RHS expression value must be trimmed to match the size of the variable.
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ee71ade720
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5d7558b5e0
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@ -25,6 +25,26 @@
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using namespace std;
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static NetExpr* fix_assign_value(const NetNet*lhs, NetExpr*rhs)
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{
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NetEConst*ce = dynamic_cast<NetEConst*>(rhs);
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if (ce == 0) return rhs;
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unsigned lhs_width = lhs->vector_width();
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unsigned rhs_width = rhs->expr_width();
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if (rhs_width < lhs_width) {
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rhs = pad_to_width(rhs, lhs_width, *rhs);
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} else if (rhs_width > lhs_width) {
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verinum value(ce->value(), lhs_width);
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ce = new NetEConst(value);
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ce->set_line(*rhs);
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delete rhs;
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rhs = ce;
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}
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rhs->cast_signed(lhs->get_signed());
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return rhs;
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}
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NetExpr* NetFuncDef::evaluate_function(const LineInfo&loc, const std::vector<NetExpr*>&args) const
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{
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// Make the context map;
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@ -43,7 +63,7 @@ NetExpr* NetFuncDef::evaluate_function(const LineInfo&loc, const std::vector<Net
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ivl_assert(loc, ports_.size() == args.size());
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for (size_t idx = 0 ; idx < ports_.size() ; idx += 1) {
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perm_string aname = ports_[idx]->name();
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context_map[aname] = args[idx];
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context_map[aname] = fix_assign_value(ports_[idx], args[idx]);
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if (debug_eval_tree) {
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cerr << loc.get_fileline() << ": debug: "
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@ -171,7 +191,7 @@ bool NetAssign::evaluate_function(const LineInfo&loc,
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delete rval_result;
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rval_result = new NetEConst(lval_v);
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} else {
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rval_result->cast_signed(lval->sig()->get_signed());
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rval_result = fix_assign_value(lval->sig(), rval_result);
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}
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if (ptr->second)
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