Updates from Stefan.

verilog.sh

@@ -24,7 +24,8 @@ execIVLPP=${execPath}/ivlpp
 execIVL=${execPath}/ivl
 execCpp=/usr/bin/g++
 
-target="-t vvm"
+vvmTarget="-t vvm"
+xnfTarget="-t xnf"
 
 tmpDir=/tmp
 tmpPPFile=${tmpDir}/ivl$$.pp
@@ -33,66 +34,77 @@ tmpCCFile=${tmpDir}/ivl$$.cc
 VPIModulePath=@libdir@/ivl:.
 
 outputRequested=0
+target=${vvmTarget}
+xnfForm=0
 
-
-# If VPI module path aren't set up, setup default
-# Humm, doesn't work as intended ... silly silly me
+# If VPI module path aren't set up, warn at least
 if test -z "${VPI_MODULE_PATH}" ; then
-  VPI_MODULE_PATH=${VPIModulePath} ;
-  export VPI_MODULE_PATH ;
+    echo "Missing environment variable VPI_MODULE_PATH.";
+    echo "To be able to execute, set VPI_MODULE_PATH to ${VPIModulePath}";
 fi
 
+if test -z "$*" ; then
+    echo "Missing infile";
+    echo "verilog [-Dmacro[=defn]] [-Iincludepath] [-X] [-o outputfilename] sourcefile" ;
+    exit -1;
+fi
 
 # Try to extract given parameters
 for parameter in $*; do 
 
-#  echo ${parameter} ;
-
-  if test ${outputRequested} -eq 1 ; then
-    outputFile=${parameter};
-    outputRequested=0;
-  else
-    case "${parameter}" in
-      -D*) extDefines="${extDefines} ${parameter}" ;;
-      -I*) extIncPath="${extIncPath} -I ${parameter:2}";;
-      -l*) extLibPath="${extLibPath} ${parameter}" ;;
-      -o)  outputRequested=1 ;;
-      *)   verilogFile=${parameter};;
-    esac
-  fi
+    if test ${outputRequested} -eq 1 ; then
+	outputFile=${parameter};
+	outputRequested=0;
+    else
+	case "${parameter}" in
+	    -D*) extDefines="${extDefines} ${parameter}" ;;
+	    -I*) extIncPath="${extIncPath} -I ${parameter:2}" ;;
+	    -X)  xnfForm=1; target=${xnfTarget} ;;
+	    -o)  outputRequested=1 ;;
+	    *)   verilogFile=${parameter};;
+	esac
+    fi
 
 done
 
 
 # If no output file is given should we guess one or...?
 if test -z "${outputFile}" ; then 
-  outputFile=`echo ${verilogFile} | sed -e 's/\(.*\)\..*/\1/'`;
+    outputFile=`echo ${verilogFile} | sed -e 's/\(.*\)\..*/\1/'`;
+    if test ${xnfForm} -eq 1 ; then
+	outputFile="${outputFile}.xnf" ;
+    fi
 fi
 
 
 # Preprocess
 ${execIVLPP} ${extDefines} ${extIncPath} -L -o ${tmpPPFile} ${verilogFile}
 if test $? -ne 0 ; then
-  echo "Preprocessing failed. Terminating compilation."
-  rm -f ${tmpPPFile}
-  exit -1
+    echo "Preprocessing failed. Terminating compilation."
+    rm -f ${tmpPPFile}
+    exit -1
 fi
 
 
 # Compile preprocessed verilog file
 ${execIVL} ${target} -o ${tmpCCFile} ${tmpPPFile}
 if test $? -ne  0 ; then
-  echo "Verilog compilation failed. Terminating compilation."
-  rm -f ${tmpCCFile}
-  exit -1
+    echo "Verilog compilation failed. Terminating compilation."
+    rm -f ${tmpCCFile}
+    exit -1
 fi
 rm -f ${tmpPPFile}
 
-# Compile generated C++ code
-${execCpp} -rdynamic ${tmpCCFile} -o ${outputFile} -lvvm -ldl
-if test $? -ne 0 ; then
-  echo "C++ compilation failed. Terminating compilation."
-  rm -f ${tmpCCFile}
-  exit -1
+# If XNF just move the created file in place else ...
+if test ${xnfForm} -eq 1 ; then
+    mv ${tmpCCFile} ${outputFile} ;
+else
+    # ...compile generated C++ code
+    ${execCpp} -rdynamic ${tmpCCFile} -o ${outputFile} -lvvm -ldl
+    if test $? -ne 0 ; then
+	echo "C++ compilation failed. Terminating compilation."
+	rm -f ${tmpCCFile}
+	exit -1
+    fi
+    rm -f ${tmpCCFile}
 fi
-rm -f ${tmpCCFile}