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Debug dumps for synth2.

This commit is contained in:
steve 2003-12-17 16:52:39 +00:00
parent f0e0377a20
commit 57c3e86084
3 changed files with 75 additions and 13 deletions
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14
design_dump.cc
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/ */
#ifdef HAVE_CVS_IDENT #ifdef HAVE_CVS_IDENT
#ident "$Id: design_dump.cc,v 1.144 2003/07/26 03:34:42 steve Exp $" #ident "$Id: design_dump.cc,v 1.145 2003/12/17 16:52:39 steve Exp $"
#endif #endif
# include "config.h" # include "config.h"
@ -495,6 +495,15 @@ void NetAssignNB::dump(ostream&o, unsigned ind) const
} }
void NetAssignBase::dump(ostream&o, unsigned ind) const
{
if (const NetAssignNB *n1 = dynamic_cast<const NetAssignNB*>(this)) {
n1->dump(o,ind);
} else if (const NetAssign *n2 = dynamic_cast<const NetAssign*>(this)) {
n2->dump(o,ind);
}
}
/* Dump a block statement */ /* Dump a block statement */
void NetBlock::dump(ostream&o, unsigned ind) const void NetBlock::dump(ostream&o, unsigned ind) const
{ {
@ -1068,6 +1077,9 @@ void Design::dump(ostream&o) const
/* /*
* $Log: design_dump.cc,v $ * $Log: design_dump.cc,v $
* Revision 1.145 2003/12/17 16:52:39 steve
* Debug dumps for synth2.
*
* Revision 1.144 2003/07/26 03:34:42 steve * Revision 1.144 2003/07/26 03:34:42 steve
* Start handling pad of expressions in code generators. * Start handling pad of expressions in code generators.
* *

6
netlist.h
View File

@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/ */
#ifdef HAVE_CVS_IDENT #ifdef HAVE_CVS_IDENT
#ident "$Id: netlist.h,v 1.306 2003/11/10 20:59:03 steve Exp $" #ident "$Id: netlist.h,v 1.307 2003/12/17 16:52:39 steve Exp $"
#endif #endif
/* /*
@ -1463,6 +1463,7 @@ class NetAssignBase : public NetProc {
// This dumps all the lval structures. // This dumps all the lval structures.
void dump_lval(ostream&) const; void dump_lval(ostream&) const;
virtual void dump(ostream&, unsigned ind) const;
private: private:
NetAssign_*lval_; NetAssign_*lval_;
@ -3310,6 +3311,9 @@ extern ostream& operator << (ostream&, NetNet::Type);
/* /*
* $Log: netlist.h,v $ * $Log: netlist.h,v $
* Revision 1.307 2003/12/17 16:52:39 steve
* Debug dumps for synth2.
*
* Revision 1.306 2003/11/10 20:59:03 steve * Revision 1.306 2003/11/10 20:59:03 steve
* Design::get_flag returns const char* instead of string. * Design::get_flag returns const char* instead of string.
* *

68
synth2.cc
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/ */
#ifdef HAVE_CVS_IDENT #ifdef HAVE_CVS_IDENT
#ident "$Id: synth2.cc,v 1.32 2003/10/27 02:18:04 steve Exp $" #ident "$Id: synth2.cc,v 1.33 2003/12/17 16:52:39 steve Exp $"
#endif #endif
# include "config.h" # include "config.h"
@ -27,6 +27,12 @@
# include "compiler.h" # include "compiler.h"
# include <assert.h> # include <assert.h>
static int debug_synth2=0;
#define DEBUG_SYNTH2_ENTRY(class) if (debug_synth2) { cerr << "Enter " << class << "::" \
<< __FUNCTION__ << endl; dump(cerr, 4); }
#define DEBUG_SYNTH2_EXIT(class,val) if (debug_synth2) { cerr << "Exit " << class << "::" \
<< __FUNCTION__ << ", result " << val << endl; }
bool NetProc::synth_async(Design*des, NetScope*scope, bool NetProc::synth_async(Design*des, NetScope*scope,
const NetNet*nex_map, NetNet*nex_out) const NetNet*nex_map, NetNet*nex_out)
{ {
@ -37,6 +43,8 @@ bool NetProc::synth_sync(Design*des, NetScope*scope, NetFF*ff,
const NetNet*nex_map, NetNet*nex_out, const NetNet*nex_map, NetNet*nex_out,
const svector<NetEvProbe*>&events) const svector<NetEvProbe*>&events)
{ {
DEBUG_SYNTH2_ENTRY("NetProc")
if (events.count() > 0) { if (events.count() > 0) {
cerr << get_line() << ": error: Events are unaccounted" cerr << get_line() << ": error: Events are unaccounted"
<< " for in process synthesis." << endl; << " for in process synthesis." << endl;
@ -70,6 +78,8 @@ static unsigned find_nexus_in_set(const NetNet*nset, const Nexus*nex)
bool NetAssignBase::synth_async(Design*des, NetScope*scope, bool NetAssignBase::synth_async(Design*des, NetScope*scope,
const NetNet*nex_map, NetNet*nex_out) const NetNet*nex_map, NetNet*nex_out)
{ {
DEBUG_SYNTH2_ENTRY("NetAssignBase")
NetNet*rsig = rval_->synthesize(des); NetNet*rsig = rval_->synthesize(des);
assert(rsig); assert(rsig);
@ -86,6 +96,7 @@ bool NetAssignBase::synth_async(Design*des, NetScope*scope,
connect(nex_out->pin(ptr), rsig->pin(idx)); connect(nex_out->pin(ptr), rsig->pin(idx));
} }
DEBUG_SYNTH2_EXIT("NetAssignBase",true)
return true; return true;
} }
@ -98,8 +109,11 @@ bool NetAssignBase::synth_async(Design*des, NetScope*scope,
bool NetBlock::synth_async(Design*des, NetScope*scope, bool NetBlock::synth_async(Design*des, NetScope*scope,
const NetNet*nex_map, NetNet*nex_out) const NetNet*nex_map, NetNet*nex_out)
{ {
if (last_ == 0) DEBUG_SYNTH2_ENTRY("NetBlock")
if (last_ == 0) {
DEBUG_SYNTH2_EXIT("NetBlock",true)
return true; return true;
}
bool flag = true; bool flag = true;
NetProc*cur = last_; NetProc*cur = last_;
@ -137,12 +151,14 @@ bool NetBlock::synth_async(Design*des, NetScope*scope,
} while (cur != last_); } while (cur != last_);
DEBUG_SYNTH2_EXIT("NetBlock",flag)
return flag; return flag;
} }
bool NetCase::synth_async(Design*des, NetScope*scope, bool NetCase::synth_async(Design*des, NetScope*scope,
const NetNet*nex_map, NetNet*nex_out) const NetNet*nex_map, NetNet*nex_out)
{ {
DEBUG_SYNTH2_ENTRY("NetCase")
unsigned cur; unsigned cur;
NetNet*esig = expr_->synthesize(des); NetNet*esig = expr_->synthesize(des);
@ -260,20 +276,25 @@ bool NetCase::synth_async(Design*des, NetScope*scope,
delete[]statement_map; delete[]statement_map;
des->add_node(mux); des->add_node(mux);
DEBUG_SYNTH2_EXIT("NetCase", true)
return true; return true;
} }
bool NetCondit::synth_async(Design*des, NetScope*scope, bool NetCondit::synth_async(Design*des, NetScope*scope,
const NetNet*nex_map, NetNet*nex_out) const NetNet*nex_map, NetNet*nex_out)
{ {
DEBUG_SYNTH2_ENTRY("NetCondit")
NetNet*ssig = expr_->synthesize(des); NetNet*ssig = expr_->synthesize(des);
assert(ssig); assert(ssig);
if (if_ == 0) if (if_ == 0) {
DEBUG_SYNTH2_EXIT("NetCondit",false)
return false; return false;
}
if (else_ == 0) { if (else_ == 0) {
cerr << get_line() << ": error: Asynchronous if statement" cerr << get_line() << ": error: Asynchronous if statement"
<< " is missing the else clause." << endl; << " is missing the else clause." << endl;
DEBUG_SYNTH2_EXIT("NetCondit",false)
return false; return false;
} }
@ -308,17 +329,22 @@ bool NetCondit::synth_async(Design*des, NetScope*scope,
des->add_node(mux); des->add_node(mux);
DEBUG_SYNTH2_EXIT("NetCondit",true)
return true; return true;
} }
bool NetEvWait::synth_async(Design*des, NetScope*scope, bool NetEvWait::synth_async(Design*des, NetScope*scope,
const NetNet*nex_map, NetNet*nex_out) const NetNet*nex_map, NetNet*nex_out)
{ {
return statement_->synth_async(des, scope, nex_map, nex_out); DEBUG_SYNTH2_ENTRY("NetEvWait")
bool flag = statement_->synth_async(des, scope, nex_map, nex_out);
DEBUG_SYNTH2_EXIT("NetEvWait",flag)
return flag;
} }
bool NetProcTop::synth_async(Design*des) bool NetProcTop::synth_async(Design*des)
{ {
DEBUG_SYNTH2_ENTRY("NetProcTop")
NexusSet nex_set; NexusSet nex_set;
statement_->nex_output(nex_set); statement_->nex_output(nex_set);
@ -330,6 +356,7 @@ bool NetProcTop::synth_async(Design*des)
bool flag = statement_->synth_async(des, scope(), nex_out, nex_out); bool flag = statement_->synth_async(des, scope(), nex_out, nex_out);
delete nex_out; delete nex_out;
DEBUG_SYNTH2_EXIT("NetProcTop",flag)
return flag; return flag;
} }
@ -351,8 +378,11 @@ bool NetBlock::synth_sync(Design*des, NetScope*scope, NetFF*ff,
const NetNet*nex_map, NetNet*nex_out, const NetNet*nex_map, NetNet*nex_out,
const svector<NetEvProbe*>&events_in) const svector<NetEvProbe*>&events_in)
{ {
if (last_ == 0) DEBUG_SYNTH2_ENTRY("NetBlock")
if (last_ == 0) {
DEBUG_SYNTH2_EXIT("NetBlock",true)
return true; return true;
}
bool flag = true; bool flag = true;
@ -492,6 +522,7 @@ bool NetBlock::synth_sync(Design*des, NetScope*scope, NetFF*ff,
taken up by the smaller NetFF devices. */ taken up by the smaller NetFF devices. */
delete ff; delete ff;
DEBUG_SYNTH2_EXIT("NetBlock",flag)
return flag; return flag;
} }
@ -505,6 +536,7 @@ bool NetCondit::synth_sync(Design*des, NetScope*scope, NetFF*ff,
const NetNet*nex_map, NetNet*nex_out, const NetNet*nex_map, NetNet*nex_out,
const svector<NetEvProbe*>&events_in) const svector<NetEvProbe*>&events_in)
{ {
DEBUG_SYNTH2_ENTRY("NetCondit")
/* First try to turn the condition expression into an /* First try to turn the condition expression into an
asynchronous set/reset. If the condition expression has asynchronous set/reset. If the condition expression has
inputs that are included in the sensitivity list, then it inputs that are included in the sensitivity list, then it
@ -570,9 +602,11 @@ bool NetCondit::synth_sync(Design*des, NetScope*scope, NetFF*ff,
assert(events_in.count() == 1); assert(events_in.count() == 1);
assert(else_ != 0); assert(else_ != 0);
return else_->synth_sync(des, scope, ff, nex_map, flag = else_->synth_sync(des, scope, ff, nex_map,
nex_out, svector<NetEvProbe*>(0)) nex_out, svector<NetEvProbe*>(0))
&& flag; && flag;
DEBUG_SYNTH2_EXIT("NetCondit",flag)
return flag;
} }
delete expr_input; delete expr_input;
@ -626,9 +660,11 @@ bool NetCondit::synth_sync(Design*des, NetScope*scope, NetFF*ff,
delete a_set; delete a_set;
assert(else_ != 0); assert(else_ != 0);
return else_->synth_sync(des, scope, ff, nex_map, flag = else_->synth_sync(des, scope, ff, nex_map,
nex_out, svector<NetEvProbe*>(0)) nex_out, svector<NetEvProbe*>(0))
&& flag; && flag;
DEBUG_SYNTH2_EXIT("NetCondit",flag)
return flag;
} }
delete a_set; delete a_set;
@ -645,7 +681,9 @@ bool NetCondit::synth_sync(Design*des, NetScope*scope, NetFF*ff,
/* If this is an if/then/else, then it is likely a /* If this is an if/then/else, then it is likely a
combinational if, and I should synthesize it that way. */ combinational if, and I should synthesize it that way. */
if (if_ && else_) { if (if_ && else_) {
return synth_async(des, scope, nex_map, nex_out); bool flag = synth_async(des, scope, nex_map, nex_out);
DEBUG_SYNTH2_EXIT("NetCondit",flag)
return flag;
} }
assert(if_); assert(if_);
@ -694,16 +732,16 @@ bool NetCondit::synth_sync(Design*des, NetScope*scope, NetFF*ff,
} }
bool flag = if_->synth_sync(des, scope, ff, nex_map, nex_out, events_in); bool flag = if_->synth_sync(des, scope, ff, nex_map, nex_out, events_in);
if (flag == false)
return flag;
return true; DEBUG_SYNTH2_EXIT("NetCondit",flag)
return flag;
} }
bool NetEvWait::synth_sync(Design*des, NetScope*scope, NetFF*ff, bool NetEvWait::synth_sync(Design*des, NetScope*scope, NetFF*ff,
const NetNet*nex_map, NetNet*nex_out, const NetNet*nex_map, NetNet*nex_out,
const svector<NetEvProbe*>&events_in) const svector<NetEvProbe*>&events_in)
{ {
DEBUG_SYNTH2_ENTRY("NetEvWait")
if (events_in.count() > 0) { if (events_in.count() > 0) {
cerr << get_line() << ": error: Events are unaccounted" cerr << get_line() << ": error: Events are unaccounted"
<< " for in process synthesis." << endl; << " for in process synthesis." << endl;
@ -755,6 +793,7 @@ bool NetEvWait::synth_sync(Design*des, NetScope*scope, NetFF*ff,
<< " are valid clock inputs." << endl; << " are valid clock inputs." << endl;
cerr << get_line() << ": : Perhaps the clock" cerr << get_line() << ": : Perhaps the clock"
<< " is read by a statement or expression?" << endl; << " is read by a statement or expression?" << endl;
DEBUG_SYNTH2_EXIT("NetEvWait",false)
return false; return false;
} }
@ -766,11 +805,13 @@ bool NetEvWait::synth_sync(Design*des, NetScope*scope, NetFF*ff,
bool flag = statement_->synth_sync(des, scope, ff, bool flag = statement_->synth_sync(des, scope, ff,
nex_map, nex_out, events); nex_map, nex_out, events);
DEBUG_SYNTH2_EXIT("NetEvWait",flag)
return flag; return flag;
} }
bool NetProcTop::synth_sync(Design*des) bool NetProcTop::synth_sync(Design*des)
{ {
DEBUG_SYNTH2_ENTRY("NetProcTop")
NexusSet nex_set; NexusSet nex_set;
statement_->nex_output(nex_set); statement_->nex_output(nex_set);
@ -805,6 +846,7 @@ bool NetProcTop::synth_sync(Design*des)
delete nex_q; delete nex_q;
DEBUG_SYNTH2_EXIT("NetProcTop",flag)
return flag; return flag;
} }
@ -880,12 +922,16 @@ void synth2_f::process(class Design*des, class NetProcTop*top)
void synth2(Design*des) void synth2(Design*des)
{ {
debug_synth2 = atoi(des->get_flag("ivl-synth2-debug"));
synth2_f synth_obj; synth2_f synth_obj;
des->functor(&synth_obj); des->functor(&synth_obj);
} }
/* /*
* $Log: synth2.cc,v $ * $Log: synth2.cc,v $
* Revision 1.33 2003/12/17 16:52:39 steve
* Debug dumps for synth2.
*
* Revision 1.32 2003/10/27 02:18:04 steve * Revision 1.32 2003/10/27 02:18:04 steve
* Handle special case of FF with enable and constant data. * Handle special case of FF with enable and constant data.
* *