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Allow force assignments on unresolved wire array words. 

A force doesn't require resolution. We already allow this for
individual unresolved wires.
This commit is contained in:
Martin Whitaker 2024-01-28 14:33:17 +00:00
parent 82516c28e2
commit 56f457d65e
2 changed files with 7 additions and 6 deletions
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4
PExpr.h
View File

@ -1,7 +1,7 @@
#ifndef IVL_PExpr_H
#define IVL_PExpr_H
/*
* Copyright (c) 1998-2021 Stephen Williams <steve@icarus.com>
* Copyright (c) 1998-2024 Stephen Williams <steve@icarus.com>
* Copyright CERN 2013 / Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
@ -428,7 +428,7 @@ class PEIdent : public PExpr {
NetNet *reg, ivl_type_t data_type,
pform_name_t tail_path) const;
NetAssign_*elaborate_lval_net_word_(Design*, NetScope*, NetNet*,
bool need_const_idx) const;
bool need_const_idx, bool is_force) const;
bool elaborate_lval_net_bit_(Design*, NetScope*, NetAssign_*,
bool need_const_idx) const;
bool elaborate_lval_net_part_(Design*, NetScope*, NetAssign_*) const;

9
elab_lval.cc
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2000-2023 Stephen Williams (steve@icarus.com)
* Copyright (c) 2000-2024 Stephen Williams (steve@icarus.com)
* Copyright CERN 2012-2013 / Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
@ -306,7 +306,7 @@ NetAssign_*PEIdent::elaborate_lval_var_(Design *des, NetScope *scope,
bool need_const_idx = is_cassign || is_force || (reg->type()==NetNet::UNRESOLVED_WIRE);
if (reg->unpacked_dimensions() > 0)
return elaborate_lval_net_word_(des, scope, reg, need_const_idx);
return elaborate_lval_net_word_(des, scope, reg, need_const_idx, is_force);
// This must be after the array word elaboration above!
if (reg->get_scalar() &&
@ -366,7 +366,8 @@ NetAssign_*PEIdent::elaborate_lval_var_(Design *des, NetScope *scope,
NetAssign_* PEIdent::elaborate_lval_net_word_(Design*des,
NetScope*scope,
NetNet*reg,
bool need_const_idx) const
bool need_const_idx,
bool is_force) const
{
const name_component_t&name_tail = path_.back();
ivl_assert(*this, !name_tail.index.empty());
@ -448,7 +449,7 @@ NetAssign_* PEIdent::elaborate_lval_net_word_(Design*des,
<< "canon_index=" << *canon_index << endl;
}
if (reg->type()==NetNet::UNRESOLVED_WIRE) {
if ((reg->type()==NetNet::UNRESOLVED_WIRE) && !is_force) {
cerr << get_fileline() << ": error: "
<< "Unable to assign words of unresolved wire array." << endl;
des->errors += 1;