Allow force assignments on unresolved wire array words.
A force doesn't require resolution. We already allow this for individual unresolved wires.
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82516c28e2
commit
56f457d65e
4
PExpr.h
4
PExpr.h
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@ -1,7 +1,7 @@
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#ifndef IVL_PExpr_H
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#ifndef IVL_PExpr_H
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#define IVL_PExpr_H
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#define IVL_PExpr_H
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/*
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/*
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* Copyright (c) 1998-2021 Stephen Williams <steve@icarus.com>
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* Copyright (c) 1998-2024 Stephen Williams <steve@icarus.com>
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* Copyright CERN 2013 / Stephen Williams (steve@icarus.com)
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* Copyright CERN 2013 / Stephen Williams (steve@icarus.com)
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*
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*
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* This source code is free software; you can redistribute it
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* This source code is free software; you can redistribute it
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@ -428,7 +428,7 @@ class PEIdent : public PExpr {
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NetNet *reg, ivl_type_t data_type,
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NetNet *reg, ivl_type_t data_type,
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pform_name_t tail_path) const;
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pform_name_t tail_path) const;
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NetAssign_*elaborate_lval_net_word_(Design*, NetScope*, NetNet*,
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NetAssign_*elaborate_lval_net_word_(Design*, NetScope*, NetNet*,
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bool need_const_idx) const;
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bool need_const_idx, bool is_force) const;
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bool elaborate_lval_net_bit_(Design*, NetScope*, NetAssign_*,
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bool elaborate_lval_net_bit_(Design*, NetScope*, NetAssign_*,
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bool need_const_idx) const;
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bool need_const_idx) const;
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bool elaborate_lval_net_part_(Design*, NetScope*, NetAssign_*) const;
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bool elaborate_lval_net_part_(Design*, NetScope*, NetAssign_*) const;
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2000-2023 Stephen Williams (steve@icarus.com)
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* Copyright (c) 2000-2024 Stephen Williams (steve@icarus.com)
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* Copyright CERN 2012-2013 / Stephen Williams (steve@icarus.com)
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* Copyright CERN 2012-2013 / Stephen Williams (steve@icarus.com)
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*
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*
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* This source code is free software; you can redistribute it
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* This source code is free software; you can redistribute it
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@ -306,7 +306,7 @@ NetAssign_*PEIdent::elaborate_lval_var_(Design *des, NetScope *scope,
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bool need_const_idx = is_cassign || is_force || (reg->type()==NetNet::UNRESOLVED_WIRE);
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bool need_const_idx = is_cassign || is_force || (reg->type()==NetNet::UNRESOLVED_WIRE);
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if (reg->unpacked_dimensions() > 0)
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if (reg->unpacked_dimensions() > 0)
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return elaborate_lval_net_word_(des, scope, reg, need_const_idx);
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return elaborate_lval_net_word_(des, scope, reg, need_const_idx, is_force);
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// This must be after the array word elaboration above!
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// This must be after the array word elaboration above!
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if (reg->get_scalar() &&
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if (reg->get_scalar() &&
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@ -366,7 +366,8 @@ NetAssign_*PEIdent::elaborate_lval_var_(Design *des, NetScope *scope,
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NetAssign_* PEIdent::elaborate_lval_net_word_(Design*des,
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NetAssign_* PEIdent::elaborate_lval_net_word_(Design*des,
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NetScope*scope,
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NetScope*scope,
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NetNet*reg,
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NetNet*reg,
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bool need_const_idx) const
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bool need_const_idx,
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bool is_force) const
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{
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{
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const name_component_t&name_tail = path_.back();
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const name_component_t&name_tail = path_.back();
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ivl_assert(*this, !name_tail.index.empty());
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ivl_assert(*this, !name_tail.index.empty());
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@ -448,7 +449,7 @@ NetAssign_* PEIdent::elaborate_lval_net_word_(Design*des,
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<< "canon_index=" << *canon_index << endl;
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<< "canon_index=" << *canon_index << endl;
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}
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}
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if (reg->type()==NetNet::UNRESOLVED_WIRE) {
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if ((reg->type()==NetNet::UNRESOLVED_WIRE) && !is_force) {
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cerr << get_fileline() << ": error: "
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cerr << get_fileline() << ": error: "
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<< "Unable to assign words of unresolved wire array." << endl;
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<< "Unable to assign words of unresolved wire array." << endl;
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des->errors += 1;
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des->errors += 1;
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