Assume module output primitive arguments as variables by default
A bit/logic output type in a module initially is defaulted to as a
variable. Depending on how they are used in the module, the type
changes accordingly.
For example
module test(output logic l);
assign l = '0;
endmodule
The variable 'l' would be promoted to a Net data type, when the
'assign' statement is encountered.
Acked-by: Oswaldo Cadenas <oswaldo.cadenas@gmail.com>
Signed-off-by: Prasad Joshi <prasadjoshi124@gmail.com>
This commit is contained in:
parent
60deb775ca
commit
537b8cba34
14
parse.y
14
parse.y
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@ -2161,12 +2161,17 @@ port_declaration
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K_output net_type_opt primitive_type_opt unsigned_signed_opt range_opt IDENTIFIER
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{ Module::port_t*ptmp;
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perm_string name = lex_strings.make($7);
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NetNet::Type t = $3;
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if ($4 != IVL_VT_NO_TYPE && t == NetNet::IMPLICIT)
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t = NetNet::IMPLICIT_REG;
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ptmp = pform_module_port_reference(name, @2.text,
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@2.first_line);
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pform_module_define_port(@2, name, NetNet::POUTPUT,
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$3, $4, $5, $6, $1);
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t, $4, $5, $6, $1);
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port_declaration_context.port_type = NetNet::POUTPUT;
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port_declaration_context.port_net_type = $3;
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port_declaration_context.port_net_type = t;
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port_declaration_context.var_type = $4;
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port_declaration_context.sign_flag = $5;
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delete port_declaration_context.range;
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@ -2215,7 +2220,10 @@ port_declaration
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K_output net_type_opt primitive_type_opt unsigned_signed_opt range_opt IDENTIFIER '=' expression
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{ Module::port_t*ptmp;
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perm_string name = lex_strings.make($7);
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NetNet::Type t = ($3 == NetNet::IMPLICIT) ? NetNet::IMPLICIT_REG : $3;
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NetNet::Type t = $3;
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if ($4 != IVL_VT_NO_TYPE && t == NetNet::IMPLICIT)
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t = NetNet::IMPLICIT_REG;
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ptmp = pform_module_port_reference(name, @2.text,
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@2.first_line);
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