Support free-form `(end)cell_define and `reset_all directives.

Also use VLerror for reporting errors.

ivtest/ivltests/br_gh782d.v

@@ -0,0 +1,22 @@
+// This is just a syntax test.
+
+/* comment */ `resetall /* comment */ // comment
+/* comment */ `celldefine /* comment */ // comment
+module cell1;
+endmodule
+/* comment */ `endcelldefine /* comment */ // comment
+
+/* comment */`resetall/*
+   comment */
+/* comment */`celldefine/*
+   comment */
+module cell2;
+endmodule
+/* comment */`endcelldefine/*
+   comment */
+
+module test;
+
+initial $display("PASSED");
+
+endmodule

ivtest/regress-vlg.list

@@ -350,6 +350,7 @@ br_gh632c		normal			ivltests
 br_gh674		normal			ivltests
 br_gh732		normal			ivltests gold=br_gh732.gold
 br_gh782c		normal			ivltests
+br_gh782d		normal			ivltests
 br_gh788		normal,-gno-io-range-error,-Wno-anachronisms	ivltests gold=br_gh788.gold
 br_gh793		normal			ivltests
 br_ml20150315		normal			ivltests gold=br_ml_20150315.gold

lexor.lex

@@ -640,22 +640,18 @@ TU [munpf]
 
   /* Notice and handle the `celldefine and `endcelldefine directives. */
 
-^{W}?`celldefine{W}?    { in_celldefine = true; }
-^{W}?`endcelldefine{W}? { in_celldefine = false; }
+`celldefine    { in_celldefine = true; }
+`endcelldefine { in_celldefine = false; }
 
   /* Notice and handle the resetall directive. */
 
-^{W}?`resetall{W}? {
+`resetall {
       if (in_module) {
-	    cerr << yylloc.text << ":" << yylloc.first_line << ": error: "
-		    "`resetall directive can not be inside a module "
-		    "definition." << endl;
-	    error_count += 1;
+	    VLerror(yylloc, "error: `resetall directive cannot be inside a "
+		    "module definition.");
       } else if (in_UDP) {
-	    cerr << yylloc.text << ":" << yylloc.first_line << ": error: "
-		    "`resetall directive can not be inside a UDP "
-		    "definition." << endl;
-	    error_count += 1;
+	    VLerror(yylloc, "error: `resetall directive cannot be inside a "
+		    "UDP definition.");
       } else {
 	    reset_all();
       } }