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Fix typo in warning message (issue #1195)

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Martin Whitaker 2025-01-01 10:59:48 +00:00
parent 875828f862
commit 52b34e6d91
1 changed files with 1 additions and 1 deletions
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@ -3075,7 +3075,7 @@ static void check_if_logic_l_value(const NetAssignBase *base,
if ((sig->data_type() != IVL_VT_BOOL) &&
(sig->data_type() != IVL_VT_LOGIC)) {
cerr << base->get_fileline() << ": warning: Assinging to a "
cerr << base->get_fileline() << ": warning: Assigning to a "
"non-integral variable ("<< sig->name()
<< ") cannot be synthesized "
<< get_process_type_as_string(pr_type) << endl;