Implement non-blocking part assign.
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@ -19,7 +19,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: codes.h,v 1.71 2005/05/01 22:05:21 steve Exp $"
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#ident "$Id: codes.h,v 1.72 2005/05/07 03:15:42 steve Exp $"
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#endif
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@ -44,6 +44,7 @@ extern bool of_ASSIGN_D(vthread_t thr, vvp_code_t code);
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extern bool of_ASSIGN_MEM(vthread_t thr, vvp_code_t code);
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extern bool of_ASSIGN_MV(vthread_t thr, vvp_code_t code);
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extern bool of_ASSIGN_V0(vthread_t thr, vvp_code_t code);
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extern bool of_ASSIGN_V0X1(vthread_t thr, vvp_code_t code);
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extern bool of_ASSIGN_WR(vthread_t thr, vvp_code_t code);
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extern bool of_ASSIGN_X0(vthread_t thr, vvp_code_t code);
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extern bool of_BLEND(vthread_t thr, vvp_code_t code);
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@ -172,6 +173,9 @@ extern vvp_code_t codespace_null(void);
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/*
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* $Log: codes.h,v $
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* Revision 1.72 2005/05/07 03:15:42 steve
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* Implement non-blocking part assign.
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*
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* Revision 1.71 2005/05/01 22:05:21 steve
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* Add cassign/link instruction.
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*
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: compile.cc,v 1.199 2005/05/01 22:05:21 steve Exp $"
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#ident "$Id: compile.cc,v 1.200 2005/05/07 03:15:42 steve Exp $"
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#endif
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# include "arith.h"
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@ -91,6 +91,7 @@ const static struct opcode_table_s opcode_table[] = {
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{ "%assign/m",of_ASSIGN_MEM,3,{OA_MEM_PTR,OA_BIT1, OA_BIT2} },
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{ "%assign/mv",of_ASSIGN_MV,3,{OA_MEM_PTR,OA_BIT1, OA_BIT2} },
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{ "%assign/v0",of_ASSIGN_V0,3,{OA_FUNC_PTR,OA_BIT1, OA_BIT2} },
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{ "%assign/v0/x1",of_ASSIGN_V0X1,3,{OA_FUNC_PTR,OA_BIT1,OA_BIT2} },
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{ "%assign/wr",of_ASSIGN_WR,3,{OA_VPI_PTR,OA_BIT1, OA_BIT2} },
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{ "%assign/x0",of_ASSIGN_X0,3,{OA_FUNC_PTR,OA_BIT1, OA_BIT2} },
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{ "%blend", of_BLEND, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
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@ -1525,6 +1526,9 @@ void compile_param_string(char*label, char*name, char*str, char*value)
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/*
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* $Log: compile.cc,v $
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* Revision 1.200 2005/05/07 03:15:42 steve
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* Implement non-blocking part assign.
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*
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* Revision 1.199 2005/05/01 22:05:21 steve
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* Add cassign/link instruction.
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*
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@ -1,7 +1,7 @@
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/*
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* Copyright (c) 2001-2003 Stephen Williams (steve@icarus.com)
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*
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* $Id: opcodes.txt,v 1.62 2005/03/22 05:18:34 steve Exp $
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* $Id: opcodes.txt,v 1.63 2005/05/07 03:15:42 steve Exp $
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*/
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@ -100,12 +100,18 @@ index register 0.
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The <var-label> references a .var object that can receive non-blocking
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assignments. For blocking assignments, see %set/v.
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* %assign/v0x1 <var-label>, <delay>, <bit>
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This is similar to the %assign/v0 instruction, but adds the index-1
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index register with the canonical index of the destination where the
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vector is to be written. This allows for part writes into the vector.
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* %assign/wr <vpi-label>, <delay>, <index>
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This instruction causes a non-blocking assign of the indexed value to
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the real object addressed by the <vpi-label> label.
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* %assign/x0 <var-label>, <delay>, <bit>
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* %assign/x0 <var-label>, <delay>, <bit> (OBSOLETE -- See %assign/v0x)
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This does a non-blocking assignment to a functor, similar to the
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%assign instruction. The <var-label> identifies the base functor of
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: schedule.cc,v 1.33 2005/03/06 17:25:03 steve Exp $"
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#ident "$Id: schedule.cc,v 1.34 2005/05/07 03:15:42 steve Exp $"
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#endif
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# include "schedule.h"
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@ -85,15 +85,24 @@ void vthread_event_s::run_run(void)
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}
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struct assign_vector4_event_s : public event_s {
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/* Where to do the assign. */
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vvp_net_ptr_t ptr;
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/* Value to assign. */
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vvp_vector4_t val;
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/* Offset of the part into the destination. */
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unsigned base;
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/* Width of the destination vector. */
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unsigned vwid;
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void run_run(void);
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};
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void assign_vector4_event_s::run_run(void)
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{
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count_assign_events += 1;
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vvp_send_vec4(ptr, val);
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if (vwid > 0)
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vvp_send_vec4_pv(ptr, val, base, val.size(), vwid);
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else
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vvp_send_vec4(ptr, val);
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}
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struct assign_vector8_event_s : public event_s {
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@ -412,6 +421,19 @@ void schedule_vthread(vthread_t thr, vvp_time64_t delay, bool push_flag)
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}
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}
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void schedule_assign_vector(vvp_net_ptr_t ptr,
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unsigned base, unsigned vwid,
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vvp_vector4_t bit,
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vvp_time64_t delay)
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{
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struct assign_vector4_event_s*cur = new struct assign_vector4_event_s;
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cur->ptr = ptr;
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cur->base = base;
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cur->vwid = vwid;
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cur->val = bit;
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schedule_event_(cur, delay, SEQ_NBASSIGN);
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}
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void schedule_assign_vector(vvp_net_ptr_t ptr,
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vvp_vector4_t bit,
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vvp_time64_t delay)
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@ -419,6 +441,8 @@ void schedule_assign_vector(vvp_net_ptr_t ptr,
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struct assign_vector4_event_s*cur = new struct assign_vector4_event_s;
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cur->ptr = ptr;
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cur->val = bit;
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cur->vwid = 0;
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cur->base = 0;
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schedule_event_(cur, delay, SEQ_NBASSIGN);
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}
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@ -439,6 +463,8 @@ void schedule_set_vector(vvp_net_ptr_t ptr, vvp_vector4_t bit)
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struct assign_vector4_event_s*cur = new struct assign_vector4_event_s;
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cur->ptr = ptr;
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cur->val = bit;
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cur->base = 0;
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cur->vwid = 0;
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schedule_event_(cur, 0, SEQ_ACTIVE);
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}
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@ -557,6 +583,9 @@ void schedule_simulate(void)
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/*
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* $Log: schedule.cc,v $
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* Revision 1.34 2005/05/07 03:15:42 steve
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* Implement non-blocking part assign.
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*
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* Revision 1.33 2005/03/06 17:25:03 steve
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* Remove dead code from scheduler.
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*
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@ -19,7 +19,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: schedule.h,v 1.20 2005/03/06 17:07:48 steve Exp $"
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#ident "$Id: schedule.h,v 1.21 2005/05/07 03:15:42 steve Exp $"
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#endif
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# include "vthread.h"
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@ -45,6 +45,11 @@ extern void schedule_vthread(vthread_t thr, vvp_time64_t delay,
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* like a non-blocking assignment. This is in fact mostly used to
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* implement the non-blocking assignment.
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*/
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extern void schedule_assign_vector(vvp_net_ptr_t ptr,
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unsigned base, unsigned vwid,
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vvp_vector4_t val,
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vvp_time64_t delay);
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extern void schedule_assign_vector(vvp_net_ptr_t ptr,
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vvp_vector4_t val,
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vvp_time64_t delay);
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@ -126,6 +131,9 @@ extern unsigned long count_event_pool;
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/*
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* $Log: schedule.h,v $
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* Revision 1.21 2005/05/07 03:15:42 steve
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* Implement non-blocking part assign.
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*
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* Revision 1.20 2005/03/06 17:07:48 steve
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* Non blocking assign to memory words.
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*
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: vthread.cc,v 1.134 2005/05/01 22:05:21 steve Exp $"
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#ident "$Id: vthread.cc,v 1.135 2005/05/07 03:15:42 steve Exp $"
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#endif
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# include "config.h"
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@ -574,6 +574,33 @@ bool of_ASSIGN_V0(vthread_t thr, vvp_code_t cp)
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return true;
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}
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/*
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* This is %assign/v0/x1 <label>, <delay>, <bit>
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* Index register 0 contains a vector part width.
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* Index register 1 contains the offset into the destination vector.
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*/
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bool of_ASSIGN_V0X1(vthread_t thr, vvp_code_t cp)
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{
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unsigned wid = thr->words[0].w_int;
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unsigned off = thr->words[1].w_int;
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unsigned delay = cp->bit_idx[0];
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unsigned bit = cp->bit_idx[1];
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vvp_fun_signal*sig = reinterpret_cast<vvp_fun_signal*> (cp->net->fun);
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assert(sig);
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assert(wid > 0);
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if (off >= sig->size())
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return true;
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vvp_vector4_t value = vthread_bits_to_vector(thr, bit, wid);
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vvp_net_ptr_t ptr (cp->net, 0);
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schedule_assign_vector(ptr, off, sig->size(), value, delay);
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return true;
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}
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/*
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* This is %assign/wr <vpi-label>, <delay>, <index>
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*
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@ -3152,6 +3179,9 @@ bool of_JOIN_UFUNC(vthread_t thr, vvp_code_t cp)
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/*
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* $Log: vthread.cc,v $
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* Revision 1.135 2005/05/07 03:15:42 steve
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* Implement non-blocking part assign.
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*
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* Revision 1.134 2005/05/01 22:05:21 steve
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* Add cassign/link instruction.
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*
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