Implement non-blocking part assign.

This commit is contained in:
steve 2005-05-07 03:15:42 +00:00
parent f6da64e2ec
commit 5277124c76
6 changed files with 89 additions and 8 deletions

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@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/ */
#ifdef HAVE_CVS_IDENT #ifdef HAVE_CVS_IDENT
#ident "$Id: codes.h,v 1.71 2005/05/01 22:05:21 steve Exp $" #ident "$Id: codes.h,v 1.72 2005/05/07 03:15:42 steve Exp $"
#endif #endif
@ -44,6 +44,7 @@ extern bool of_ASSIGN_D(vthread_t thr, vvp_code_t code);
extern bool of_ASSIGN_MEM(vthread_t thr, vvp_code_t code); extern bool of_ASSIGN_MEM(vthread_t thr, vvp_code_t code);
extern bool of_ASSIGN_MV(vthread_t thr, vvp_code_t code); extern bool of_ASSIGN_MV(vthread_t thr, vvp_code_t code);
extern bool of_ASSIGN_V0(vthread_t thr, vvp_code_t code); extern bool of_ASSIGN_V0(vthread_t thr, vvp_code_t code);
extern bool of_ASSIGN_V0X1(vthread_t thr, vvp_code_t code);
extern bool of_ASSIGN_WR(vthread_t thr, vvp_code_t code); extern bool of_ASSIGN_WR(vthread_t thr, vvp_code_t code);
extern bool of_ASSIGN_X0(vthread_t thr, vvp_code_t code); extern bool of_ASSIGN_X0(vthread_t thr, vvp_code_t code);
extern bool of_BLEND(vthread_t thr, vvp_code_t code); extern bool of_BLEND(vthread_t thr, vvp_code_t code);
@ -172,6 +173,9 @@ extern vvp_code_t codespace_null(void);
/* /*
* $Log: codes.h,v $ * $Log: codes.h,v $
* Revision 1.72 2005/05/07 03:15:42 steve
* Implement non-blocking part assign.
*
* Revision 1.71 2005/05/01 22:05:21 steve * Revision 1.71 2005/05/01 22:05:21 steve
* Add cassign/link instruction. * Add cassign/link instruction.
* *

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@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/ */
#ifdef HAVE_CVS_IDENT #ifdef HAVE_CVS_IDENT
#ident "$Id: compile.cc,v 1.199 2005/05/01 22:05:21 steve Exp $" #ident "$Id: compile.cc,v 1.200 2005/05/07 03:15:42 steve Exp $"
#endif #endif
# include "arith.h" # include "arith.h"
@ -91,6 +91,7 @@ const static struct opcode_table_s opcode_table[] = {
{ "%assign/m",of_ASSIGN_MEM,3,{OA_MEM_PTR,OA_BIT1, OA_BIT2} }, { "%assign/m",of_ASSIGN_MEM,3,{OA_MEM_PTR,OA_BIT1, OA_BIT2} },
{ "%assign/mv",of_ASSIGN_MV,3,{OA_MEM_PTR,OA_BIT1, OA_BIT2} }, { "%assign/mv",of_ASSIGN_MV,3,{OA_MEM_PTR,OA_BIT1, OA_BIT2} },
{ "%assign/v0",of_ASSIGN_V0,3,{OA_FUNC_PTR,OA_BIT1, OA_BIT2} }, { "%assign/v0",of_ASSIGN_V0,3,{OA_FUNC_PTR,OA_BIT1, OA_BIT2} },
{ "%assign/v0/x1",of_ASSIGN_V0X1,3,{OA_FUNC_PTR,OA_BIT1,OA_BIT2} },
{ "%assign/wr",of_ASSIGN_WR,3,{OA_VPI_PTR,OA_BIT1, OA_BIT2} }, { "%assign/wr",of_ASSIGN_WR,3,{OA_VPI_PTR,OA_BIT1, OA_BIT2} },
{ "%assign/x0",of_ASSIGN_X0,3,{OA_FUNC_PTR,OA_BIT1, OA_BIT2} }, { "%assign/x0",of_ASSIGN_X0,3,{OA_FUNC_PTR,OA_BIT1, OA_BIT2} },
{ "%blend", of_BLEND, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} }, { "%blend", of_BLEND, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
@ -1525,6 +1526,9 @@ void compile_param_string(char*label, char*name, char*str, char*value)
/* /*
* $Log: compile.cc,v $ * $Log: compile.cc,v $
* Revision 1.200 2005/05/07 03:15:42 steve
* Implement non-blocking part assign.
*
* Revision 1.199 2005/05/01 22:05:21 steve * Revision 1.199 2005/05/01 22:05:21 steve
* Add cassign/link instruction. * Add cassign/link instruction.
* *

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@ -1,7 +1,7 @@
/* /*
* Copyright (c) 2001-2003 Stephen Williams (steve@icarus.com) * Copyright (c) 2001-2003 Stephen Williams (steve@icarus.com)
* *
* $Id: opcodes.txt,v 1.62 2005/03/22 05:18:34 steve Exp $ * $Id: opcodes.txt,v 1.63 2005/05/07 03:15:42 steve Exp $
*/ */
@ -100,12 +100,18 @@ index register 0.
The <var-label> references a .var object that can receive non-blocking The <var-label> references a .var object that can receive non-blocking
assignments. For blocking assignments, see %set/v. assignments. For blocking assignments, see %set/v.
* %assign/v0x1 <var-label>, <delay>, <bit>
This is similar to the %assign/v0 instruction, but adds the index-1
index register with the canonical index of the destination where the
vector is to be written. This allows for part writes into the vector.
* %assign/wr <vpi-label>, <delay>, <index> * %assign/wr <vpi-label>, <delay>, <index>
This instruction causes a non-blocking assign of the indexed value to This instruction causes a non-blocking assign of the indexed value to
the real object addressed by the <vpi-label> label. the real object addressed by the <vpi-label> label.
* %assign/x0 <var-label>, <delay>, <bit> * %assign/x0 <var-label>, <delay>, <bit> (OBSOLETE -- See %assign/v0x)
This does a non-blocking assignment to a functor, similar to the This does a non-blocking assignment to a functor, similar to the
%assign instruction. The <var-label> identifies the base functor of %assign instruction. The <var-label> identifies the base functor of

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@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/ */
#ifdef HAVE_CVS_IDENT #ifdef HAVE_CVS_IDENT
#ident "$Id: schedule.cc,v 1.33 2005/03/06 17:25:03 steve Exp $" #ident "$Id: schedule.cc,v 1.34 2005/05/07 03:15:42 steve Exp $"
#endif #endif
# include "schedule.h" # include "schedule.h"
@ -85,15 +85,24 @@ void vthread_event_s::run_run(void)
} }
struct assign_vector4_event_s : public event_s { struct assign_vector4_event_s : public event_s {
/* Where to do the assign. */
vvp_net_ptr_t ptr; vvp_net_ptr_t ptr;
/* Value to assign. */
vvp_vector4_t val; vvp_vector4_t val;
/* Offset of the part into the destination. */
unsigned base;
/* Width of the destination vector. */
unsigned vwid;
void run_run(void); void run_run(void);
}; };
void assign_vector4_event_s::run_run(void) void assign_vector4_event_s::run_run(void)
{ {
count_assign_events += 1; count_assign_events += 1;
vvp_send_vec4(ptr, val); if (vwid > 0)
vvp_send_vec4_pv(ptr, val, base, val.size(), vwid);
else
vvp_send_vec4(ptr, val);
} }
struct assign_vector8_event_s : public event_s { struct assign_vector8_event_s : public event_s {
@ -412,6 +421,19 @@ void schedule_vthread(vthread_t thr, vvp_time64_t delay, bool push_flag)
} }
} }
void schedule_assign_vector(vvp_net_ptr_t ptr,
unsigned base, unsigned vwid,
vvp_vector4_t bit,
vvp_time64_t delay)
{
struct assign_vector4_event_s*cur = new struct assign_vector4_event_s;
cur->ptr = ptr;
cur->base = base;
cur->vwid = vwid;
cur->val = bit;
schedule_event_(cur, delay, SEQ_NBASSIGN);
}
void schedule_assign_vector(vvp_net_ptr_t ptr, void schedule_assign_vector(vvp_net_ptr_t ptr,
vvp_vector4_t bit, vvp_vector4_t bit,
vvp_time64_t delay) vvp_time64_t delay)
@ -419,6 +441,8 @@ void schedule_assign_vector(vvp_net_ptr_t ptr,
struct assign_vector4_event_s*cur = new struct assign_vector4_event_s; struct assign_vector4_event_s*cur = new struct assign_vector4_event_s;
cur->ptr = ptr; cur->ptr = ptr;
cur->val = bit; cur->val = bit;
cur->vwid = 0;
cur->base = 0;
schedule_event_(cur, delay, SEQ_NBASSIGN); schedule_event_(cur, delay, SEQ_NBASSIGN);
} }
@ -439,6 +463,8 @@ void schedule_set_vector(vvp_net_ptr_t ptr, vvp_vector4_t bit)
struct assign_vector4_event_s*cur = new struct assign_vector4_event_s; struct assign_vector4_event_s*cur = new struct assign_vector4_event_s;
cur->ptr = ptr; cur->ptr = ptr;
cur->val = bit; cur->val = bit;
cur->base = 0;
cur->vwid = 0;
schedule_event_(cur, 0, SEQ_ACTIVE); schedule_event_(cur, 0, SEQ_ACTIVE);
} }
@ -557,6 +583,9 @@ void schedule_simulate(void)
/* /*
* $Log: schedule.cc,v $ * $Log: schedule.cc,v $
* Revision 1.34 2005/05/07 03:15:42 steve
* Implement non-blocking part assign.
*
* Revision 1.33 2005/03/06 17:25:03 steve * Revision 1.33 2005/03/06 17:25:03 steve
* Remove dead code from scheduler. * Remove dead code from scheduler.
* *

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@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/ */
#ifdef HAVE_CVS_IDENT #ifdef HAVE_CVS_IDENT
#ident "$Id: schedule.h,v 1.20 2005/03/06 17:07:48 steve Exp $" #ident "$Id: schedule.h,v 1.21 2005/05/07 03:15:42 steve Exp $"
#endif #endif
# include "vthread.h" # include "vthread.h"
@ -45,6 +45,11 @@ extern void schedule_vthread(vthread_t thr, vvp_time64_t delay,
* like a non-blocking assignment. This is in fact mostly used to * like a non-blocking assignment. This is in fact mostly used to
* implement the non-blocking assignment. * implement the non-blocking assignment.
*/ */
extern void schedule_assign_vector(vvp_net_ptr_t ptr,
unsigned base, unsigned vwid,
vvp_vector4_t val,
vvp_time64_t delay);
extern void schedule_assign_vector(vvp_net_ptr_t ptr, extern void schedule_assign_vector(vvp_net_ptr_t ptr,
vvp_vector4_t val, vvp_vector4_t val,
vvp_time64_t delay); vvp_time64_t delay);
@ -126,6 +131,9 @@ extern unsigned long count_event_pool;
/* /*
* $Log: schedule.h,v $ * $Log: schedule.h,v $
* Revision 1.21 2005/05/07 03:15:42 steve
* Implement non-blocking part assign.
*
* Revision 1.20 2005/03/06 17:07:48 steve * Revision 1.20 2005/03/06 17:07:48 steve
* Non blocking assign to memory words. * Non blocking assign to memory words.
* *

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@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/ */
#ifdef HAVE_CVS_IDENT #ifdef HAVE_CVS_IDENT
#ident "$Id: vthread.cc,v 1.134 2005/05/01 22:05:21 steve Exp $" #ident "$Id: vthread.cc,v 1.135 2005/05/07 03:15:42 steve Exp $"
#endif #endif
# include "config.h" # include "config.h"
@ -574,6 +574,33 @@ bool of_ASSIGN_V0(vthread_t thr, vvp_code_t cp)
return true; return true;
} }
/*
* This is %assign/v0/x1 <label>, <delay>, <bit>
* Index register 0 contains a vector part width.
* Index register 1 contains the offset into the destination vector.
*/
bool of_ASSIGN_V0X1(vthread_t thr, vvp_code_t cp)
{
unsigned wid = thr->words[0].w_int;
unsigned off = thr->words[1].w_int;
unsigned delay = cp->bit_idx[0];
unsigned bit = cp->bit_idx[1];
vvp_fun_signal*sig = reinterpret_cast<vvp_fun_signal*> (cp->net->fun);
assert(sig);
assert(wid > 0);
if (off >= sig->size())
return true;
vvp_vector4_t value = vthread_bits_to_vector(thr, bit, wid);
vvp_net_ptr_t ptr (cp->net, 0);
schedule_assign_vector(ptr, off, sig->size(), value, delay);
return true;
}
/* /*
* This is %assign/wr <vpi-label>, <delay>, <index> * This is %assign/wr <vpi-label>, <delay>, <index>
* *
@ -3152,6 +3179,9 @@ bool of_JOIN_UFUNC(vthread_t thr, vvp_code_t cp)
/* /*
* $Log: vthread.cc,v $ * $Log: vthread.cc,v $
* Revision 1.135 2005/05/07 03:15:42 steve
* Implement non-blocking part assign.
*
* Revision 1.134 2005/05/01 22:05:21 steve * Revision 1.134 2005/05/01 22:05:21 steve
* Add cassign/link instruction. * Add cassign/link instruction.
* *