Use ivl_signal_dimensions to find arrays not ivl_signal_array_count

ivl_signal_dimensions() is the correct call to use to determine
if a signal is part of an array. If it is greater than zero the
signal is an array.

tgt-vvp/draw_net_input.c

@@ -315,7 +315,7 @@ static char* draw_net_input_drive(ivl_nexus_t nex, ivl_nexus_ptr_t nptr)
 	         because it may be an array of reg vectors. */
 	    snprintf(tmp, sizeof tmp, "v%p_%u", sptr, nptr_pin);
 
-	    if (ivl_signal_array_count(sptr) > 1) {
+	    if (ivl_signal_dimensions(sptr) > 0) {
 		  fprintf(vvp_out, "v%p_%u .array/port v%p, %u;\n",
 			  sptr, nptr_pin, sptr, nptr_pin);
 	    }

tgt-vvp/draw_ufunc.c

@@ -30,7 +30,7 @@ static void function_argument_logic(ivl_signal_t port, ivl_expr_t exp)
       struct vector_info res;
 
 	/* ports cannot be arrays. */
-      assert(ivl_signal_array_count(port) == 1);
+      assert(ivl_signal_dimensions(port) == 0);
 
       res = draw_eval_expr_wid(exp, ivl_signal_width(port), 0);
         /* We could have extra bits so only select the ones we need. */
@@ -46,7 +46,7 @@ static void function_argument_real(ivl_signal_t port, ivl_expr_t exp)
       int res = draw_eval_real(exp);
 
 	/* ports cannot be arrays. */
-      assert(ivl_signal_array_count(port) == 1);
+      assert(ivl_signal_dimensions(port) == 0);
 
       fprintf(vvp_out, "   %%set/wr v%p_0, %d;\n", port, res);
       clr_word(res);
@@ -126,7 +126,7 @@ struct vector_info draw_ufunc_expr(ivl_expr_t exp, unsigned wid)
       if (load_wid > ivl_signal_width(retval))
 	    load_wid = ivl_signal_width(retval);
 
-      assert(ivl_signal_array_count(retval) == 1);
+      assert(ivl_signal_dimensions(retval) == 0);
       fprintf(vvp_out, "    %%load/v  %u, v%p_0, %u;\n",
 	      res.base, retval, load_wid);
 
@@ -157,7 +157,7 @@ int draw_ufunc_real(ivl_expr_t exp)
       fprintf(vvp_out, "   %%join;\n");
 
 	/* Return value signal cannot be an array. */
-      assert(ivl_signal_array_count(retval) == 1);
+      assert(ivl_signal_dimensions(retval) == 0);
 
 	/* Load the result into a word. */
       res = allocate_word();

tgt-vvp/eval_real.c

@@ -326,7 +326,7 @@ static int draw_signal_real_real(ivl_expr_t exp)
       int res = allocate_word();
       unsigned long word = 0;
 
-      if (ivl_signal_array_count(sig) > 1) {
+      if (ivl_signal_dimensions(sig) > 0) {
 	    ivl_expr_t ix = ivl_expr_oper1(exp);
 	    if (!number_is_immediate(ix, 8*sizeof(word), 0)) {
 		    /* XXXX Need to generate a %load/ar instruction. */

tgt-vvp/vvp_process.c

@@ -235,7 +235,7 @@ static void assign_to_array_word(ivl_signal_t lsig, ivl_expr_t word_ix,
       if (dexp == 0) {
 	      /* Constant delay... */
 	    if (number_is_immediate(word_ix, 64, 0)) {
-		  fprintf(vvp_out, "   %%ix/load 3, %lu; address\n",
+		  fprintf(vvp_out, "    %%ix/load 3, %lu; address\n",
 			  get_number_immediate(word_ix));
 	    } else {
 		    /* Calculate array word index into index register 3 */
@@ -298,7 +298,7 @@ static void assign_to_lvector(ivl_lval_t lval, unsigned bit,
       ivl_expr_t word_ix = ivl_lval_idx(lval);
       const unsigned long use_word = 0;
 
-      if (ivl_signal_array_count(sig) > 1) {
+      if (ivl_signal_dimensions(sig) > 0) {
 	    assert(word_ix);
 	    assign_to_array_word(sig, word_ix, bit, delay, dexp, part_off_ex, width);
 	    return;
@@ -480,7 +480,7 @@ static int show_stmt_assign_sig_real(ivl_statement_t net)
       var = ivl_lval_sig(lval);
       assert(var != 0);
 
-      assert(ivl_signal_array_count(var) == 1);
+      assert(ivl_signal_dimensions(var) == 0);
 
       fprintf(vvp_out, "    %%set/wr v%p_0, %d;\n", var, res);
 
@@ -540,7 +540,7 @@ static int show_stmt_assign_nb_real(ivl_statement_t net)
       sig = ivl_lval_sig(lval);
       assert(sig);
  
-      if (ivl_signal_array_count(sig) > 1) {
+      if (ivl_signal_dimensions(sig) > 0) {
 	    word_ix = ivl_lval_idx(lval);
 	    assert(word_ix);
 	    assert(number_is_immediate(word_ix, 8*sizeof(use_word), 0));
@@ -1013,7 +1013,7 @@ static void force_link_rval(ivl_statement_t net, ivl_expr_t rval)
 	    use_rword = get_number_immediate(rword_idx);
       }
 
-      assert(ivl_signal_array_count(rsig) == 1);
+      assert(ivl_signal_dimensions(rsig) == 0);
       use_rword = 0;
 
       fprintf(vvp_out, "    %s/link", command_name);

tgt-vvp/vvp_scope.c

@@ -879,15 +879,15 @@ static void draw_logic_in_scope(ivl_net_logic_t lptr)
 		  fprintf(vvp_out, "L_%p .delay  L_%p/d", lptr, lptr);
 
 		  sig = ivl_expr_signal(rise_exp);
-		  assert(ivl_signal_array_count(sig) == 1);
+		  assert(ivl_signal_dimensions(sig) == 0);
 		  fprintf(vvp_out, ", v%p_0", sig);
 
 		  sig = ivl_expr_signal(fall_exp);
-		  assert(ivl_signal_array_count(sig) == 1);
+		  assert(ivl_signal_dimensions(sig) == 0);
 		  fprintf(vvp_out, ", v%p_0", sig);
 
 		  sig = ivl_expr_signal(decay_exp);
-		  assert(ivl_signal_array_count(sig) == 1);
+		  assert(ivl_signal_dimensions(sig) == 0);
 		  fprintf(vvp_out, ", v%p_0;\n", sig);
 	    }
       }
@@ -1564,7 +1564,7 @@ static void draw_lpm_ufunc(ivl_lpm_t net)
 	    else
 		  fprintf(vvp_out, ", ");
 
-	    assert(ivl_signal_array_count(psig) == 1);
+	    assert(ivl_signal_dimensions(psig) == 0);
 	    fprintf(vvp_out, "v%p_0", psig);
       }
 
@@ -1574,7 +1574,7 @@ static void draw_lpm_ufunc(ivl_lpm_t net)
 	   result is collected. */
       { ivl_signal_t psig = ivl_scope_port(def, 0);
         assert(ivl_lpm_width(net) == ivl_signal_width(psig));
-	assert(ivl_signal_array_count(psig) == 1);
+	assert(ivl_signal_dimensions(psig) == 0);
 
 	fprintf(vvp_out, " v%p_0", psig);
       }