UVM track: seed uvm/, docs, and hello_uvm example

Standalone muhammadjawadkhan/iverilog-uvm project setup. Documents
that this fork is experimental and must not PR UVM work to
steveicarus/iverilog. Seeds uvm/ from IVL_UVM and adds roadmap/status
workflow docs plus a smoke example.
This commit is contained in:
mjoekhan 2026-07-21 16:14:00 +05:00
parent a4989d023d
commit 4fc765f912
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# The ICARUS Verilog Compilation System
> **This repository is `muhammadjawadkhan/iverilog-uvm` — an experimental
> UVM / SystemVerilog track.** It is **not** for production use and is **not**
> an official Accellera UVM port. **Do not open pull requests to
> [steveicarus/iverilog](https://github.com/steveicarus/iverilog) for UVM work
> on this fork.** See [UVM_README.md](UVM_README.md), [docs/ROADMAP.md](docs/ROADMAP.md),
> and [docs/WORKFLOW.md](docs/WORKFLOW.md).
Copyright 2000-2026 Stephen Williams
<details>

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# Icarus Verilog — UVM Experimental Track
> **Experimental / research project.** Not for production or tapeout.
> This is **not** an official Accellera UVM port.
> **Do not open pull requests to [steveicarus/iverilog](https://github.com/steveicarus/iverilog) for this UVM track.**
This repository is `muhammadjawadkhan/iverilog-uvm`: a full Icarus Verilog tree plus a UVM-oriented layer under [`uvm/`](uvm/) and a feature roadmap under [`docs/`](docs/).
| Remote | Role |
|--------|------|
| `origin` | `muhammadjawadkhan/iverilog-uvm` (push here) |
| `upstream` | `steveicarus/iverilog` (**fetch/merge only** — never PR UVM work there) |
## Quick links
- [docs/ROADMAP.md](docs/ROADMAP.md) — SV/UVM features to add one by one
- [docs/STATUS.md](docs/STATUS.md) — what works today
- [docs/WORKFLOW.md](docs/WORKFLOW.md) — branch / PR rules for this fork
- [examples/hello_uvm](examples/hello_uvm) — smoke example using `uvm/`
- Upstream Icarus build docs: see [README.md](README.md)
## Goal
Grow SystemVerilog compiler support and a UVM-like / Accellera-shaped library **in this fork only**, feature by feature, until larger slices of UVM 1.2 become viable.

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# Feature roadmap (one-by-one)
Each item should be a dedicated `feat/<name>` branch, with tests/examples and a STATUS.md update. Merge only into this forks default branch (`master`).
## Tier A — Compiler SV foundations (block Accellera UVM)
1. **Parameterized classes**`class C #(type T = int);` / `C#(byte)` — needed for `uvm_*#(T)`, `config_db`
2. **Associative arrays**`int aa[string];`
3. **Virtual interfaces** + eventing on `vif.clk`
4. **Clocking blocks** — enough for `@(vif.cb)`
5. **`mailbox` / `semaphore` builtins** (or solid class equivalents with blocking put/get)
6. **Constraints + `randomize()` / `randomize() with`** — start unconstrained `rand`, then solver
7. **`$cast` / `$typename` hardening** for factory patterns
8. **Covergroups** — functional coverage
9. **DPI-C** — optional but common in real flows
## Tier B — Library / methodology (on top of Tier A)
10. Grow [`uvm/`](../uvm/) toward Accellera-shaped APIs: reporting, phases/objections, factory, `config_db`, TLM, sequences
11. Smoke: trimmed “hello UVM”, then larger Accellera UVM 1.2 slices as features land
## Already usable baseline (do not re-do first)
Classes, packages, strings, queues/dynamic arrays, locators/reductions/ordering, chained calls — extend only when a UVM example needs a gap.
## Out of scope
- Claiming “UVM 1.2 supported” until Accelleras library compiles and runs
- Opening PRs to `steveicarus/iverilog` for this track (see [WORKFLOW.md](WORKFLOW.md))

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# Status
Last updated: 2026-07-21
## Accellera UVM 1.2
**Not supported.** Official Accellera UVM will not compile on stock Icarus or on this fork yet.
## This fork
| Area | Status |
|------|--------|
| Icarus Verilog tree | Fork of `steveicarus/iverilog` (`master` @ merge of SV array ordering work) |
| [`uvm/`](../uvm/) | Seeded from IVL_UVM (VerifWorks) — messaging, CLP, stub phases, poor-mans mailbox/semaphore; **not** Accellera-compatible |
| [`examples/hello_uvm`](../examples/hello_uvm) | Smoke TB for the seeded library |
| Parameterized classes | **In progress** on `feat/param-classes` |
| Associative arrays | Missing |
| Virtual interfaces | Missing |
| Constraints / randomize | Missing |
| Covergroups / DPI | Missing |
## Remotes
- `origin` → https://github.com/muhammadjawadkhan/iverilog-uvm
- `upstream` → https://github.com/steveicarus/iverilog (fetch only for this track)

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# Workflow (this fork only)
## Remotes
```bash
git remote -v
# origin https://github.com/muhammadjawadkhan/iverilog-uvm.git
# upstream https://github.com/steveicarus/iverilog.git
```
## Do
- Push branches to **`origin`** (`muhammadjawadkhan/iverilog-uvm`)
- Open PRs against **this forks** `master` (or `development` if created later)
- Use one feature per branch: `feat/param-classes`, `feat/assoc-array`, …
- Optionally `git fetch upstream` and merge upstream bugfixes into this fork
- Update [STATUS.md](STATUS.md) when a feature lands
## Do not
- Open PRs to **`steveicarus/iverilog`** for UVM / this tracks compiler work
- Mix UVM commits into unrelated upstream contribution branches on other remotes
- Claim full UVM 1.2 support prematurely
## Example
```bash
git checkout master
git pull origin master
git checkout -b feat/param-classes
# ... work ...
git push -u origin feat/param-classes
gh pr create --repo muhammadjawadkhan/iverilog-uvm --base master --head feat/param-classes
```

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+timescale+1ns/10ps
+incdir+${IVL_UVM_HOME}/ivl_uvm_src
${IVL_UVM_HOME}/ivl_uvm_src/ivl_uvm_pkg.sv
hello_uvm.sv
${IVL_UVM_HOME}/ivl_uvm_src/ivl_uvm_top.svh

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// Minimal smoke test for the seeded uvm/ (IVL_UVM) library.
// Not Accellera UVM — exercises messaging + run_test only.
module hello_uvm;
import ivl_uvm_pkg::*;
initial begin
run_test();
end
initial begin
#10;
`uvm_info("HELLO", "hello_uvm smoke: UVM_MEDIUM", UVM_MEDIUM)
`uvm_info("HELLO", "hello_uvm smoke: done", UVM_NONE)
#10;
$finish;
end
endmodule

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# `uvm/` in this fork
This directory is seeded from the [IVL_UVM](https://github.com/) / VerifWorks-style lightweight UVM layer (see nested `README.md`).
It is **not** Accellera UVM 1.2. Paths that used `IVL_UVM_HOME` still apply; for this repo set:
```bash
export IVL_UVM_HOME=/path/to/iverilog-uvm/uvm
```
See [../examples/hello_uvm](../examples/hello_uvm) and [../docs/ROADMAP.md](../docs/ROADMAP.md).

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# Welcome to *IVL_UVM* project
It is a humble attempt to implement some of the basic UVM features on open-source Icarus Verilog simulator and eventually port it to Verilator as well.
Given the light-weight support of SystemVerilog by Icarus as of Dec 2020, IVL_UVM code base is also very rudimentary compared to Accellera UVM implementation. We hope to continue enhancing it as and when the Icarus SV support improves.
It is very important to note that current support is *very, very limited* and is just a start. We have staretd with:
* Basic Messaging support
* Command Line Processor features
* UVM Test feature
Feel free to try it out and send constructive comments via Discussion forum/Issues. Any inappropriate comments shall be deleted without any notice whatsoever.
As of now, IVL_UVM runs on latest/development build of Icarus (and NOT the stable v11.0 branch). Should you need the v11.0 support, feel free to raise a request, we will see if that is doable.
## Setup
Please ensure to setup IVL_UVM path via the setup.csh, in CSH/TCSH do:
* source setup.csh
Many scripts/Makefiles refer to an env-variable that's set via this setup file.
To run basic tests, do:
* cd ivl_uvm_regress/run_dir
* make vw0
* make vw1
* make vw2
Thanks for trying this IVL_UVM code base.
## ABV support via OVL
Assertion Based Verificaiton (ABV) is a powerful technique used by both RTL designers and Verification engineers. Accellera OVL (Open Verificaiton Library) was developed to provide a set of ready-to-use library elements with assertions for common elements/behaviors. We now comppiled OVL with Icarus and did some small clean-up in this release. Further TODOs are below:
* Integrate UVM reporting
* Tighter controf of MAX_QUIT_COUNT in more-UVM-like manner (than compile time in old OVL)
* Better debug
To run simple OVL demo, do:
* cd ivl_uvm_tests/ivl_uvm_ovl_demo/ivl_uvm_ovl_alw
* make
Cheers

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import os
import sys
import fileinput
import shutil
import glob
import argparse
textToclass = "class "
textToendclass = "endclass"
textToVirclass = "virtual class "
parser = argparse.ArgumentParser()
parser.add_argument('-i', required=True)
args = parser.parse_args()
fileToSearch = args.i
File = open( fileToSearch , 'r+' )
tempFile = open ('tmp.svh','w+')
num_c = 0
for line in fileinput.input( fileToSearch ):
rec = line.strip()
if rec.startswith(textToclass) :
#print('Match Found')
tempFile.write(line)
tempFile.write("`ifndef IVL_UVM\n")
elif rec.startswith(textToVirclass) :
#print('Match Found')
tempFile.write(line)
tempFile.write("`ifndef IVL_UVM\n")
elif textToendclass in line:
tempFile.write("`endif // IVL_UVM \n")
tempFile.write(line)
num_c += 1
else :
tempFile.write(line)
print 'Fixed: ', num_c, ' classes for IVLOG'
File.close()
tempFile.close()

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// Mailbox via Q
//
module ivl_uvm_mbx; // #(parameter type T = int) ();
int mbx_via_q [$];
int q_size;
int my_q[$];
initial begin
#1;
// $display ("Type: ", $typename(my_q));
end
task put (input int ival);
mbx_via_q.push_back (ival);
q_size = mbx_via_q.size();
endtask : put
task get (output int oval);
// IVL Bug 412 wait (mbx_via_q.size() > 0);
wait (q_size > 0);
$display ("MBX: Size: %0d", mbx_via_q.size());
oval = mbx_via_q.pop_front ();
q_size = mbx_via_q.size();
$display ("MBX: Size: %0d", mbx_via_q.size());
endtask : get
endmodule : ivl_uvm_mbx
module m;
ivl_uvm_mbx mbx_0 ();
// ivl_uvm_mbx #(real) mbx_1 ();
int pval,gval;
initial begin
pval = $random();
mbx_0.put(pval);
mbx_0.get(gval);
$display ("put: 0x%0h get: 0x%0h", pval, gval);
end
endmodule : m

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// Mailbox via Q
//
module ivl_uvm_mbx #(parameter type T = int) ();
int mbx_via_q [$];
int q_size;
T my_q[$];
initial begin
#1;
$display ("Type: ", $typename(T));
end
task put (input int ival);
mbx_via_q.push_back (ival);
q_size = mbx_via_q.size();
endtask : put
task get (output int oval);
// IVL Bug 412 wait (mbx_via_q.size() > 0);
wait (q_size > 0);
$display ("MBX: Size: %0d", mbx_via_q.size());
oval = mbx_via_q.pop_front ();
q_size = mbx_via_q.size();
$display ("MBX: Size: %0d", mbx_via_q.size());
endtask : get
endmodule : ivl_uvm_mbx
module m;
ivl_uvm_mbx mbx_0 ();
ivl_uvm_mbx #(real) mbx_1 ();
int pval,gval;
initial begin
pval = $random();
mbx_0.put(pval);
mbx_0.get(gval);
$display ("put: 0x%0h get: 0x%0h", pval, gval);
end
endmodule : m

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../ivl_mbx_via_q.sv

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module ivl_plusargs;
string var1, var2, var3, var4, var5, var6, var7, var8, var9;
// Written by Anirudh.
initial begin
$display ("Initializing.....");
if ($value$plusargs ("UVM_DUMP_CMDLINE_ARGS=%s", var1))
$display ("STRING with UVM_DUMP_CMDLINE_ARGS has a value %s", var1);
if ($value$plusargs ("UVM_TESTNAME=%s", var2))
$display ("STRING with UVM_TESTNAME has a value %s", var2);
if ($value$plusargs ("UVM_VERBOSITY=%s", var3))
$display ("STRING with UVM_VERBOSITY has a value %s", var3);
if ($value$plusargs ("UVM_TIMEOUT=%s", var4))
$display ("STRING with UVM_TIMEOUT has a value %s", var4);
if ($value$plusargs ("UVM_MAX_QUIT_COUNT=%s", var5))
$display ("STRING with UVM_MAX_QUIT_COUNT has a value %s", var5);
if ($value$plusargs ("UVM_PHASE_TRACE=%s", var6))
$display ("STRING with UVM_PHASE_TRACE has a value %s", var6);
if ($value$plusargs ("UVM_OBJECTION_TRACE=%s", var7))
$display ("STRING with UVM_OBJECTION_TRACE has a value %s", var7);
if ($value$plusargs ("UVM_RESOURCE_DB_TRACE=%s", var8))
$display ("STRING with UVM_RESOURCE_DB_TRACE has a value %s", var8);
if ($value$plusargs ("UVM_CONFIG_DB_TRACE=%s", var9))
$display ("STRING with UVM_CONFIG_DB_TRACE has a value %s", var9);
end
endmodule : ivl_plusargs

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`ifndef UVM_TESTNAME
`define UVM_TESTNAME ivl_uvm_base_test
`endif // UVM_TESTNAME
package test_pkg;
class uvm_component;
endclass : uvm_component
virtual class ivl_uvm_base_test extends uvm_component;
function new (string name="ivl_uvm_base_test",
uvm_component parent = null);
endfunction : new
virtual task run_phase ();
$display ("%m run_phase");
endtask : run_phase
endclass : ivl_uvm_base_test
class my_test extends ivl_uvm_base_test;
function new (string name="my_test",
uvm_component parent = null);
super.new (name, parent);
endfunction : new
virtual task run_phase ();
$display ("%m run_phase");
endtask : run_phase
endclass : my_test
`UVM_TESTNAME uvm_test_top;
task run_test ();
uvm_test_top = new();
uvm_test_top.run_phase ();
endtask : run_test
endpackage : test_pkg
module m;
import test_pkg::*;
initial begin
run_test ();
end
endmodule : m

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virtual class uvm_void;
function new();
$display("%m");
endfunction : new
endclass : uvm_void
class uvm_object extends uvm_void;
function new();
$display("%m");
endfunction : new
endclass : uvm_object
class uvm_transaction extends uvm_object;
function new();
$display("%m");
endfunction : new
endclass : uvm_transaction
class uvm_sequence_item extends uvm_transaction;
function new();
$display("%m");
endfunction : new
endclass : uvm_sequence_item
class uvm_sequence_base extends uvm_sequence_item;
function new();
$display("%m");
endfunction : new
endclass : uvm_sequence_base
class uvm_report_object extends uvm_object;
function new();
$display("%m");
endfunction : new
endclass : uvm_report_object
class uvm_component extends uvm_report_object;
function new();
$display("%m");
endfunction : new
endclass : uvm_component
class uvm_subscriber extends uvm_component;
function new();
$display("%m");
endfunction : new
endclass : uvm_subscriber
class uvm_env extends uvm_component;
function new();
$display("%m");
endfunction : new
endclass : uvm_env
class uvm_test extends uvm_component;
function new();
$display("%m");
endfunction : new
endclass : uvm_test
class uvm_driver extends uvm_component;
function new();
$display("%m");
endfunction : new
endclass : uvm_driver
class uvm_monitor extends uvm_component;
function new();
$display("%m");
endfunction : new
endclass : uvm_monitor
class uvm_scoreboard extends uvm_component;
function new();
$display("%m");
endfunction : new
endclass : uvm_scoreboard
class uvm_agent extends uvm_component;
function new();
$display("%m");
endfunction : new
endclass : uvm_agent
class uvm_sequencer extends uvm_component;
function new();
$display("%m");
endfunction : new
endclass : uvm_sequencer
module top;
uvm_component comp0;
initial begin : test_uvm
comp0 = new();
$display ("Booting up IVL_UVM ...");
end : test_uvm
uvm_sequence_base seq0;
initial begin : seq_uvm
seq0 = new();
$display ("Booting up Class Hierachy ...");
end : seq_uvm
uvm_sequencer sequencer0;
initial begin : sequencer_uvm
sequencer0 = new();
$display ("Booting up uvm_component ...");
end : sequencer_uvm
endmodule : top

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# IVL_UVM Interface Generator
Welcome to IVL_UVM project - https://github.com/svenka3/ivl_uvm
## Description
This utility contains free, GNU licensed contribution to generate SystemVerilog interface for a given DUT.
To run a demo, do:
1. cd demo_dir
2. make
Make sure you have the iverilog & vvp in your path before running make above.
## About this utility:
Given a Verilog DUT, goal is to generate SystemVerilog (SV) Testbench around it.
First step in creating SV testbench is to code SystemVerilog interface. This
utility automates that interface generation by using VPI routines. Code is inside:
- ivlog_vpi_src

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/**********************************************************************
* IVL_UVM example - SystemVerilog Interface generator
*
*
* Verilog DUT to test the $ivl_uvm_intf_gen
*
*********************************************************************/
`timescale 1ns / 1ns
module alu (clk, a, b, ci, sum, co);
input [7:0] a, b;
input ci, clk;
output [15:0] sum;
output co;
`ifdef IVL_UVM_INTF_GEN
initial
begin
#1 $ivl_uvm_intf_gen();
end
`endif // IVL_UVM_INTF_GEN
endmodule // alu

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/**********************************************************************
* IVL_UVM example - SystemVerilog Interface generator
*
*
* Verilog DUT to test the $ivl_uvm_intf_gen
*
*********************************************************************/
`timescale 1ns / 1ns
module register_slice ( s_data_in, s_valid_in, s_ready_out, m_data_out, m_valid_out, m_ready_in);
parameter WIDTH = 64;
input [WIDTH-1:0] s_data_in;
input s_valid_in;
output s_ready_out;
output [WIDTH-1:0] m_data_out;
output m_valid_out;
input m_ready_in;
`ifdef IVL_UVM_INTF_GEN
initial #1 $ivl_uvm_intf_gen();
`endif // IVL_UVM_INTF_GEN
endmodule

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/**********************************************************************
* IVL_UVM common ulitiy functions
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*
*********************************************************************/
#include <stdio.h> /* ANSI C standard input/output library */
#include "vpi_user.h" /* IEEE 1364 PLI VPI routine library */
void ivl_uvm_pr_copyright () {
char * ivl_uvm_cright_msg;
ivl_uvm_cright_msg
= "\tWelcome to IVL_UVM (http://https://github.com/svenka3/ivl_uvm)\n\
\tVersion 2020.01 Copyright 2019-2022 AumzDA LLC\n\
\t\tAll Rights Reserved. \n";
vpi_printf("\t--------------------------------------------------------------------\n");
vpi_printf ("%s\n", ivl_uvm_cright_msg);
vpi_printf("\t--------------------------------------------------------------------\n");
}

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#include <stdlib.h> /* ANSI C standard library */
#include <stdio.h> /* ANSI C standard input/output library */
#include <stdarg.h> /* ANSI C standard arguments library */
#include "vpi_user.h" /* IEEE 1364 PLI VPI routine library */
#include <string.h> /* ANSI C string library */
#include <time.h> /* ANSI C string library */
#include "az_ivl_uvm_common.h"
/* prototypes of routines in this PLI application */
PLI_INT32 IVL_UVM_IGEN_compiletf();
PLI_INT32 IVL_UVM_IGEN_calltf();
/**********************************************************************
* VPI Registration Data
*********************************************************************/
void IVL_UVM_IGEN_register()
{
s_vpi_systf_data tf_data;
tf_data.type = vpiSysTask;
tf_data.sysfunctype = 0;
tf_data.tfname = "$ivl_uvm_intf_gen";
tf_data.calltf = IVL_UVM_IGEN_calltf;
tf_data.compiletf = IVL_UVM_IGEN_compiletf;
tf_data.sizetf = NULL;
tf_data.user_data = NULL;
vpi_register_systf(&tf_data);
}
/*********************************************************************/
/**********************************************************************
* Compiletf application
*********************************************************************/
PLI_INT32 IVL_UVM_IGEN_compiletf()
{
vpiHandle systf_h, tfarg_itr;
systf_h = vpi_handle(vpiSysTfCall, NULL);
if (systf_h == NULL) {
vpi_printf("ERROR: ivl_uvm_intf_gen could not obtain handle to systf call\n");
vpi_control(vpiFinish, 1); /* abort simulation */
return(0);
}
tfarg_itr = vpi_iterate(vpiArgument, systf_h);
if (systf_h == NULL) {
vpi_printf("ERROR: ivl_uvm_intf_gen could not obtain iterator to systf args\n");
vpi_control(vpiFinish, 1); /* abort simulation */
return(0);
}
return(0);
}
/**********************************************************************
* calltf routine
*********************************************************************/
PLI_INT32 IVL_UVM_IGEN_calltf()
{
vpiHandle systf_h, mod_h,
port_itr, port_h;
FILE * ivl_uvm_ifp;
FILE * ivl_uvm_tbp;
char * ivl_uvm_mod_name;
char * ivl_uvm_mod_name_saved;
char * ivl_uvm_port_name;
char * ivl_uvm_clk_name;
char ivl_uvm_dut_name [100];
char ivl_uvm_intf_name [100];
char ivl_uvm_intf_inst_name [100];
char ivl_uvm_intf_fname [100];
char ivl_uvm_tb_name [100];
char ivl_uvm_tb_fname [100];
vpiHandle ivl_uvm_top_mod_itr;
PLI_INT32 ivl_uvm_port_size;
PLI_INT32 ivl_uvm_port_count;
PLI_INT32 ivl_uvm_mp_c;
PLI_INT32 ivl_uvm_tb_sig_c;
PLI_INT32 clk_cmp_val;
char * ivl_uvm_mp_delimiter;
ivl_uvm_pr_copyright ();
/* get module handle from first system task argument. Assume the */
/* compiletf routine has already verified correct argument type. */
systf_h = vpi_handle(vpiSysTfCall, NULL);
if (systf_h == NULL) {
vpi_printf("ERROR: ivl_uvm_intf_gen could not obtain handle to systf call\n");
return(0);
}
ivl_uvm_top_mod_itr = vpi_iterate(vpiModule, NULL);
if (systf_h == NULL) {
vpi_printf("ERROR: ivl_uvm_intf_gen could not obtain iterator to systf args\n");
return(0);
}
mod_h = vpi_scan(ivl_uvm_top_mod_itr);
vpi_free_object(ivl_uvm_top_mod_itr); /* free itr since did not scan until nul */
ivl_uvm_mod_name = vpi_get_str(vpiDefName, mod_h);
ivl_uvm_mod_name_saved = vpi_get_str(vpiDefName, mod_h);
vpi_printf("\nGenerating SystemVerilog Interface for Module \"%s\" \n", ivl_uvm_mod_name);
strcpy (ivl_uvm_dut_name, ivl_uvm_mod_name);
strcpy (ivl_uvm_intf_name, ivl_uvm_mod_name);
strcpy (ivl_uvm_intf_fname, ivl_uvm_mod_name);
strcpy (ivl_uvm_tb_name, ivl_uvm_mod_name);
strcpy (ivl_uvm_tb_fname, ivl_uvm_mod_name);
strcat (ivl_uvm_intf_name, "_if");
strcpy (ivl_uvm_intf_inst_name, ivl_uvm_intf_name);
strcat (ivl_uvm_intf_inst_name, "_0");
strcat (ivl_uvm_intf_fname, "_if.sv");
strcat (ivl_uvm_tb_name, "_tb");
strcat (ivl_uvm_tb_fname, "_tb.sv");
ivl_uvm_ifp = fopen (ivl_uvm_intf_fname, "w");
fprintf(ivl_uvm_ifp, "// Automatically generated from IVL_UVM's Interface Generator utility \n");
fprintf(ivl_uvm_ifp, "// Using IVL_UVM_CLK as a text macro for clock \n");
fprintf(ivl_uvm_ifp, "// If your clock is other than \"clk\" change the line below\n");
fprintf(ivl_uvm_ifp, "`define IVL_UVM_CLK clk \n");
fprintf(ivl_uvm_ifp, "interface %s (input logic `IVL_UVM_CLK);\n", ivl_uvm_intf_name);
port_itr = vpi_iterate(vpiPort, mod_h);
if (!port_itr) {
vpi_printf(" No ports found\n");
return(0);
}
ivl_uvm_port_count = 0;
while ((port_h = vpi_scan(port_itr))) {
ivl_uvm_port_count++;
ivl_uvm_port_name = vpi_get_str(vpiName, port_h);
ivl_uvm_clk_name = "clk";
clk_cmp_val = strncmp (ivl_uvm_port_name , ivl_uvm_clk_name, 3);
if (clk_cmp_val == 0) continue;
// vpi_printf(" Port name is %s clk_cmp_val: %d \n", ivl_uvm_port_name, clk_cmp_val);
ivl_uvm_port_size = vpi_get(vpiSize, port_h);
// vpi_printf(" Size is %d\n", ivl_uvm_port_size);
fprintf(ivl_uvm_ifp, " logic [%d : 0] %s;\n",
ivl_uvm_port_size - 1,
ivl_uvm_port_name);
}
// For clocking block
//
fprintf(ivl_uvm_ifp, "\n\n `ifdef IVL_UVM_ALLOW_CB_IN_IF \n");
fprintf(ivl_uvm_ifp, "\n\n // Clocking block defintion for the TB side \n\n");
fprintf(ivl_uvm_ifp, " // Assuption made is: there exists a clock named \"clk\"\n");
fprintf(ivl_uvm_ifp, " clocking cb @(posedge `IVL_UVM_CLK);\n");
port_itr = vpi_iterate(vpiPort, mod_h);
if (!port_itr) {
vpi_printf(" No ports found\n");
return(0);
}
while ((port_h = vpi_scan(port_itr))) {
ivl_uvm_port_name = vpi_get_str(vpiName, port_h);
// vpi_printf(" Port name is %s\n", ivl_uvm_port_name);
ivl_uvm_port_size = vpi_get(vpiSize, port_h);
// vpi_printf(" Size is %d\n", ivl_uvm_port_size);
// Skip clk signal
clk_cmp_val = strncmp (ivl_uvm_port_name , ivl_uvm_clk_name, 3);
if (clk_cmp_val == 0) continue;
switch (vpi_get(vpiDirection, port_h)) {
case vpiInput:
fprintf(ivl_uvm_ifp, " output %s;\n",
ivl_uvm_port_name);
break;
case vpiOutput:
fprintf(ivl_uvm_ifp, " input %s;\n",
ivl_uvm_port_name);
break;
case vpiInout:
fprintf(ivl_uvm_ifp, " inout %s;\n",
ivl_uvm_port_name);
break;
}
}
fprintf(ivl_uvm_ifp, " endclocking : cb \n");
fprintf(ivl_uvm_ifp, "\n `endif // IVL_UVM_ALLOW_CB_IN_IF \n");
// For modport
//
fprintf(ivl_uvm_ifp, "\n\n // Modport defintion for the DUT \n\n");
fprintf(ivl_uvm_ifp, " modport dut_mp (\n");
port_itr = vpi_iterate(vpiPort, mod_h);
if (!port_itr) {
vpi_printf(" No ports found\n");
return(0);
}
ivl_uvm_mp_c = 0;
while ((port_h = vpi_scan(port_itr))) {
ivl_uvm_port_name = vpi_get_str(vpiName, port_h);
ivl_uvm_port_size = vpi_get(vpiSize, port_h);
ivl_uvm_mp_delimiter = "";
if (ivl_uvm_mp_c < ivl_uvm_port_count - 1) {
ivl_uvm_mp_delimiter = ",";
}
//vpi_printf ("ivl_uvm_mp_c %d ivl_uvm_port_count %d ivl_uvm_mp_del: %s",
// ivl_uvm_mp_c, ivl_uvm_port_count, ivl_uvm_mp_delimiter);
ivl_uvm_mp_c++;
switch (vpi_get(vpiDirection, port_h)) {
case vpiInput:
fprintf(ivl_uvm_ifp, " input %s%s\n",
ivl_uvm_port_name, ivl_uvm_mp_delimiter);
break;
case vpiOutput:
fprintf(ivl_uvm_ifp, " output %s%s\n",
ivl_uvm_port_name, ivl_uvm_mp_delimiter);
break;
case vpiInout:
fprintf(ivl_uvm_ifp, " inout %s%s\n",
ivl_uvm_port_name, ivl_uvm_mp_delimiter);
break;
}
}
fprintf(ivl_uvm_ifp, " ); // end of modport dut_mp \n");
fprintf(ivl_uvm_ifp, "endinterface : %s \n", ivl_uvm_intf_name);
vpi_printf("See file: \"%s\" for output\n",ivl_uvm_intf_fname);
// For TB generation
ivl_uvm_tbp = fopen (ivl_uvm_tb_fname, "w");
fprintf(ivl_uvm_tbp, "// Automatically generated from IVL_UVM's Interface Generator utility \n");
fprintf(ivl_uvm_tbp, "module %s; \n", ivl_uvm_tb_name);
fprintf(ivl_uvm_tbp, " timeunit 1ns; \n");
fprintf(ivl_uvm_tbp, " timeprecision 1ns; \n");
fprintf(ivl_uvm_tbp, " parameter IVL_UVM_CLK_PERIOD = 10; \n\n");
fprintf(ivl_uvm_tbp, " // Simple clock generator \n");
fprintf(ivl_uvm_tbp, " bit `IVL_UVM_CLK ;\n");
fprintf(ivl_uvm_tbp, " always # (IVL_UVM_CLK_PERIOD/2) `IVL_UVM_CLK <= ~`IVL_UVM_CLK;\n");
fprintf(ivl_uvm_tbp, "\n // Interface instance \n");
fprintf(ivl_uvm_tbp, " %s %s (.*); \n", ivl_uvm_intf_name, ivl_uvm_intf_inst_name);
fprintf(ivl_uvm_tbp, "\n // Connect TB clk to Interface instance clk \n");
fprintf(ivl_uvm_tbp, "\n // DUT instance \n");
fprintf(ivl_uvm_tbp, " %s %s_0 ( \n", ivl_uvm_dut_name, ivl_uvm_dut_name);
port_itr = vpi_iterate(vpiPort, mod_h);
if (!port_itr) {
vpi_printf(" No ports found\n");
return(0);
}
ivl_uvm_tb_sig_c = 0;
while ((port_h = vpi_scan(port_itr))) {
ivl_uvm_port_name = vpi_get_str(vpiName, port_h);
ivl_uvm_mp_delimiter = "";
if (ivl_uvm_tb_sig_c < ivl_uvm_port_count - 1) {
ivl_uvm_mp_delimiter = ",";
}
ivl_uvm_tb_sig_c++;
fprintf(ivl_uvm_tbp, " .%s(%s.%s)%s \n", ivl_uvm_port_name, ivl_uvm_intf_inst_name, ivl_uvm_port_name, ivl_uvm_mp_delimiter);
}
fprintf(ivl_uvm_tbp, " ); // %s DUT \n", ivl_uvm_dut_name);
fprintf(ivl_uvm_tbp, "\n // Simple stimuli block, should use IVL_UVM_Go2UVM ideally \n");
fprintf(ivl_uvm_tbp, " initial begin : stim \n");
fprintf(ivl_uvm_tbp, " // Example \n");
fprintf(ivl_uvm_tbp, " // #10 %s.dut_input_signal <= 1'b1; \n", ivl_uvm_intf_inst_name);
fprintf(ivl_uvm_tbp, " $display (\"Automatically generated Testbench from IVL_UVM's Interface Generator utility \"); \n");
fprintf(ivl_uvm_tbp, " #100 $finish (2); \n");
fprintf(ivl_uvm_tbp, " end : stim \n");
fprintf(ivl_uvm_tbp, "endmodule : %s \n", ivl_uvm_tb_name);
vpi_printf("See file: \"%s\" for output\n",ivl_uvm_tb_fname);
vpi_printf("Include these 2 files in your next simulation for a quick TB: \"%s\" \"%s\" \n", ivl_uvm_intf_fname, ivl_uvm_tb_fname);
return(0);
}
#ifndef VCS
/*********************************************************************/
void (*vlog_startup_routines[])() =
{
IVL_UVM_IGEN_register, /* */
0 /*** final entry must be 0 ***/
};
#endif

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../../ivl_uvm_tests/ivl_uvm_test_2/ivl_uvm_run_test.sv:42: error: The ivl_uvm_pkg.uvm_component.new constructor call is missing arguments.
1 error(s) during elaboration.

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../../ivl_uvm_tests/ivl_uvm_test_3/ivl_uvm_test_clp.sv:37: error: The ivl_uvm_pkg.uvm_component.new constructor call is missing arguments.
1 error(s) during elaboration.

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../../ivl_uvm_tests/ivl_uvm_test_4/ivl_uvm_test_bcl.sv:49: error: The ivl_uvm_pkg.uvm_component.new constructor call is missing arguments.
../../ivl_uvm_src/ivl_uvm_top.svh:9: error: Parm count mismatch passing 2 arguments to constructor expecting 1 arguments.
2 error(s) during elaboration.

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UVM_INFO ../../ivl_uvm_src/ivl_uvm_top.svh(8) @ 0.000 ns [IVL_GO2UVM] Using UVM_TESTNAME: uvm_test
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(95) @ 0.000 ns [IVL_GO2UVM] ivl_uvm_pkg.uvm_object.uvm_report_info
UVM_INFO ../../ivl_uvm_src/ivl_uvm_clp.svh(509) @ 1.000 ns [IVL_GO2UVM] CLP
UVM_INFO @ 1.000 ns [TIMOUTSET] '+UVM_TIMEOUT=1' Global Timeout: 1000000.000 ns
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(30) @ 100.000 ns [IVL_UVM] UVM_MEDIUM: Hello World
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(33) @ 200.000 ns [IVL_UVM] NONE: Hello World
UVM_WARNING ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(35) @ 300.000 ns [IVL_UVM] Sample Warning!
UVM_ERROR ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(36) @ 400.000 ns [IVL_UVM] Sample Error!
UVM_FATAL ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(37) @ 500.000 ns [IVL_UVM] Sample Fatal!
--- UVM Report Summary ---
** Report counts by severity
UVM_INFO : 8
UVM_WARNING : 1
UVM_ERROR : 1
UVM_FATAL : 1

Test FAILED with 1 error(s), look for UVM_ERROR in log file

UVM_INFO ../../ivl_uvm_src/ivl_uvm_msg.svh(74) @ 500.000 ns [IVL_GO2UVM] Thanks for using IVL_UVM Package

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UVM_INFO ../../ivl_uvm_src/ivl_uvm_top.svh(8) @ 0.000 ns [IVL_GO2UVM] Using UVM_TESTNAME: uvm_test
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(95) @ 0.000 ns [IVL_GO2UVM] ivl_uvm_pkg.uvm_object.uvm_report_info
UVM_INFO ../../ivl_uvm_src/ivl_uvm_clp.svh(509) @ 1.000 ns [IVL_GO2UVM] CLP
UVM_INFO @ 1.000 ns [TIMOUTSET] '+UVM_TIMEOUT=1' Global Timeout: 1000000.000 ns
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(30) @ 100.000 ns [IVL_UVM] UVM_MEDIUM: Hello World
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(31) @ 100.000 ns [IVL_UVM] UVM_HIGH: Hello World
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(32) @ 100.000 ns [IVL_UVM] UVM_FULL: Hello World
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(33) @ 200.000 ns [IVL_UVM] NONE: Hello World
UVM_WARNING ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(35) @ 300.000 ns [IVL_UVM] Sample Warning!
UVM_ERROR ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(36) @ 400.000 ns [IVL_UVM] Sample Error!
UVM_FATAL ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(37) @ 500.000 ns [IVL_UVM] Sample Fatal!
--- UVM Report Summary ---
** Report counts by severity
UVM_INFO : 10
UVM_WARNING : 1
UVM_ERROR : 1
UVM_FATAL : 1

Test FAILED with 1 error(s), look for UVM_ERROR in log file

UVM_INFO ../../ivl_uvm_src/ivl_uvm_msg.svh(74) @ 500.000 ns [IVL_GO2UVM] Thanks for using IVL_UVM Package

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UVM_INFO ../../ivl_uvm_src/ivl_uvm_top.svh(8) @ 0.000 ns [IVL_GO2UVM] Using UVM_TESTNAME: uvm_test
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(95) @ 0.000 ns [IVL_GO2UVM] ivl_uvm_pkg.uvm_object.uvm_report_info
UVM_INFO ../../ivl_uvm_src/ivl_uvm_clp.svh(509) @ 1.000 ns [IVL_GO2UVM] CLP
UVM_INFO @ 1.000 ns [TIMOUTSET] '+UVM_TIMEOUT=1' Global Timeout: 1000000.000 ns
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(30) @ 100.000 ns [IVL_UVM] UVM_MEDIUM: Hello World
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(31) @ 100.000 ns [IVL_UVM] UVM_HIGH: Hello World
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(33) @ 200.000 ns [IVL_UVM] NONE: Hello World
UVM_WARNING ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(35) @ 300.000 ns [IVL_UVM] Sample Warning!
UVM_ERROR ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(36) @ 400.000 ns [IVL_UVM] Sample Error!
UVM_FATAL ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(37) @ 500.000 ns [IVL_UVM] Sample Fatal!
--- UVM Report Summary ---
** Report counts by severity
UVM_INFO : 9
UVM_WARNING : 1
UVM_ERROR : 1
UVM_FATAL : 1

Test FAILED with 1 error(s), look for UVM_ERROR in log file

UVM_INFO ../../ivl_uvm_src/ivl_uvm_msg.svh(74) @ 500.000 ns [IVL_GO2UVM] Thanks for using IVL_UVM Package

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@ -0,0 +1,22 @@
UVM_INFO ../../ivl_uvm_src/ivl_uvm_top.svh(8) @ 0.000 ns [IVL_GO2UVM] Using UVM_TESTNAME: uvm_test
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(95) @ 0.000 ns [IVL_GO2UVM] ivl_uvm_pkg.uvm_object.uvm_report_info
UVM_INFO ../../ivl_uvm_src/ivl_uvm_clp.svh(509) @ 1.000 ns [IVL_GO2UVM] CLP
UVM_INFO @ 1.000 ns [TIMOUTSET] '+UVM_TIMEOUT=1' Global Timeout: 1000000.000 ns
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_1/ivl_uvm_test_class.sv(33) @ 100.000 ns [IVL_UVM] UVM_MEDIUM: Hello World
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(47) @ 100.000 ns [IVL_GO2UVM] build_phase
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(51) @ 100.000 ns [IVL_GO2UVM] connect_phase
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(55) @ 100.000 ns [IVL_GO2UVM] end_of_elaboration_phase
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(58) @ 100.000 ns [IVL_GO2UVM] start_of_simulation_phase
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(62) @ 100.000 ns [IVL_GO2UVM] run_phase
--- UVM Report Summary ---
** Report counts by severity
UVM_INFO : 17
UVM_WARNING : 0
UVM_ERROR : 0
UVM_FATAL : 0

*** Congratulations! Test PASSED with NO UVM_ERRORs ***

UVM_INFO ../../ivl_uvm_src/ivl_uvm_msg.svh(74) @ 100.000 ns [IVL_GO2UVM] Thanks for using IVL_UVM Package

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@ -0,0 +1,22 @@
UVM_INFO ../../ivl_uvm_src/ivl_uvm_top.svh(8) @ 0.000 ns [IVL_GO2UVM] Using UVM_TESTNAME: uvm_test
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(95) @ 0.000 ns [IVL_GO2UVM] ivl_uvm_pkg.uvm_object.uvm_report_info
UVM_INFO ../../ivl_uvm_src/ivl_uvm_clp.svh(509) @ 1.000 ns [IVL_GO2UVM] CLP
UVM_INFO @ 1.000 ns [TIMOUTSET] '+UVM_TIMEOUT=1' Global Timeout: 1000000.000 ns
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_1/ivl_uvm_test_class.sv(33) @ 100.000 ns [IVL_UVM] UVM_MEDIUM: Hello World
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(47) @ 100.000 ns [IVL_GO2UVM] build_phase
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(51) @ 100.000 ns [IVL_GO2UVM] connect_phase
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(55) @ 100.000 ns [IVL_GO2UVM] end_of_elaboration_phase
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(58) @ 100.000 ns [IVL_GO2UVM] start_of_simulation_phase
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(62) @ 100.000 ns [IVL_GO2UVM] run_phase
--- UVM Report Summary ---
** Report counts by severity
UVM_INFO : 17
UVM_WARNING : 0
UVM_ERROR : 0
UVM_FATAL : 0

*** Congratulations! Test PASSED with NO UVM_ERRORs ***

UVM_INFO ../../ivl_uvm_src/ivl_uvm_msg.svh(74) @ 100.000 ns [IVL_GO2UVM] Thanks for using IVL_UVM Package

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@ -0,0 +1,23 @@
UVM_INFO ../../ivl_uvm_src/ivl_uvm_top.svh(8) @ 0.000 ns [IVL_GO2UVM] Using UVM_TESTNAME: uvm_test
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(95) @ 0.000 ns [IVL_GO2UVM] ivl_uvm_pkg.uvm_object.uvm_report_info
UVM_INFO ../../ivl_uvm_src/ivl_uvm_clp.svh(509) @ 1.000 ns [IVL_GO2UVM] CLP
UVM_INFO @ 1.000 ns [TIMOUTSET] '+UVM_TIMEOUT=1' provided on the command line is being applied.
UVM_INFO @ 1.000 ns [TIMOUTSET] '+UVM_TIMEOUT=1' Global Timeout: 1000000.000 ns
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_1/ivl_uvm_test_class.sv(33) @ 100.000 ns [IVL_UVM] UVM_MEDIUM: Hello World
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(47) @ 100.000 ns [IVL_GO2UVM] build_phase
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(51) @ 100.000 ns [IVL_GO2UVM] connect_phase
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(55) @ 100.000 ns [IVL_GO2UVM] end_of_elaboration_phase
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(58) @ 100.000 ns [IVL_GO2UVM] start_of_simulation_phase
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(62) @ 100.000 ns [IVL_GO2UVM] run_phase
--- UVM Report Summary ---
** Report counts by severity
UVM_INFO : 18
UVM_WARNING : 0
UVM_ERROR : 0
UVM_FATAL : 0

*** Congratulations! Test PASSED with NO UVM_ERRORs ***

UVM_INFO ../../ivl_uvm_src/ivl_uvm_msg.svh(74) @ 100.000 ns [IVL_GO2UVM] Thanks for using IVL_UVM Package

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@ -0,0 +1,22 @@
UVM_INFO ../../ivl_uvm_src/ivl_uvm_top.svh(8) @ 0.000 ns [IVL_GO2UVM] Using UVM_TESTNAME: uvm_test
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(95) @ 0.000 ns [IVL_GO2UVM] ivl_uvm_pkg.uvm_object.uvm_report_info
UVM_INFO ../../ivl_uvm_src/ivl_uvm_clp.svh(509) @ 1.000 ns [IVL_GO2UVM] CLP
UVM_INFO @ 1.000 ns [TIMOUTSET] '+UVM_TIMEOUT=1' Global Timeout: 1000000.000 ns
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_1/ivl_uvm_test_class.sv(33) @ 100.000 ns [IVL_UVM] UVM_MEDIUM: Hello World
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(47) @ 100.000 ns [IVL_GO2UVM] build_phase
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(51) @ 100.000 ns [IVL_GO2UVM] connect_phase
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(55) @ 100.000 ns [IVL_GO2UVM] end_of_elaboration_phase
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(58) @ 100.000 ns [IVL_GO2UVM] start_of_simulation_phase
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(62) @ 100.000 ns [IVL_GO2UVM] run_phase
--- UVM Report Summary ---
** Report counts by severity
UVM_INFO : 17
UVM_WARNING : 0
UVM_ERROR : 0
UVM_FATAL : 0

*** Congratulations! Test PASSED with NO UVM_ERRORs ***

UVM_INFO ../../ivl_uvm_src/ivl_uvm_msg.svh(74) @ 100.000 ns [IVL_GO2UVM] Thanks for using IVL_UVM Package

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UVM_INFO /Users/srini/proj/IVL_UVM/Git_ivl_uvm/ivl_uvm/ivl_uvm_src/ivl_uvm_pkg.sv(48) @ 0.000 ns [IVL_GO2UVM] Using UVM_TESTNAME: sanity_test
UVM_INFO /Users/srini/proj/IVL_UVM/Git_ivl_uvm/ivl_uvm/ivl_uvm_src/ivl_uvm_comps.svh(104) @ 0.000 ns [IVL_GO2UVM] ivl_uvm_pkg.uvm_object.uvm_report_info
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_5/ivl_uvm_test_mbx_int.sv(36) @ 0.000 ns [IVL_GO2UVM] ivl_uvm_pkg.uvm_object.uvm_report_info
UVM_INFO /Users/srini/proj/IVL_UVM/Git_ivl_uvm/ivl_uvm/ivl_uvm_src/ivl_uvm_clp.svh(516) @ 1.000 ns [IVL_GO2UVM] CLP
UVM_INFO @ 1.000 ns [TIMOUTSET] '+UVM_TIMEOUT=1' Global Timeout: 1000000.000 ns
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_5/ivl_uvm_test_mbx_int.sv(72) @ 100.000 ns [IVL_UVM] UVM_MEDIUM: Hello World
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_5/ivl_uvm_test_mbx_int.sv(55) @ 100.000 ns [IVL_GO2UVM] Test MBX: Put: 0x92153524
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_5/ivl_uvm_test_mbx_int.sv(65) @ 105.000 ns [IVL_GO2UVM] Test MBX: Get: 0x92153524
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_5/ivl_uvm_test_mbx_int.sv(55) @ 110.000 ns [IVL_GO2UVM] Test MBX: Put: 0x40895e81
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_5/ivl_uvm_test_mbx_int.sv(65) @ 110.000 ns [IVL_GO2UVM] Test MBX: Get: 0x40895e81
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_5/ivl_uvm_test_mbx_int.sv(55) @ 120.000 ns [IVL_GO2UVM] Test MBX: Put: 0x484d609
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_5/ivl_uvm_test_mbx_int.sv(65) @ 120.000 ns [IVL_GO2UVM] Test MBX: Get: 0x484d609
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_5/ivl_uvm_test_mbx_int.sv(55) @ 130.000 ns [IVL_GO2UVM] Test MBX: Put: 0x31f05663
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_5/ivl_uvm_test_mbx_int.sv(65) @ 130.000 ns [IVL_GO2UVM] Test MBX: Get: 0x31f05663
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_5/ivl_uvm_test_mbx_int.sv(55) @ 140.000 ns [IVL_GO2UVM] Test MBX: Put: 0x86b97b0d
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_5/ivl_uvm_test_mbx_int.sv(65) @ 140.000 ns [IVL_GO2UVM] Test MBX: Get: 0x86b97b0d
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_5/ivl_uvm_test_mbx_int.sv(55) @ 150.000 ns [IVL_GO2UVM] Test MBX: Put: 0xc6df998d
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_5/ivl_uvm_test_mbx_int.sv(65) @ 150.000 ns [IVL_GO2UVM] Test MBX: Get: 0xc6df998d
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_5/ivl_uvm_test_mbx_int.sv(55) @ 160.000 ns [IVL_GO2UVM] Test MBX: Put: 0x32c28465
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_5/ivl_uvm_test_mbx_int.sv(65) @ 160.000 ns [IVL_GO2UVM] Test MBX: Get: 0x32c28465
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_5/ivl_uvm_test_mbx_int.sv(55) @ 170.000 ns [IVL_GO2UVM] Test MBX: Put: 0x9375212
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_5/ivl_uvm_test_mbx_int.sv(65) @ 170.000 ns [IVL_GO2UVM] Test MBX: Get: 0x9375212
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_5/ivl_uvm_test_mbx_int.sv(55) @ 180.000 ns [IVL_GO2UVM] Test MBX: Put: 0x80f3e301
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_5/ivl_uvm_test_mbx_int.sv(65) @ 180.000 ns [IVL_GO2UVM] Test MBX: Get: 0x80f3e301
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_5/ivl_uvm_test_mbx_int.sv(55) @ 190.000 ns [IVL_GO2UVM] Test MBX: Put: 0x86d7cd0d
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_5/ivl_uvm_test_mbx_int.sv(65) @ 190.000 ns [IVL_GO2UVM] Test MBX: Get: 0x86d7cd0d
../../ivl_uvm_tests/ivl_uvm_test_5/ivl_uvm_test_mbx_int.sv:80: $finish(2) called at 20000 (10ps)
--- UVM Report Summary ---
** Report counts by severity
UVM_INFO : 29
UVM_WARNING : 0
UVM_ERROR : 0
UVM_FATAL : 0

*** Congratulations! Test PASSED with NO UVM_ERRORs ***

UVM_INFO /Users/srini/proj/IVL_UVM/Git_ivl_uvm/ivl_uvm/ivl_uvm_src/ivl_uvm_msg.svh(82) @ 200.000 ns [IVL_GO2UVM] Thanks for using IVL_UVM Package

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${IVL_UVM_HOME}/ivl_uvm_src/ivl_uvm_pkg.sv
${IVL_UVM_HOME}/ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv
// This should be the last line in file-list
${IVL_UVM_HOME}/ivl_uvm_src/ivl_uvm_top.svh

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${IVL_UVM_HOME}/ivl_uvm_src/ivl_uvm_pkg.sv
${IVL_UVM_HOME}/ivl_uvm_tests/ivl_uvm_test_1/ivl_uvm_test_class.sv
// Thie should be the last line in file-list
${IVL_UVM_HOME}/ivl_uvm_src/ivl_uvm_top.svh

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${IVL_UVM_HOME}/ivl_uvm_src/ivl_uvm_pkg.sv
${IVL_UVM_HOME}/ivl_uvm_tests/ivl_uvm_test_2/ivl_uvm_run_test.sv
// Thie should be the last line in file-list
${IVL_UVM_HOME}/ivl_uvm_src/ivl_uvm_top.svh

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+define+UVM_CMDLINE_NO_DPI
${IVL_UVM_HOME}/ivl_uvm_src/ivl_uvm_pkg.sv
${IVL_UVM_HOME}/ivl_uvm_tests/ivl_uvm_test_3/ivl_uvm_test_clp.sv
// Thie should be the last line in file-list
${IVL_UVM_HOME}/ivl_uvm_src/ivl_uvm_top.svh

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+define+UVM_TESTNAME=sanity_test
// +define+UVM_TESTNAME=test_pkg::sanity_test
${IVL_UVM_HOME}/ivl_uvm_src/ivl_uvm_pkg.sv
${IVL_UVM_HOME}/ivl_uvm_tests/ivl_uvm_test_4/ivl_uvm_test_bcl.sv
// Thie should be the last line in file-list
${IVL_UVM_HOME}/ivl_uvm_src/ivl_uvm_top.svh

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+define+UVM_TESTNAME=sanity_test
${IVL_UVM_HOME}/ivl_uvm_src/ivl_uvm_pkg.sv
../../ivl_uvm_tests/ivl_uvm_test_5/ivl_uvm_test_mbx_int.sv
// Thie should be the last line in file-list
${IVL_UVM_HOME}/ivl_uvm_src/ivl_uvm_top.svh

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${IVL_UVM_HOME}/ivl_uvm_src/ivl_uvm_pkg.sv
../../ivl_uvm_tests/ivl_uvm_test_5/ivl_uvm_test_mbx_int.sv
// Thie should be the last line in file-list
${IVL_UVM_HOME}/ivl_uvm_src/ivl_uvm_top.svh

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// +define+UVM_TESTNAME=apb_test
+incdir+../../ivl_uvm_tests/ivl_uvm_test_7/tb_src/
${IVL_UVM_HOME}/ivl_uvm_src/ivl_uvm_pkg.sv
../../ivl_uvm_tests/ivl_uvm_test_7/tb_src/apb_pkg.sv

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UVM_INFO ../../ivl_uvm_src/ivl_uvm_pkg.sv(48) @ 0.000 ns [IVL_GO2UVM] Using UVM_TESTNAME: ivl_uvm_default_test
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(104) @ 0.000 ns [IVL_GO2UVM] ivl_uvm_pkg.uvm_object.uvm_report_info
UVM_INFO ../../ivl_uvm_src/ivl_uvm_clp.svh(516) @ 1.000 ns [IVL_GO2UVM] CLP
UVM_INFO @ 1.000 ns [TIMOUTSET] '+UVM_TIMEOUT=1' Global Timeout: 1000000.000 ns
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(34) @ 100.000 ns [IVL_UVM] UVM_MEDIUM: Hello World
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(37) @ 200.000 ns [IVL_UVM] NONE: Hello World
UVM_WARNING ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(39) @ 300.000 ns [IVL_UVM] Sample Warning!
UVM_ERROR ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(40) @ 400.000 ns [IVL_UVM] Sample Error!
UVM_ERROR ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(41) @ 500.000 ns [IVL_UVM] Sample Error!
UVM_ERROR ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(42) @ 600.000 ns [IVL_UVM] Sample Error!
UVM_FATAL ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(43) @ 700.000 ns [IVL_UVM] Sample Fatal!
--- UVM Report Summary ---
** Report counts by severity
UVM_INFO : 8
UVM_WARNING : 1
UVM_ERROR : 3
UVM_FATAL : 1

Test FAILED with 3 error(s), look for UVM_ERROR in log file

UVM_INFO ../../ivl_uvm_src/ivl_uvm_msg.svh(82) @ 700.000 ns [IVL_GO2UVM] Thanks for using IVL_UVM Package
../../ivl_uvm_src/ivl_uvm_msg.svh:188: $finish(2) called at 70000 (10ps)

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UVM_INFO ../../ivl_uvm_src/ivl_uvm_pkg.sv(48) @ 0.000 ns [IVL_GO2UVM] Using UVM_TESTNAME: ivl_uvm_default_test
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(104) @ 0.000 ns [IVL_GO2UVM] ivl_uvm_pkg.uvm_object.uvm_report_info
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(56) @ 0.000 ns [IVL_GO2UVM] build_phase
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(60) @ 0.000 ns [IVL_GO2UVM] connect_phase
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(64) @ 0.000 ns [IVL_GO2UVM] end_of_elaboration_phase
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(67) @ 0.000 ns [IVL_GO2UVM] start_of_simulation_phase
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(71) @ 0.000 ns [IVL_GO2UVM] run_phase
UVM_INFO ../../ivl_uvm_src/ivl_uvm_clp.svh(516) @ 1.000 ns [IVL_GO2UVM] CLP
UVM_INFO @ 1.000 ns [TIMOUTSET] '+UVM_TIMEOUT=1' Global Timeout: 1000000.000 ns
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(34) @ 100.000 ns [IVL_UVM] UVM_MEDIUM: Hello World
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(35) @ 100.000 ns [IVL_UVM] UVM_HIGH: Hello World
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(36) @ 100.000 ns [IVL_UVM] UVM_FULL: Hello World
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(37) @ 200.000 ns [IVL_UVM] NONE: Hello World
UVM_WARNING ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(39) @ 300.000 ns [IVL_UVM] Sample Warning!
UVM_ERROR ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(40) @ 400.000 ns [IVL_UVM] Sample Error!
UVM_ERROR ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(41) @ 500.000 ns [IVL_UVM] Sample Error!
UVM_ERROR ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(42) @ 600.000 ns [IVL_UVM] Sample Error!
UVM_FATAL ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(43) @ 700.000 ns [IVL_UVM] Sample Fatal!
--- UVM Report Summary ---
** Report counts by severity
UVM_INFO : 20
UVM_WARNING : 1
UVM_ERROR : 3
UVM_FATAL : 1

Test FAILED with 3 error(s), look for UVM_ERROR in log file

UVM_INFO ../../ivl_uvm_src/ivl_uvm_msg.svh(82) @ 700.000 ns [IVL_GO2UVM] Thanks for using IVL_UVM Package
../../ivl_uvm_src/ivl_uvm_msg.svh:188: $finish(2) called at 70000 (10ps)

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UVM_INFO ../../ivl_uvm_src/ivl_uvm_pkg.sv(48) @ 0.000 ns [IVL_GO2UVM] Using UVM_TESTNAME: ivl_uvm_default_test
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(104) @ 0.000 ns [IVL_GO2UVM] ivl_uvm_pkg.uvm_object.uvm_report_info
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(56) @ 0.000 ns [IVL_GO2UVM] build_phase
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(60) @ 0.000 ns [IVL_GO2UVM] connect_phase
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(64) @ 0.000 ns [IVL_GO2UVM] end_of_elaboration_phase
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(67) @ 0.000 ns [IVL_GO2UVM] start_of_simulation_phase
UVM_INFO ../../ivl_uvm_src/ivl_uvm_comps.svh(71) @ 0.000 ns [IVL_GO2UVM] run_phase
UVM_INFO ../../ivl_uvm_src/ivl_uvm_clp.svh(516) @ 1.000 ns [IVL_GO2UVM] CLP
UVM_INFO @ 1.000 ns [TIMOUTSET] '+UVM_TIMEOUT=1' Global Timeout: 1000000.000 ns
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(34) @ 100.000 ns [IVL_UVM] UVM_MEDIUM: Hello World
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(35) @ 100.000 ns [IVL_UVM] UVM_HIGH: Hello World
UVM_INFO ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(37) @ 200.000 ns [IVL_UVM] NONE: Hello World
UVM_WARNING ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(39) @ 300.000 ns [IVL_UVM] Sample Warning!
UVM_ERROR ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(40) @ 400.000 ns [IVL_UVM] Sample Error!
UVM_ERROR ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(41) @ 500.000 ns [IVL_UVM] Sample Error!
UVM_ERROR ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(42) @ 600.000 ns [IVL_UVM] Sample Error!
UVM_FATAL ../../ivl_uvm_tests/ivl_uvm_test_0/ivl_uvm_test_msg.sv(43) @ 700.000 ns [IVL_UVM] Sample Fatal!
--- UVM Report Summary ---
** Report counts by severity
UVM_INFO : 19
UVM_WARNING : 1
UVM_ERROR : 3
UVM_FATAL : 1

Test FAILED with 3 error(s), look for UVM_ERROR in log file

UVM_INFO ../../ivl_uvm_src/ivl_uvm_msg.svh(82) @ 700.000 ns [IVL_GO2UVM] Thanks for using IVL_UVM Package
../../ivl_uvm_src/ivl_uvm_msg.svh:188: $finish(2) called at 70000 (10ps)

File diff suppressed because it is too large Load Diff

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Directory for IVL_UVM source code

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//
//------------------------------------------------------------------------------
// Copyright 2007-2011 Mentor Graphics Corporation
// Copyright 2007-2011 Cadence Design Systems, Inc.
// Copyright 2010 Synopsys, Inc.
// All Rights Reserved Worldwide
//
// Licensed under the Apache License, Version 2.0 (the
// "License"); you may not use this file except in
// compliance with the License. You may obtain a copy of
// the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in
// writing, software distributed under the License is
// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See
// the License for the specific language governing
// permissions and limitations under the License.
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
//
// Topic: uvm_void
//
// The ~uvm_void~ class is the base class for all UVM classes. It is an abstract
// class with no data members or functions. It allows for generic containers of
// objects to be created, similar to a void pointer in the C programming
// language. User classes derived directly from ~uvm_void~ inherit none of the
// UVM functionality, but such classes may be placed in ~uvm_void~-typed
// containers along with other UVM objects.
//
//------------------------------------------------------------------------------
virtual class uvm_void;
endclass : uvm_void
`ifndef IVL_UVM
// Append/prepend symbolic values for order-dependent APIs
typedef enum {UVM_APPEND, UVM_PREPEND} uvm_apprepend;
// Forward declaration since scope stack uses uvm_objects now
typedef class uvm_object;
//----------------------------------------------------------------------------
//
// CLASS- uvm_scope_stack
//
//----------------------------------------------------------------------------
class uvm_scope_stack;
local string m_arg;
local string m_stack[$];
// depth
// -----
function int depth();
return m_stack.size();
endfunction
// scope
// -----
function string get();
string v;
if(m_stack.size() == 0) return m_arg;
get = m_stack[0];
for(int i=1; i<m_stack.size(); ++i) begin
v = m_stack[i];
if(v != "" && (v[0] == "[" || v[0] == "(" || v[0] == "{"))
get = {get,v};
else
get = {get,".",v};
end
if(m_arg != "") begin
if(get != "")
get = {get, ".", m_arg};
else
get = m_arg;
end
endfunction
// scope_arg
// ---------
function string get_arg();
return m_arg;
endfunction
// set_scope
// ---------
function void set (string s);
m_stack.delete();
m_stack.push_back(s);
m_arg = "";
endfunction
// down
// ----
function void down (string s);
m_stack.push_back(s);
m_arg = "";
endfunction
// down_element
// ------------
function void down_element (int element);
m_stack.push_back($sformatf("[%0d]",element));
m_arg = "";
endfunction
// up_element
// ------------
function void up_element ();
string s;
if(!m_stack.size())
return;
s = m_stack.pop_back();
if(s != "" && s[0] != "[")
m_stack.push_back(s);
endfunction
// up
// --
function void up (byte separator =".");
bit found;
string s;
while(m_stack.size() && !found ) begin
s = m_stack.pop_back();
if(separator == ".") begin
if (s == "" || (s[0] != "[" && s[0] != "(" && s[0] != "{"))
found = 1;
end
else begin
if(s != "" && s[0] == separator)
found = 1;
end
end
m_arg = "";
endfunction
// set_arg
// -------
function void set_arg (string arg);
if(arg=="") return;
m_arg = arg;
endfunction
// set_arg_element
// ---------------
function void set_arg_element (string arg, int ele);
string tmp_value_str;
tmp_value_str.itoa(ele);
m_arg = {arg, "[", tmp_value_str, "]"};
endfunction
// unset_arg
// ---------
function void unset_arg (string arg);
if(arg == m_arg)
m_arg = "";
endfunction
endclass
//------------------------------------------------------------------------------
//
// CLASS- uvm_status_container
//
// Internal class to contain status information for automation methods.
//
//------------------------------------------------------------------------------
class uvm_status_container;
//The clone setting is used by the set/get config to know if cloning is on.
bit clone = 1;
//Information variables used by the macro functions for storage.
bit warning;
bit status;
uvm_bitstream_t bitstream;
int intv;
int element;
string stringv;
string scratch1;
string scratch2;
string key;
uvm_object object;
bit array_warning_done;
static bit field_array[string];
static bit print_matches;
function void do_field_check(string field, uvm_object obj);
`ifdef UVM_ENABLE_FIELD_CHECKS
if (field_array.exists(field))
uvm_report_error("MLTFLD", $sformatf("Field %s is defined multiple times in type '%s'",
field, obj.get_type_name()), UVM_NONE);
`endif
field_array[field] = 1;
endfunction
function string get_function_type (int what);
case (what)
UVM_COPY: return "copy";
UVM_COMPARE: return "compare";
UVM_PRINT: return "print";
UVM_RECORD: return "record";
UVM_PACK: return "pack";
UVM_UNPACK: return "unpack";
UVM_FLAGS: return "get_flags";
UVM_SETINT: return "set";
UVM_SETOBJ: return "set_object";
UVM_SETSTR: return "set_string";
default: return "unknown";
endcase
endfunction
// The scope stack is used for messages that are emitted by policy classes.
uvm_scope_stack scope = new;
function string get_full_scope_arg ();
get_full_scope_arg = scope.get();
endfunction
//Used for checking cycles. When a data function is entered, if the depth is
//non-zero, then then the existeance of the object in the map means that a
//cycle has occured and the function should immediately exit. When the
//function exits, it should reset the cycle map so that there is no memory
//leak.
bit cycle_check[uvm_object];
//These are the policy objects currently in use. The policy object gets set
//when a function starts up. The macros use this.
uvm_comparer comparer;
uvm_packer packer;
uvm_recorder recorder;
uvm_printer printer;
// utility function used to perform a cycle check when config setting are pushed
// to uvm_objects. the function has to look at the current object stack representing
// the call stack of all __m_uvm_field_automation() invocations.
// it is a only a cycle if the previous __m_uvm_field_automation call scope
// is not identical with the current scope AND the scope is already present in the
// object stack
uvm_object m_uvm_cycle_scopes[$];
function bit m_do_cycle_check(uvm_object scope);
uvm_object l = m_uvm_cycle_scopes[$];
// we have been in this scope before (but actually right before so assuming a super/derived context of the same object)
if(l == scope)
begin
m_uvm_cycle_scopes.push_back(scope);
return 0;
end
else
begin
// now check if we have already been in this scope before
uvm_object m[$] = m_uvm_cycle_scopes.find_first(item) with (item == scope);
if(m.size()!=0) begin
return 1; // detected a cycle
end
else begin
m_uvm_cycle_scopes.push_back(scope);
return 0;
end
end
endfunction
endclass
//------------------------------------------------------------------------------
//
// CLASS- uvm_copy_map
//
//
// Internal class used to map rhs to lhs so when a cycle is found in the rhs,
// the correct lhs object can be bound to it.
//------------------------------------------------------------------------------
class uvm_copy_map;
local uvm_object m_map[uvm_object];
function void set(uvm_object key, uvm_object obj);
m_map[key] = obj;
endfunction
function uvm_object get(uvm_object key);
if (m_map.exists(key))
return m_map[key];
return null;
endfunction
function void clear();
m_map.delete();
endfunction
function void delete(uvm_object v);
m_map.delete(v);
endfunction
endclass
// Variable- uvm_global_random_seed
//
// Create a seed which is based off of the global seed which can be used to seed
// srandom processes but will change if the command line seed setting is
// changed.
//
int unsigned uvm_global_random_seed = $urandom;
// Class- uvm_seed_map
//
// This map is a seed map that can be used to update seeds. The update
// is done automatically by the seed hashing routine. The seed_table_lookup
// uses an instance name lookup and the seed_table inside a given map
// uses a type name for the lookup.
//
class uvm_seed_map;
int unsigned seed_table [string];
int unsigned count [string];
endclass
uvm_seed_map uvm_random_seed_table_lookup [string];
//------------------------------------------------------------------------------
// Internal utility functions
//------------------------------------------------------------------------------
// Function- uvm_instance_scope
//
// A function that returns the scope that the UVM library lives in, either
// an instance, a module, or a package.
//
function string uvm_instance_scope();
byte c;
int pos;
//first time through the scope is null and we need to calculate, afterwards it
//is correctly set.
if(uvm_instance_scope != "")
return uvm_instance_scope;
$swrite(uvm_instance_scope, "%m");
//remove the extraneous .uvm_instance_scope piece or ::uvm_instance_scope
pos = uvm_instance_scope.len()-1;
c = uvm_instance_scope[pos];
while(pos && (c != ".") && (c != ":"))
c = uvm_instance_scope[--pos];
if(pos == 0)
uvm_report_error("SCPSTR", $sformatf("Illegal name %s in scope string",uvm_instance_scope));
uvm_instance_scope = uvm_instance_scope.substr(0,pos);
endfunction
// Function- uvm_oneway_hash
//
// A one-way hash function that is useful for creating srandom seeds. An
// unsigned int value is generated from the string input. An initial seed can
// be used to seed the hash, if not supplied the uvm_global_random_seed
// value is used. Uses a CRC like functionality to minimize collisions.
//
parameter UVM_STR_CRC_POLYNOMIAL = 32'h04c11db6;
function int unsigned uvm_oneway_hash ( string string_in, int unsigned seed=0 );
bit msb;
bit [7:0] current_byte;
bit [31:0] crc1;
if(!seed) seed = uvm_global_random_seed;
uvm_oneway_hash = seed;
crc1 = 32'hffffffff;
for (int _byte=0; _byte < string_in.len(); _byte++) begin
current_byte = string_in[_byte];
if (current_byte == 0) break;
for (int _bit=0; _bit < 8; _bit++) begin
msb = crc1[31];
crc1 <<= 1;
if (msb ^ current_byte[_bit]) begin
crc1 ^= UVM_STR_CRC_POLYNOMIAL;
crc1[0] = 1;
end
end
end
uvm_oneway_hash += ~{crc1[7:0], crc1[15:8], crc1[23:16], crc1[31:24]};
endfunction
// Function- uvm_create_random_seed
//
// Creates a random seed and updates the seed map so that if the same string
// is used again, a new value will be generated. The inst_id is used to hash
// by instance name and get a map of type name hashes which the type_id uses
// for it's lookup.
function int unsigned uvm_create_random_seed ( string type_id, string inst_id="" );
uvm_seed_map seed_map;
if(inst_id == "")
inst_id = "__global__";
if(!uvm_random_seed_table_lookup.exists(inst_id))
uvm_random_seed_table_lookup[inst_id] = new;
seed_map = uvm_random_seed_table_lookup[inst_id];
type_id = {uvm_instance_scope(),type_id};
if(!seed_map.seed_table.exists(type_id)) begin
seed_map.seed_table[type_id] = uvm_oneway_hash ({type_id,"::",inst_id}, uvm_global_random_seed);
end
if (!seed_map.count.exists(type_id)) begin
seed_map.count[type_id] = 0;
end
//can't just increment, otherwise too much chance for collision, so
//randomize the seed using the last seed as the seed value. Check if
//the seed has been used before and if so increment it.
seed_map.seed_table[type_id] = seed_map.seed_table[type_id]+seed_map.count[type_id];
seed_map.count[type_id]++;
return seed_map.seed_table[type_id];
endfunction
// Function- uvm_object_value_str
//
//
function string uvm_object_value_str(uvm_object v);
if (v == null)
return "<null>";
uvm_object_value_str.itoa(v.get_inst_id());
uvm_object_value_str = {"@",uvm_object_value_str};
endfunction
// Function- uvm_leaf_scope
//
//
function string uvm_leaf_scope (string full_name, byte scope_separator = ".");
byte bracket_match;
int pos;
int bmatches;
bmatches = 0;
case(scope_separator)
"[": bracket_match = "]";
"(": bracket_match = ")";
"<": bracket_match = ">";
"{": bracket_match = "}";
default: bracket_match = "";
endcase
//Only use bracket matching if the input string has the end match
if(bracket_match != "" && bracket_match != full_name[full_name.len()-1])
bracket_match = "";
for(pos=full_name.len()-1; pos!=0; --pos) begin
if(full_name[pos] == bracket_match) bmatches++;
else if(full_name[pos] == scope_separator) begin
bmatches--;
if(!bmatches || (bracket_match == "")) break;
end
end
if(pos) begin
if(scope_separator != ".") pos--;
uvm_leaf_scope = full_name.substr(pos+1,full_name.len()-1);
end
else begin
uvm_leaf_scope = full_name;
end
endfunction
// Function- uvm_vector_to_string
//
//
function string uvm_vector_to_string (uvm_bitstream_t value, int size,
uvm_radix_enum radix=UVM_NORADIX,
string radix_str="");
// sign extend & don't show radix for negative values
if (radix == UVM_DEC && value[size-1] === 1)
return $sformatf("%0d", value);
value &= (1 << size)-1;
case(radix)
UVM_BIN: return $sformatf("%0s%0b", radix_str, value);
UVM_OCT: return $sformatf("%0s%0o", radix_str, value);
UVM_UNSIGNED: return $sformatf("%0s%0d", radix_str, value);
UVM_STRING: return $sformatf("%0s%0s", radix_str, value);
UVM_TIME: return $sformatf("%0s%0t", radix_str, value);
UVM_DEC: return $sformatf("%0s%0d", radix_str, value);
default: return $sformatf("%0s%0x", radix_str, value);
endcase
endfunction
// Function- uvm_get_array_index_int
//
// The following functions check to see if a string is representing an array
// index, and if so, what the index is.
function int uvm_get_array_index_int(string arg, output bit is_wildcard);
int i;
uvm_get_array_index_int = 0;
is_wildcard = 1;
i = arg.len() - 1;
if(arg[i] == "]")
while(i > 0 && (arg[i] != "[")) begin
--i;
if((arg[i] == "*") || (arg[i] == "?")) i=0;
else if((arg[i] < "0") || (arg[i] > "9") && (arg[i] != "[")) begin
uvm_get_array_index_int = -1; //illegal integral index
i=0;
end
end
else begin
is_wildcard = 0;
return 0;
end
if(i>0) begin
arg = arg.substr(i+1, arg.len()-2);
uvm_get_array_index_int = arg.atoi();
is_wildcard = 0;
end
endfunction
// Function- uvm_get_array_index_string
//
//
function string uvm_get_array_index_string(string arg, output bit is_wildcard);
int i;
uvm_get_array_index_string = "";
is_wildcard = 1;
i = arg.len() - 1;
if(arg[i] == "]")
while(i > 0 && (arg[i] != "[")) begin
if((arg[i] == "*") || (arg[i] == "?")) i=0;
--i;
end
if(i>0) begin
uvm_get_array_index_string = arg.substr(i+1, arg.len()-2);
is_wildcard = 0;
end
endfunction
// Function- uvm_is_array
//
//
function bit uvm_is_array(string arg);
return arg[arg.len()-1] == "]";
endfunction
// Function- uvm_has_wildcard
//
//
function automatic bit uvm_has_wildcard (string arg);
uvm_has_wildcard = 0;
//if it is a regex then return true
if( (arg.len() > 1) && (arg[0] == "/") && (arg[arg.len()-1] == "/") )
return 1;
//check if it has globs
foreach(arg[i])
if( (arg[i] == "*") || (arg[i] == "+") || (arg[i] == "?") )
uvm_has_wildcard = 1;
endfunction
//------------------------------------------------------------------------------
// CLASS: uvm_utils
//
// This class contains useful template functions.
//
//------------------------------------------------------------------------------
typedef class uvm_component;
typedef class uvm_root;
typedef class uvm_object;
class uvm_utils #(type TYPE=int, string FIELD="config");
typedef TYPE types_t[$];
// Function: find_all
//
// Recursively finds all component instances of the parameter type ~TYPE~,
// starting with the component given by ~start~. Uses <uvm_root::find_all>.
static function types_t find_all(uvm_component start);
uvm_component list[$];
types_t types;
uvm_root top;
top = uvm_root::get();
top.find_all("*",list,start);
foreach (list[i]) begin
TYPE typ;
if ($cast(typ,list[i]))
types.push_back(typ);
end
if (types.size() == 0) begin
`uvm_warning("find_type-no match",{"Instance of type '",TYPE::type_name,
" not found in component hierarchy beginning at ",start.get_full_name()})
end
return types;
endfunction
static function TYPE find(uvm_component start);
types_t types = find_all(start);
if (types.size() == 0)
return null;
if (types.size() > 1) begin
`uvm_warning("find_type-multi match",{"More than one instance of type '",TYPE::type_name,
" found in component hierarchy beginning at ",start.get_full_name()})
return null;
end
return types[0];
endfunction
static function TYPE create_type_by_name(string type_name, string contxt);
uvm_object obj;
TYPE typ;
obj = factory.create_object_by_name(type_name,contxt,type_name);
if (!$cast(typ,obj))
uvm_report_error("WRONG_TYPE",{"The type_name given '",type_name,
"' with context '",contxt,"' did not produce the expected type."});
return typ;
endfunction
// Function: get_config
//
// This method gets the object config of type ~TYPE~
// associated with component ~comp~.
// We check for the two kinds of error which may occur with this kind of
// operation.
static function TYPE get_config(uvm_component comp, bit is_fatal);
uvm_object obj;
TYPE cfg;
if (!comp.get_config_object(FIELD, obj, 0)) begin
if (is_fatal)
comp.uvm_report_fatal("NO_SET_CFG", {"no set_config to field '", FIELD,
"' for component '",comp.get_full_name(),"'"},
UVM_MEDIUM, `uvm_file , `uvm_line );
else
comp.uvm_report_warning("NO_SET_CFG", {"no set_config to field '", FIELD,
"' for component '",comp.get_full_name(),"'"},
UVM_MEDIUM, `uvm_file , `uvm_line );
return null;
end
if (!$cast(cfg, obj)) begin
if (is_fatal)
comp.uvm_report_fatal( "GET_CFG_TYPE_FAIL",
{"set_config_object with field name ",FIELD,
" is not of type '",TYPE::type_name,"'"},
UVM_NONE , `uvm_file , `uvm_line );
else
comp.uvm_report_warning( "GET_CFG_TYPE_FAIL",
{"set_config_object with field name ",FIELD,
" is not of type '",TYPE::type_name,"'"},
UVM_NONE , `uvm_file , `uvm_line );
end
return cfg;
endfunction
endclass
`ifdef UVM_USE_PROCESS_CONTAINER
class process_container_c;
process p;
function new(process p_);
p=p_;
endfunction
endclass
`endif
`endif // IVL_UVM

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// ========== Copyright Header Begin ==========================
//
// Project: IVL_UVM
// File: ivl_uvm_types.svh
// Author(s): Srinivasan Venkataramanan
// Modified from Accellera UVM 1.1d code base
//
// Copyright (c) VerifWorks 2016-2020 All Rights Reserved.
// Contact us via: support@verifworks.com
//
// ========== Copyright Header End ============================
////////////////////////////////////////////////////////////////////////
//
//------------------------------------------------------------------------------
// Copyright 2007-2011 Mentor Graphics Corporation
// Copyright 2007-2010 Cadence Design Systems, Inc.
// Copyright 2010 Synopsys, Inc.
// All Rights Reserved Worldwide
//
// Licensed under the Apache License, Version 2.0 (the
// "License"); you may not use this file except in
// compliance with the License. You may obtain a copy of
// the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in
// writing, software distributed under the License is
// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See
// the License for the specific language governing
// permissions and limitations under the License.
//------------------------------------------------------------------------------
//This bit marks where filtering should occur to remove uvm stuff from a
//scope
bit uvm_start_uvm_declarations = 1;
//------------------------------------------------------------------------------
//
// Section: Types and Enumerations
//
//------------------------------------------------------------------------------
//------------------------
// Group: Field automation
//------------------------
// Macro: `UVM_MAX_STREAMBITS
//
// Defines the maximum bit vector size for integral types.
`ifndef UVM_MAX_STREAMBITS
`define UVM_MAX_STREAMBITS 4096
`endif
// Macro: `UVM_PACKER_MAX_BYTES
//
// Defines the maximum bytes to allocate for packing an object using
// the <uvm_packer>. Default is <`UVM_MAX_STREAMBITS>, in ~bytes~.
`ifndef UVM_PACKER_MAX_BYTES
`define UVM_PACKER_MAX_BYTES UVM_STREAMBITS
`endif
parameter UVM_STREAMBITS = `UVM_MAX_STREAMBITS;
// Macro: `UVM_DEFAULT_TIMEOUT
//
// The default timeout for simulation, if not overridden by
// <uvm_root::set_timeout> or <+UVM_TIMEOUT>
//
`define UVM_DEFAULT_TIMEOUT 9200s
// Type: uvm_bitstream_t
//
// The bitstream type is used as a argument type for passing integral values
// in such methods as set_int_local, get_int_local, get_config_int, report,
// pack and unpack.
typedef logic signed [UVM_STREAMBITS-1:0] uvm_bitstream_t;
// Enum: uvm_radix_enum
//
// Specifies the radix to print or record in.
//
// UVM_BIN - Selects binary (%b) format
// UVM_DEC - Selects decimal (%d) format
// UVM_UNSIGNED - Selects unsigned decimal (%u) format
// UVM_OCT - Selects octal (%o) format
// UVM_HEX - Selects hexidecimal (%h) format
// UVM_STRING - Selects string (%s) format
// UVM_TIME - Selects time (%t) format
// UVM_ENUM - Selects enumeration value (name) format
typedef enum {
UVM_BIN = 'h1000000,
UVM_DEC = 'h2000000,
UVM_UNSIGNED = 'h3000000,
UVM_UNFORMAT2 = 'h4000000,
UVM_UNFORMAT4 = 'h5000000,
UVM_OCT = 'h6000000,
UVM_HEX = 'h7000000,
UVM_STRING = 'h8000000,
UVM_TIME = 'h9000000,
UVM_ENUM = 'ha000000,
UVM_REAL = 'hb000000,
UVM_REAL_DEC = 'hc000000,
UVM_REAL_EXP = 'hd000000,
UVM_NORADIX = 0
} uvm_radix_enum;
parameter UVM_RADIX = 'hf000000; //4 bits setting the radix
// Function- uvm_radix_to_string
function string uvm_radix_to_string(uvm_radix_enum radix);
case(radix)
UVM_BIN: return "b";
UVM_OCT: return "o";
UVM_DEC: return "d";
UVM_HEX: return "h";
UVM_UNSIGNED: return "u";
UVM_UNFORMAT2: return "u";
UVM_UNFORMAT4: return "z";
UVM_STRING: return "s";
UVM_TIME: return "t";
UVM_ENUM: return "s";
UVM_REAL: return "g";
UVM_REAL_DEC: return "f";
UVM_REAL_EXP: return "e";
default: return "x"; //hex
endcase
endfunction
// Enum: uvm_recursion_policy_enum
//
// Specifies the policy for copying objects.
//
// UVM_DEEP - Objects are deep copied (object must implement copy method)
// UVM_SHALLOW - Objects are shallow copied using default SV copy.
// UVM_REFERENCE - Only object handles are copied.
typedef enum {
UVM_DEFAULT_POLICY = 0,
UVM_DEEP = 'h400,
UVM_SHALLOW = 'h800,
UVM_REFERENCE = 'h1000
} uvm_recursion_policy_enum;
// Enum: uvm_active_passive_enum
//
// Convenience value to define whether a component, usually an agent,
// is in "active" mode or "passive" mode.
typedef enum bit { UVM_PASSIVE=0, UVM_ACTIVE=1 } uvm_active_passive_enum;
// Parameter: `uvm_field_* macro flags
//
// Defines what operations a given field should be involved in.
// Bitwise OR all that apply.
//
// UVM_DEFAULT - All field operations turned on
// UVM_COPY - Field will participate in <uvm_object::copy>
// UVM_COMPARE - Field will participate in <uvm_object::compare>
// UVM_PRINT - Field will participate in <uvm_object::print>
// UVM_RECORD - Field will participate in <uvm_object::record>
// UVM_PACK - Field will participate in <uvm_object::pack>
//
// UVM_NOCOPY - Field will not participate in <uvm_object::copy>
// UVM_NOCOMPARE - Field will not participate in <uvm_object::compare>
// UVM_NOPRINT - Field will not participate in <uvm_object::print>
// UVM_NORECORD - Field will not participate in <uvm_object::record>
// UVM_NOPACK - Field will not participate in <uvm_object::pack>
//
// UVM_DEEP - Object field will be deep copied
// UVM_SHALLOW - Object field will be shallow copied
// UVM_REFERENCE - Object field will copied by reference
//
// UVM_READONLY - Object field will NOT be automatically configured.
parameter UVM_MACRO_NUMFLAGS = 17;
//A=ABSTRACT Y=PHYSICAL
//F=REFERENCE, S=SHALLOW, D=DEEP
//K=PACK, R=RECORD, P=PRINT, M=COMPARE, C=COPY
//--------------------------- AYFSD K R P M C
parameter UVM_DEFAULT = 'b000010101010101;
parameter UVM_ALL_ON = 'b000000101010101;
parameter UVM_FLAGS_ON = 'b000000101010101;
parameter UVM_FLAGS_OFF = 0;
//Values are or'ed into a 32 bit value
//and externally
parameter UVM_COPY = (1<<0);
parameter UVM_NOCOPY = (1<<1);
parameter UVM_COMPARE = (1<<2);
parameter UVM_NOCOMPARE = (1<<3);
parameter UVM_PRINT = (1<<4);
parameter UVM_NOPRINT = (1<<5);
parameter UVM_RECORD = (1<<6);
parameter UVM_NORECORD = (1<<7);
parameter UVM_PACK = (1<<8);
parameter UVM_NOPACK = (1<<9);
//parameter UVM_DEEP = (1<<10);
//parameter UVM_SHALLOW = (1<<11);
//parameter UVM_REFERENCE = (1<<12);
parameter UVM_PHYSICAL = (1<<13);
parameter UVM_ABSTRACT = (1<<14);
parameter UVM_READONLY = (1<<15);
parameter UVM_NODEFPRINT = (1<<16);
//Extra values that are used for extra methods
parameter UVM_MACRO_EXTRAS = (1<<UVM_MACRO_NUMFLAGS);
parameter UVM_FLAGS = UVM_MACRO_EXTRAS+1;
parameter UVM_UNPACK = UVM_MACRO_EXTRAS+2;
parameter UVM_CHECK_FIELDS = UVM_MACRO_EXTRAS+3;
parameter UVM_END_DATA_EXTRA = UVM_MACRO_EXTRAS+4;
//Get and set methods (in uvm_object). Used by the set/get* functions
//to tell the object what operation to perform on the fields.
parameter UVM_START_FUNCS = UVM_END_DATA_EXTRA+1;
parameter UVM_SET = UVM_START_FUNCS+1;
parameter UVM_SETINT = UVM_SET;
parameter UVM_SETOBJ = UVM_START_FUNCS+2;
parameter UVM_SETSTR = UVM_START_FUNCS+3;
parameter UVM_END_FUNCS = UVM_SETSTR;
//Global string variables
string uvm_aa_string_key;
//-----------------
// Group: Reporting
//-----------------
// Enum: uvm_severity
//
// Defines all possible values for report severity.
//
// UVM_INFO - Informative messsage.
// UVM_WARNING - Indicates a potential problem.
// UVM_ERROR - Indicates a real problem. Simulation continues subject
// to the configured message action.
// UVM_FATAL - Indicates a problem from which simulation can not
// recover. Simulation exits via $finish after a #0 delay.
typedef bit [1:0] uvm_severity;
`ifdef IVL_UVM
typedef enum bit [1:0]
`else
typedef enum uvm_severity
`endif
{
UVM_INFO,
UVM_WARNING,
UVM_ERROR,
UVM_FATAL
} uvm_severity_type;
// Enum: uvm_action
//
// Defines all possible values for report actions. Each report is configured
// to execute one or more actions, determined by the bitwise OR of any or all
// of the following enumeration constants.
//
// UVM_NO_ACTION - No action is taken
// UVM_DISPLAY - Sends the report to the standard output
// UVM_LOG - Sends the report to the file(s) for this (severity,id) pair
// UVM_COUNT - Counts the number of reports with the COUNT attribute.
// When this value reaches max_quit_count, the simulation terminates
// UVM_EXIT - Terminates the simulation immediately.
// UVM_CALL_HOOK - Callback the report hook methods
// UVM_STOP - Causes ~$stop~ to be executed, putting the simulation into
// interactive mode.
typedef int uvm_action;
typedef enum
{
UVM_NO_ACTION = 'b000000,
UVM_DISPLAY = 'b000001,
UVM_LOG = 'b000010,
UVM_COUNT = 'b000100,
UVM_EXIT = 'b001000,
UVM_CALL_HOOK = 'b010000,
UVM_STOP = 'b100000
} uvm_action_type;
// Enum: uvm_verbosity
//
// Defines standard verbosity levels for reports.
//
// UVM_NONE - Report is always printed. Verbosity level setting can not
// disable it.
// UVM_LOW - Report is issued if configured verbosity is set to UVM_LOW
// or above.
// UVM_MEDIUM - Report is issued if configured verbosity is set to UVM_MEDIUM
// or above.
// UVM_HIGH - Report is issued if configured verbosity is set to UVM_HIGH
// or above.
// UVM_FULL - Report is issued if configured verbosity is set to UVM_FULL
// or above.
typedef enum
{
UVM_NONE = 0,
UVM_LOW = 100,
UVM_MEDIUM = 200,
UVM_HIGH = 300,
UVM_FULL = 400,
UVM_DEBUG = 500
} uvm_verbosity;
typedef int UVM_FILE;
//-----------------
// Group: Port Type
//-----------------
// Enum: uvm_port_type_e
//
// Specifies the type of port
//
// UVM_PORT - The port requires the interface that is its type
// parameter.
// UVM_EXPORT - The port provides the interface that is its type
// parameter via a connection to some other export or
// implementation.
// UVM_IMPLEMENTATION - The port provides the interface that is its type
// parameter, and it is bound to the component that
// implements the interface.
typedef enum
{
UVM_PORT ,
UVM_EXPORT ,
UVM_IMPLEMENTATION
} uvm_port_type_e;
//-----------------
// Group: Sequences
//-----------------
// Enum: uvm_sequencer_arb_mode
//
// Specifies a sequencer's arbitration mode
//
// SEQ_ARB_FIFO - Requests are granted in FIFO order (default)
// SEQ_ARB_WEIGHTED - Requests are granted randomly by weight
// SEQ_ARB_RANDOM - Requests are granted randomly
// SEQ_ARB_STRICT_FIFO - Requests at highest priority granted in fifo order
// SEQ_ARB_STRICT_RANDOM - Requests at highest priority granted in randomly
// SEQ_ARB_USER - Arbitration is delegated to the user-defined
// function, user_priority_arbitration. That function
// will specify the next sequence to grant.
typedef enum
{
SEQ_ARB_FIFO,
SEQ_ARB_WEIGHTED,
SEQ_ARB_RANDOM,
SEQ_ARB_STRICT_FIFO,
SEQ_ARB_STRICT_RANDOM,
SEQ_ARB_USER
} uvm_sequencer_arb_mode;
typedef uvm_sequencer_arb_mode SEQ_ARB_TYPE; // backward compat
// Enum: uvm_sequence_state_enum
//
// Defines current sequence state
//
// CREATED - The sequence has been allocated.
// PRE_START - The sequence is started and the
// <uvm_sequence_base::pre_start()> task is
// being executed.
// PRE_BODY - The sequence is started and the
// <uvm_sequence_base::pre_body()> task is
// being executed.
// BODY - The sequence is started and the
// <uvm_sequence_base::body()> task is
// being executed.
// ENDED - The sequence has completed the execution of the
// <uvm_sequence_base::body()> task.
// POST_BODY - The sequence is started and the
// <uvm_sequence_base::post_body()> task is
// being executed.
// POST_START - The sequence is started and the
// <uvm_sequence_base::post_start()> task is
// being executed.
// STOPPED - The sequence has been forcibly ended by issuing a
// <uvm_sequence_base::kill()> on the sequence.
// FINISHED - The sequence is completely finished executing.
typedef enum
{
CREATED = 1,
PRE_START = 2,
PRE_BODY = 4,
BODY = 8,
POST_BODY = 16,
POST_START= 32,
ENDED = 64,
STOPPED = 128,
FINISHED = 256
} uvm_sequence_state;
typedef uvm_sequence_state uvm_sequence_state_enum; // backward compat
// Enum: uvm_sequence_lib_mode
//
// Specifies the random selection mode of a sequence library
//
// UVM_SEQ_LIB_RAND - Random sequence selection
// UVM_SEQ_LIB_RANDC - Random cyclic sequence selection
// UVM_SEQ_LIB_ITEM - Emit only items, no sequence execution
// UVM_SEQ_LIB_USER - Apply a user-defined random-selection algorithm
typedef enum
{
UVM_SEQ_LIB_RAND,
UVM_SEQ_LIB_RANDC,
UVM_SEQ_LIB_ITEM,
UVM_SEQ_LIB_USER
} uvm_sequence_lib_mode;
//---------------
// Group: Phasing
//---------------
// Enum: uvm_phase_type
//
// This is an attribute of a <uvm_phase> object which defines the phase
// type.
//
// UVM_PHASE_IMP - The phase object is used to traverse the component
// hierarchy and call the component phase method as
// well as the ~phase_started~ and ~phase_ended~ callbacks.
// These nodes are created by the phase macros,
// `uvm_builtin_task_phase, `uvm_builtin_topdown_phase,
// and `uvm_builtin_bottomup_phase. These nodes represent
// the phase type, i.e. uvm_run_phase, uvm_main_phase.
//
// UVM_PHASE_NODE - The object represents a simple node instance in
// the graph. These nodes will contain a reference to
// their corresponding IMP object.
//
// UVM_PHASE_SCHEDULE - The object represents a portion of the phasing graph,
// typically consisting of several NODE types, in series,
// parallel, or both.
//
// UVM_PHASE_TERMINAL - This internal object serves as the termination NODE
// for a SCHEDULE phase object.
//
// UVM_PHASE_DOMAIN - This object represents an entire graph segment that
// executes in parallel with the 'run' phase.
// Domains may define any network of NODEs and
// SCHEDULEs. The built-in domain, ~uvm~, consists
// of a single schedule of all the run-time phases,
// starting with ~pre_reset~ and ending with
// ~post_shutdown~.
//
typedef enum { UVM_PHASE_IMP,
UVM_PHASE_NODE,
UVM_PHASE_TERMINAL,
UVM_PHASE_SCHEDULE,
UVM_PHASE_DOMAIN,
UVM_PHASE_GLOBAL
} uvm_phase_type;
// Enum: uvm_phase_state
// ---------------------
//
// The set of possible states of a phase. This is an attribute of a schedule
// node in the graph, not of a phase, to maintain independent per-domain state
//
// UVM_PHASE_DORMANT - Nothing has happened with the phase in this domain.
//
// UVM_PHASE_SCHEDULED - At least one immediate predecessor has completed.
// Scheduled phases block until all predecessors complete or
// until a jump is executed.
//
// UVM_PHASE_SYNCING - All predecessors complete, checking that all synced
// phases (e.g. across domains) are at or beyond this point
//
// UVM_PHASE_STARTED - phase ready to execute, running phase_started() callback
//
// UVM_PHASE_EXECUTING - An executing phase is one where the phase callbacks are
// being executed. It's process is tracked by the phaser.
//
// UVM_PHASE_READY_TO_END - no objections remain in this phase or in any
// predecessors of its successors or in any sync'd phases. This
// state indicates an opportunity for any phase that needs extra
// time for a clean exit to raise an objection, thereby causing a
// return to UVM_PHASE_EXECUTING. If no objection is raised, state
// will transition to UVM_PHASE_ENDED after a delta cycle.
// (An example of predecessors of successors: The successor to
// phase 'run' is 'extract', whose predecessors are 'run' and
// 'post_shutdown'. Therefore, 'run' will go to this state when
// both its objections and those of 'post_shutdown' are all dropped.
//
// UVM_PHASE_ENDED - phase completed execution, now running phase_ended() callback
//
// UVM_PHASE_CLEANUP - all processes related to phase are being killed
//
// UVM_PHASE_DONE - A phase is done after it terminated execution. Becoming
// done may enable a waiting successor phase to execute.
//
// The state transitions occur as follows:
//
//| DORMANT -> SCHED -> SYNC -> START -> EXEC -> READY -> END -> CLEAN -> DONE
//| ^ |
//| | <-- jump_to v
//| +------------------------------------------------------------+
typedef enum { UVM_PHASE_DORMANT = 1,
UVM_PHASE_SCHEDULED = 2,
UVM_PHASE_SYNCING = 4,
UVM_PHASE_STARTED = 8,
UVM_PHASE_EXECUTING = 16,
UVM_PHASE_READY_TO_END = 32,
UVM_PHASE_ENDED = 64,
UVM_PHASE_CLEANUP = 128,
UVM_PHASE_DONE = 256,
UVM_PHASE_JUMPING = 512
} uvm_phase_state;
// Enum: uvm_phase_transition
//
// These are the phase state transition for callbacks which provide
// additional information that may be useful during callbacks
//
// UVM_COMPLETED - the phase completed normally
// UVM_FORCED_STOP - the phase was forced to terminate prematurely
// UVM_SKIPPED - the phase was in the path of a forward jump
// UVM_RERUN - the phase was in the path of a backwards jump
//
typedef enum { UVM_COMPLETED = 'h01,
UVM_FORCED_STOP = 'h02,
UVM_SKIPPED = 'h04,
UVM_RERUN = 'h08
} uvm_phase_transition;
// Enum: uvm_wait_op
//
// Specifies the operand when using methods like <uvm_phase::wait_for_state>.
//
// UVM_EQ - equal
// UVM_NE - not equal
// UVM_LT - less than
// UVM_LTE - less than or equal to
// UVM_GT - greater than
// UVM_GTE - greater than or equal to
//
typedef enum { UVM_LT,
UVM_LTE,
UVM_NE,
UVM_EQ,
UVM_GT,
UVM_GTE
} uvm_wait_op;
//------------------
// Group: Objections
//------------------
// Enum: uvm_objection_event
//
// Enumerated the possible objection events one could wait on. See
// <uvm_objection::wait_for>.
//
// UVM_RAISED - an objection was raised
// UVM_DROPPED - an objection was raised
// UVM_ALL_DROPPED - all objections have been dropped
//
typedef enum { UVM_RAISED = 'h01,
UVM_DROPPED = 'h02,
UVM_ALL_DROPPED = 'h04
} uvm_objection_event;
//------------------------------
// Group: Default Policy Classes
//------------------------------
//
// Policy classes copying, comparing, packing, unpacking, and recording
// <uvm_object>-based objects.
typedef class uvm_printer;
typedef class uvm_table_printer;
typedef class uvm_tree_printer;
typedef class uvm_line_printer;
typedef class uvm_comparer;
typedef class uvm_packer;
typedef class uvm_recorder;
// Variable: uvm_default_table_printer
//
// The table printer is a global object that can be used with
// <uvm_object::do_print> to get tabular style printing.
`ifndef IVL_UVM
uvm_table_printer uvm_default_table_printer = new();
`endif
// Variable: uvm_default_tree_printer
//
// The tree printer is a global object that can be used with
// <uvm_object::do_print> to get multi-line tree style printing.
`ifndef IVL_UVM
uvm_tree_printer uvm_default_tree_printer = new();
`endif
// Variable: uvm_default_line_printer
//
// The line printer is a global object that can be used with
// <uvm_object::do_print> to get single-line style printing.
`ifndef IVL_UVM
uvm_line_printer uvm_default_line_printer = new();
`endif
// Variable: uvm_default_printer
//
// The default printer policy. Used when calls to <uvm_object::print>
// or <uvm_object::sprint> do not specify a printer policy.
//
// The default printer may be set to any legal <uvm_printer> derived type,
// including the global line, tree, and table printers described above.
`ifndef IVL_UVM
uvm_printer uvm_default_printer = uvm_default_table_printer;
`endif
// Variable: uvm_default_packer
//
// The default packer policy. Used when calls to <uvm_object::pack>
// and <uvm_object::unpack> do not specify a packer policy.
`ifndef IVL_UVM
uvm_packer uvm_default_packer = new();
`endif
// Variable: uvm_default_comparer
//
//
// The default compare policy. Used when calls to <uvm_object::compare>
// do not specify a comparer policy.
`ifndef IVL_UVM
uvm_comparer uvm_default_comparer = new(); // uvm_comparer::init();
`endif
// Variable: uvm_default_recorder
//
// The default recording policy. Used when calls to <uvm_object::record>
// do not specify a recorder policy.
`ifndef IVL_UVM
uvm_recorder uvm_default_recorder = new();
`endif

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//
//------------------------------------------------------------------------------
// Copyright 2011 Mentor Graphics Corporation
// Copyright 2011 Cadence Design Systems, Inc.
// Copyright 2011 Synopsys, Inc.
// All Rights Reserved Worldwide
//
// Licensed under the Apache License, Version 2.0 (the
// "License"); you may not use this file except in
// compliance with the License. You may obtain a copy of
// the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in
// writing, software distributed under the License is
// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See
// the License for the specific language governing
// permissions and limitations under the License.
//------------------------------------------------------------------------------
`ifndef UVM_CMDLINE_PROCESSOR_SV
`define UVM_CMDLINE_PROCESSOR_SV
class uvm_cmd_line_verb;
string comp_path;
string id;
//TBD uvm_verbosity verb;
int exec_time;
endclass
// Class: uvm_cmdline_processor
//
// This class provides an interface to the command line arguments that
// were provided for the given simulation. The class is intended to be
// used as a singleton, but that isn't required. The generation of the
// data structures which hold the command line argument information
// happens during construction of the class object. A global variable
// called ~uvm_cmdline_proc~ is created at initialization time and may
// be used to access command line information.
//
// The uvm_cmdline_processor class also provides support for setting various UVM
// variables from the command line such as components' verbosities and configuration
// settings for integral types and strings. Each of these capablities is described
// in the Built-in UVM Aware Command Line Arguments section.
//
module ivl_uvm_cmdline_processor;
import ivl_uvm_pkg::*;
string m_argv[$];
string m_plus_argv[$];
string m_uvm_argv[$];
string ivl_uvm_clp_args [$];
//`include "ivl_uvm_msg.svh"
function string uvm_dpi_get_tool_version ();
return "Icarus Verilog version 12.0 (devel)";
endfunction : uvm_dpi_get_tool_version
function string uvm_dpi_get_tool_name ();
return "Icarus Verilog with IVL_UVM";
endfunction : uvm_dpi_get_tool_name
// Group: Basic Arguments
// Function: get_args
//
// This function returns a queue with all of the command line
// arguments that were used to start the simulation. Note that
// element 0 of the array will always be the name of the
// executable which started the simulation.
function void get_args (string args[$]);
ivl_uvm_clp_args = m_argv;
endfunction
// Function: get_plusargs
//
// This function returns a queue with all of the plus arguments
// that were used to start the simulation. Plusarguments may be
// used by the simulator vendor, or may be specific to a company
// or individiual user. Plusargs never have extra arguments
// (i.e. if there is a plusarg as the second argument on the
// command line, the third argument is unrelated); this is not
// necessarily the case with vendor specific dash arguments.
function void get_plusargs (string args[$]);
ivl_uvm_clp_args = m_plus_argv;
endfunction
// Function: get_uvmargs
//
// This function returns a queue with all of the uvm arguments
// that were used to start the simulation. An UVM argument is
// taken to be any argument that starts with a - or + and uses
// the keyword UVM (case insensitive) as the first three
// letters of the argument.
function void get_uvm_args (string args[$]);
ivl_uvm_clp_args = m_uvm_argv;
endfunction
// Function: get_arg_matches
//
// This function loads a queue with all of the arguments that
// match the input expression and returns the number of items
// that matched. If the input expression is bracketed
// with //, then it is taken as an extended regular expression
// otherwise, it is taken as the beginning of an argument to match.
// For example:
//
//| string myargs[$]
//| initial begin
//| void'(uvm_cmdline_proc.get_arg_matches("+foo",myargs)); //matches +foo, +foobar
//| //doesn't match +barfoo
//| void'(uvm_cmdline_proc.get_arg_matches("/foo/",myargs)); //matches +foo, +foobar,
//| //foo.sv, barfoo, etc.
//| void'(uvm_cmdline_proc.get_arg_matches("/^foo.*\.sv",myargs)); //matches foo.sv
//| //and foo123.sv,
//| //not barfoo.sv.
`ifndef IVL_UVM
function int get_arg_matches (string match, ref string args[$]);
`else
function int get_arg_matches (string match, string unused_args[$]);
`endif // IVL_UVM
`ifndef UVM_CMDLINE_NO_DPI
chandle exp_h = null;
int len = match.len();
ivl_uvm_clp_args.delete();
if((match.len() > 2) && (match[0] == "/") && (match[match.len()-1] == "/")) begin
match = match.substr(1,match.len()-2);
exp_h = uvm_dpi_regcomp(match);
if(exp_h == null) begin
uvm_report_error("UVM_CMDLINE_PROC", {"Unable to compile the regular expression: ", match}, UVM_NONE);
return 0;
end
end
foreach (m_argv[i]) begin
if(exp_h != null) begin
if(!uvm_dpi_regexec(exp_h, m_argv[i]))
ivl_uvm_clp_args.push_back(m_argv[i]);
end
else if((m_argv[i].len() >= len) && (m_argv[i].substr(0,len - 1) == match))
ivl_uvm_clp_args.push_back(m_argv[i]);
end
if(exp_h != null)
uvm_dpi_regfree(exp_h);
`endif
return ivl_uvm_clp_args.size();
endfunction
// Group: Argument Values
// Function: get_arg_value
//
// This function finds the first argument which matches the ~match~ arg and
// returns the suffix of the argument. This is similar to the $value$plusargs
// system task, but does not take a formating string. The return value is
// the number of command line arguments that match the ~match~ string, and
// ~value~ is the value of the first match.
function int get_arg_value (string match, string value);
int chars;
string lv_argv_s;
string lv_val_s;
string lv_argv_substr;
int lv_argv_len;
int lv_len_1;
chars = match.len();
get_arg_value = 0;
foreach (m_argv[i]) begin
// if(m_argv[i].len() >= chars) begin
lv_argv_s = m_argv[i];
lv_argv_len = lv_argv_s.len();
if(lv_argv_len >= chars) begin
// if(m_argv[i].substr(0,chars-1) == match) begin
lv_argv_substr = lv_argv_s.substr(0,chars-1);
if(lv_argv_substr == match) begin
get_arg_value++;
if(get_arg_value == 1) begin
// value = m_argv[i].substr(chars,m_argv[i].len()-1);
lv_len_1 = lv_argv_s.len()-1;
lv_val_s = lv_argv_s.substr(chars,lv_len_1);
end
end
end
end
endfunction
// Function: get_arg_values
//
// This function finds all the arguments which matches the ~match~ arg and
// returns the suffix of the arguments in a list of values. The return
// value is the number of matches that were found (it is the same as
// values.size() ).
// For example if '+foo=1,yes,on +foo=5,no,off' was provided on the command
// line and the following code was executed:
//
//| string foo_values[$]
//| initial begin
//| void'(uvm_cmdline_proc.get_arg_values("+foo=",foo_values));
//|
//
// The foo_values queue would contain two entries. These entries are shown
// here:
//
// 0 - "1,yes,on"
// 1 - "5,no,off"
//
// Splitting the resultant string is left to user but using the
// uvm_split_string() function is recommended.
function int get_arg_values (string match, string values[$]);
int chars;
chars = match.len();
values.delete();
`ifndef IVL_UVM
foreach (m_argv[i]) begin
if(m_argv[i].len() >= chars) begin
if(m_argv[i].substr(0,chars-1) == match)
values.push_back(m_argv[i].substr(chars,m_argv[i].len()-1));
end
end
`endif // IVL_UVM
return values.size();
endfunction
// Group: Tool information
// Function: get_tool_name
//
// Returns the simulation tool that is executing the simlation.
// This is a vendor specific string.
function string get_tool_name ();
return uvm_dpi_get_tool_name();
endfunction
// Function: get_tool_version
//
// Returns the version of the simulation tool that is executing the simlation.
// This is a vendor specific string.
function string get_tool_version ();
return uvm_dpi_get_tool_version();
endfunction
// constructor
`ifndef IVL_UVM
function void ivl_uvm_new (string name = "");
string s;
string sub;
do begin
s = uvm_dpi_get_next_arg();
if(s!="") begin
m_argv.push_back(s);
if(s[0] == "+") begin
m_plus_argv.push_back(s);
end
if(s.len() >= 4 && (s[0]=="-" || s[0]=="+")) begin
sub = s.substr(1,3);
sub = sub.toupper();
if(sub == "UVM")
m_uvm_argv.push_back(s);
end
end
end while(s!="");
// Group: Command Line Debug
// Variable: +UVM_DUMP_CMDLINE_ARGS
//
// ~+UVM_DUMP_CMDLINE_ARGS~ allows the user to dump all command line arguments to the
// reporting mechanism. The output in is tree format.
// The implementation of this is in uvm_root.
// Group: Built-in UVM Aware Command Line Arguments
// Variable: +UVM_TESTNAME
//
// ~+UVM_TESTNAME=<class name>~ allows the user to specify which uvm_test (or
// uvm_component) should be created via the factory and cycled through the UVM phases.
// If multiple of these settings are provided, the first occurrence is used and a warning
// is issued for subsequent settings. For example:
//
//| <sim command> +UVM_TESTNAME=read_modify_write_test
//
// The implementation of this is in uvm_root since this is procedurally invoked via
// ovm_root::run_test().
// Variable: +UVM_VERBOSITY
//
// ~+UVM_VERBOSITY=<verbosity>~ allows the user to specify the initial verbosity
// for all components. If multiple of these settings are provided, the first occurrence
// is used and a warning is issued for subsequent settings. For example:
//
//| <sim command> +UVM_VERBOSITY=UVM_HIGH
//
// The implementation of this is in uvm_root since this is procedurally invoked via
// ovm_root::new().
// Variable: +uvm_set_verbosity
//
// ~+uvm_set_verbosity=<comp>,<id>,<verbosity>,<phase>~ and
// ~+uvm_set_verbosity=<comp>,<id>,<verbosity>,time,<time>~ allow the users to manipulate the
// verbosity of specific components at specific phases (and times during the "run" phases)
// of the simulation. The ~id~ argument can be either ~_ALL_~ for all IDs or a
// specific message id. Wildcarding is not supported for ~id~ due to performance concerns.
// Settings for non-"run" phases are executed in order of occurrence on the command line.
// Settings for "run" phases (times) are sorted by time and then executed in order of
// occurrence for settings of the same time. For example:
//
//| <sim command> +uvm_set_verbosity=uvm_test_top.env0.agent1.*,_ALL_,UVM_FULL,time,800
//
// Variable: +uvm_set_action
//
// ~+uvm_set_action=<comp>,<id>,<severity>,<action>~ provides the equivalent of
// various uvm_report_object's set_report_*_action APIs. The special keyword,
// ~_ALL_~, can be provided for both/either the ~id~ and/or ~severity~ arguments. The
// action can be UVM_NO_ACTION or a | separated list of the other UVM message
// actions. For example:
//
//| <sim command> +uvm_set_action=uvm_test_top.env0.*,_ALL_,UVM_ERROR,UVM_NO_ACTION
//
// Variable: +uvm_set_severity
//
// ~+uvm_set_severity=<comp>,<id>,<current severity>,<new severity>~ provides the
// equivalent of the various uvm_report_object's set_report_*_severity_override APIs. The
// special keyword, ~_ALL_~, can be provided for both/either the ~id~ and/or
// ~current severity~ arguments. For example:
//
//| <sim command> +uvm_set_severity=uvm_test_top.env0.*,BAD_CRC,UVM_ERROR,UVM_WARNING
//
// Variable: +UVM_TIMEOUT
//
// ~+UVM_TIMEOUT=<timeout>,<overridable>~ allows users to change the global timeout of the UVM
// framework. The <overridable> argument ('YES' or 'NO') specifies whether user code can subsequently
// change this value. If set to 'NO' and the user code tries to change the global timeout value, an
// warning message will be generated.
//
//| <sim command> +UVM_TIMEOUT=200000,NO
//
// The implementation of this is in uvm_root.
// Variable: +UVM_MAX_QUIT_COUNT
//
// ~+UVM_MAX_QUIT_COUNT=<count>,<overridable>~ allows users to change max quit count for the report
// server. The <overridable> argument ('YES' or 'NO') specifies whether user code can subsequently
// change this value. If set to 'NO' and the user code tries to change the max quit count value, an
// warning message will be generated.
//
//| <sim command> +UVM_MAX_QUIT_COUNT=5,NO
//
// Variable: +UVM_PHASE_TRACE
//
// ~+UVM_PHASE_TRACE~ turns on tracing of phase executions. Users simply need to put the
// argument on the command line.
// Variable: +UVM_OBJECTION_TRACE
//
// ~+UVM_OBJECTION_TRACE~ turns on tracing of objection activity. Users simply need to put the
// argument on the command line.
// Variable: +UVM_RESOURCE_DB_TRACE
//
// ~+UVM_RESOURCE_DB_TRACE~ turns on tracing of resource DB access.
// Users simply need to put the argument on the command line.
// Variable: +UVM_CONFIG_DB_TRACE
//
// ~+UVM_CONFIG_DB_TRACE~ turns on tracing of configuration DB access.
// Users simply need to put the argument on the command line.
// Variable: +uvm_set_inst_override, +uvm_set_type_override
//
// ~+uvm_set_inst_override=<req_type>,<override_type>,<full_inst_path>~ and
// ~+uvm_set_type_override=<req_type>,<override_type>[,<replace>]~ work
// like the name based overrides in the factory--factory.set_inst_override_by_name()
// and factory.set_type_override_by_name().
// For uvm_set_type_override, the third argument is 0 or 1 (the default is
// 1 if this argument is left off); this argument specifies whether previous
// type overrides for the type should be replaced. For example:
//
//| <sim command> +uvm_set_type_override=eth_packet,short_eth_packet
//
// The implementation of this is in uvm_root.
// Variable: +uvm_set_config_int, +uvm_set_config_string
//
// ~+uvm_set_config_int=<comp>,<field>,<value>~ and
// ~+uvm_set_config_string=<comp>,<field>,<value>~ work like their
// procedural counterparts: set_config_int() and set_config_string(). For
// the value of int config settings, 'b (0b), 'o, 'd, 'h ('x or 0x)
// as the first two characters of the value are treated as base specifiers
// for interpreting the base of the number. Size specifiers are not used
// since SystemVerilog does not allow size specifiers in string to
// value conversions. For example:
//
//| <sim command> +uvm_set_config_int=uvm_test_top.soc_env,mode,5
//
// No equivalent of set_config_object() exists since no way exists to pass an
// uvm_object into the simulation via the command line.
//
// The implementation of this is in uvm_root.
endfunction
`endif // IVL_UVM
function bit m_convert_verb(string verb_str, uvm_verbosity verb_enum);
case (verb_str)
"NONE" : begin verb_enum = UVM_NONE; return 1; end
"UVM_NONE" : begin verb_enum = UVM_NONE; return 1; end
"LOW" : begin verb_enum = UVM_LOW; return 1; end
"UVM_LOW" : begin verb_enum = UVM_LOW; return 1; end
"MEDIUM" : begin verb_enum = UVM_MEDIUM; return 1; end
"UVM_MEDIUM" : begin verb_enum = UVM_MEDIUM; return 1; end
"HIGH" : begin verb_enum = UVM_HIGH; return 1; end
"UVM_HIGH" : begin verb_enum = UVM_HIGH; return 1; end
"FULL" : begin verb_enum = UVM_FULL; return 1; end
"UVM_FULL" : begin verb_enum = UVM_FULL; return 1; end
"DEBUG" : begin verb_enum = UVM_DEBUG; return 1; end
"UVM_DEBUG" : begin verb_enum = UVM_DEBUG; return 1; end
default : begin return 0; end
endcase
endfunction
// m_do_timeout_settings
// ---------------------
// Variable: +UVM_MAX_QUIT_COUNT
function void ivl_uvm_handle_clp_args ();
int lv_tmp_count;
lv_tmp_count = `IVL_UVM_VPA ("UVM_MAX_QUIT_COUNT=%d", ivl_uvm_max_quit_count);
endfunction : ivl_uvm_handle_clp_args
function void m_do_timeout_settings();
string timeout_settings[$];
string timeout;
string split_timeout[$];
int timeout_count;
time timeout_int;
string override_spec;
int lv_int;
timeout_count = `IVL_UVM_VPA ("UVM_TIMEOUT=%d", timeout_int);
if (timeout_count == 0) begin
ivl_uvm_glb_timeout = 1ms;
timeout_int = 1;
end else begin
timeout = timeout_settings[0];
timeout = $sformatf ("%0d", timeout_int);
ivl_uvm_glb_timeout = timeout_int * 1ms;
if (timeout_count > 1) begin
string timeout_list;
string sep;
for (int i = 0; i < timeout_settings.size(); i++) begin
if (i != 0)
sep = "; ";
timeout_list = {timeout_list, sep, timeout_settings[i]};
end
uvm_report_warning("MULTTIMOUT",
$sformatf("Multiple (%0d) +UVM_TIMEOUT arguments provided on the command line. '%s' will be used. Provided list: %s.",
timeout_count, timeout, timeout_list), UVM_NONE);
end
uvm_report_info("TIMOUTSET",
$sformatf("'+UVM_TIMEOUT=%s' provided on the command line is being applied.", timeout), UVM_NONE);
/*
lv_int = $sscanf(timeout,"%d,%s",timeout_int,override_spec);
case(override_spec)
"YES" : set_timeout(timeout_int, 1);
"NO" : set_timeout(timeout_int, 0);
default : set_timeout(timeout_int, 1);
endcase
*/
end
ivl_uvm_glb_timeout = timeout_int * ivl_uvm_glb_timeout;
uvm_report_info("TIMOUTSET",
$sformatf("'+UVM_TIMEOUT=%0d' Global Timeout: %0t", timeout_int, ivl_uvm_glb_timeout), UVM_NONE);
/*
uvm_report_info("TIMOUTSET",
$sformatf("ivl_uvm_glb_timeout: %0d", ivl_uvm_glb_timeout), UVM_NONE)
*/
endfunction : m_do_timeout_settings
initial begin
$timeformat (-9, 3, " ns", 3);
#1;
`g2u_display ("CLP")
m_do_timeout_settings();
ivl_uvm_handle_clp_args ();
#(ivl_uvm_glb_timeout);
`uvm_error ("IVL_UVM",
$sformatf ("Reached Timeout value of: %0t ", ivl_uvm_glb_timeout))
`g2u_display ("Ending the Simulation; Check for hanging threads/inactivity in your simulation run")
// report_summarize();
$finish (2);
end
final begin
report_summarize();
end
endmodule : ivl_uvm_cmdline_processor
`endif //UVM_CMDLINE_PROC_PKG_SV

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// ========== Copyright Header Begin ==========================
//
// Project: IVL_UVM
// File: ivl_uvm_comps.svh
// Author(s): Srinivasan Venkataramanan
//
// Copyright (c) VerifWorks 2016-2020 All Rights Reserved.
// Contact us via: support@verifworks.com
// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
//
// This program is free software; you can redistribute it and/or
// modify it under the terms of the GNU General Public
// License version 3 as published by the Free Software Foundation.
//
// This program is distributed in the hope that it will be
// useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
// General Public License for more details.
//
// You should have received a copy of the GNU General Public
// License along with this work; if not, write to the Free Software
//
// ========== Copyright Header End ============================
////////////////////////////////////////////////////////////////////////
class uvm_sequence_item extends uvm_object;
int sequence_id;
function new (string name = "uvm_sequence_item");
super.new (name);
endfunction : new
endclass : uvm_sequence_item
class uvm_report_object extends uvm_object;
function new (string name = "uvm_report_object");
super.new (name);
endfunction : new
endclass : uvm_report_object
class uvm_phase extends uvm_object;
function new (string name = "uvm_phase");
super.new (name);
endfunction : new
endclass : uvm_phase
virtual class uvm_component extends uvm_report_object;
function new (string name = "uvm_component", uvm_component parent);
super.new (name);
endfunction : new
virtual function void build_phase(uvm_phase phase);
`g2u_display ("build_phase", UVM_HIGH)
endfunction : build_phase
virtual function void connect_phase(uvm_phase phase);
`g2u_display ("connect_phase", UVM_HIGH)
endfunction : connect_phase
virtual function void end_of_elaboration_phase(uvm_phase phase);
`g2u_display ("end_of_elaboration_phase", UVM_HIGH)
endfunction : end_of_elaboration_phase
virtual function void start_of_simulation_phase(uvm_phase phase);
`g2u_display ("start_of_simulation_phase", UVM_HIGH)
endfunction : start_of_simulation_phase
virtual task run_phase (uvm_phase phase);
`g2u_display ("run_phase", UVM_HIGH)
this.print (uvm_default_printer);
endtask : run_phase
virtual function void extract_phase(uvm_phase phase);
endfunction : extract_phase
virtual function void check_phase(uvm_phase phase);
endfunction : check_phase
virtual function void report_phase(uvm_phase phase);
endfunction : report_phase
virtual function void final_phase(uvm_phase phase);
endfunction : final_phase
virtual task ivl_uvm_run_all_phases ();
uvm_phase u_ph_0;
u_ph_0 = new();
this.build_phase (u_ph_0);
this.connect_phase (u_ph_0);
this.end_of_elaboration_phase (u_ph_0);
this.start_of_simulation_phase (u_ph_0);
this.run_phase (u_ph_0);
this.extract_phase (u_ph_0);
this.check_phase (u_ph_0);
this.report_phase (u_ph_0);
this.final_phase (u_ph_0);
endtask : ivl_uvm_run_all_phases
endclass : uvm_component
virtual class uvm_test extends uvm_component;
function new (string name = "uvm_test", uvm_component parent = null);
super.new (name, parent);
`g2u_display ("%m");
endfunction : new
endclass : uvm_test
// Default concrete test so run_test() can instantiate when no +define+UVM_TESTNAME=... is given.
// (Icarus elaboration rejects new() on a virtual class type.)
class ivl_uvm_default_test extends uvm_test;
function new (string name = "ivl_uvm_default_test", uvm_component parent = null);
super.new(name, parent);
endfunction
endclass : ivl_uvm_default_test

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// ========== Copyright Header Begin ==========================
//
// Project: IVL_UVM
// File: ivl_uvm_macros.svh
// Author(s): Srinivasan Venkataramanan
//
// Copyright (c) VerifWorks 2016-2020 All Rights Reserved.
// Contact us via: support@verifworks.com
// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
//
// This program is free software; you can redistribute it and/or
// modify it under the terms of the GNU General Public
// License version 3 as published by the Free Software Foundation.
//
// This program is distributed in the hope that it will be
// useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
// General Public License for more details.
//
// You should have received a copy of the GNU General Public
// License along with this work; if not, write to the Free Software
//
// ========== Copyright Header End ============================
////////////////////////////////////////////////////////////////////////
`ifndef IVL_UVM_MACROS
`define IVL_UVM_MACROS
`define g2u_display(MSG, VERBOSITY=UVM_MEDIUM) \
begin \
if (uvm_report_enabled(VERBOSITY,UVM_INFO,get_name())) begin \
uvm_report_info (get_name(), MSG, VERBOSITY, `uvm_file, `uvm_line); \
uvm_count_info(); \
end \
end
`define g2u_rand(obj, CNST = {} ) \
begin \
int rval; \
rval = obj.randomize() with CNST ; \
if (!rval) \
$error ("Randomization failed"); \
end
`define g2u_printf(FORMAT_MSG,VERBOSITY=UVM_MEDIUM) \
begin \
if (uvm_report_enabled(VERBOSITY,UVM_INFO,get_name())) \
uvm_report_info (get_name(), $sformatf FORMAT_MSG, VERBOSITY, `uvm_file, `uvm_line); \
end
`define GO2UVM_DISP_ARG(arg) `"arg`"
`define IVL_UVM_VPA $value$plusargs
`ifndef UVM_TESTNAME
`define UVM_TESTNAME ivl_uvm_default_test
`endif // UVM_TESTNAME
`ifndef IVL_UVM_MBX_T
`define IVL_UVM_MBX_T int
`else
typedef class `IVL_UVM_MBX_T;
`endif // IVL_UVM_MBX_T
`endif // IVL_UVM_MACROS
`include "uvm_macros.svh"

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`ifndef IVL_UVM_MBX_T
`define IVL_UVM_MBX_T int
`endif
// Poor man's mailbox
// Default size = 1 in SV
// Here, only size-1 is supported as of now
// Also no parameterized classes in Icarus (yet), so using a `define
//
// Only one type of mailbox is supported as of now
//
class ivl_uvm_mbx extends uvm_object;
bit is_full;
bit is_empty;
int m_size;
`IVL_UVM_MBX_T m_mbx_val;
function new (string name = "mailbox_int");
super.new (name);
is_full = 0;
is_empty = 1;
endfunction : new
virtual task put (input `IVL_UVM_MBX_T in_xn);
//wait (is_full == 0);
while (is_full == 1) begin
#1;
end
m_mbx_val = in_xn;
//`g2u_printf (("MBX: Put: 0x%0h", in_xn))
is_full = 1;
is_empty = 0;
endtask : put
virtual task get (output `IVL_UVM_MBX_T out_xn);
//wait (is_empty == 0);
while (is_empty == 1) begin
#1;
end
out_xn = m_mbx_val;
//`g2u_printf (("MBX: Get: 0x%0h", out_xn))
is_full = 0;
is_empty = 1;
endtask : get
virtual task peek (output `IVL_UVM_MBX_T out_xn);
//wait (is_empty == 0);
while (is_empty == 1) begin
#1;
end
out_xn = m_mbx_val;
//`g2u_printf (("MBX: Peek: 0x%0h", out_xn))
endtask : peek
virtual function int num ();
return (is_full);
endfunction : num
endclass : ivl_uvm_mbx

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// ========== Copyright Header Begin ==========================
//
// Project: IVL_UVM
// File: ivl_uvm_pkg.sv
// Author(s): Anirudh Pradyumnan (apseng03@gmail.com)
// Srinivasan Venkataramanan
//
// Copyright (c) VerifWorks 2016-2020 All Rights Reserved.
// Contact us via: support@verifworks.com
// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
//
// This program is free software; you can redistribute it and/or
// modify it under the terms of the GNU General Public
// License version 3 as published by the Free Software Foundation.
//
// This program is distributed in the hope that it will be
// useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
// General Public License for more details.
//
// You should have received a copy of the GNU General Public
// License along with this work; if not, write to the Free Software
//
// ========== Copyright Header End ============================
////////////////////////////////////////////////////////////////////////
function void uvm_count_info();
uvm_info_counter++;
endfunction : uvm_count_info
function void uvm_count_warn();
uvm_warn_counter++;
endfunction : uvm_count_warn
function void uvm_count_err();
uvm_err_counter++;
// For debug $display ("UVM_MAX_QUIT_COUNT: %0d cur_num_err: %0d ", ivl_uvm_max_quit_count, uvm_err_counter);
if (uvm_err_counter >= ivl_uvm_max_quit_count) begin
$display ( "%c[1;31m",27 ) ; // RED color
$display ("Reached UVM_MAX_QUIT_COUNT: %0d cur_num_err: %0d, ending simulation", ivl_uvm_max_quit_count, uvm_err_counter);
$display ( "%c[0m",27 ) ;
report_summarize ();
$finish (2);
end
endfunction : uvm_count_err
function void uvm_count_fatal();
uvm_fatal_counter++;
endfunction : uvm_count_fatal
function void report_summarize ();
int num_errs;
if (!report_summarize_done) begin : do_it_only_once
report_summarize_done = 1;
$display("");
$display("--- UVM Report Summary ---");
$display("");
$display("** Report counts by severity");
$display ("UVM_INFO : %0d", uvm_info_counter);
$display ("UVM_WARNING : %0d", uvm_warn_counter);
$display ("UVM_ERROR : %0d", uvm_err_counter);
$display ("UVM_FATAL : %0d", uvm_fatal_counter);
num_errs = uvm_err_counter;
if(num_errs > 0) begin : fail
$display ( "%c[1;31m",27 ) ; // RED color
$display ("Test FAILED with %0d error(s), look for UVM_ERROR in log file",
num_errs);
$display ( "%c[0m",27 ) ;
end : fail
else begin : pass
$display ( "%c[5;34m",27 ) ; // BLUE color
$display ( "*** Congratulations! Test PASSED with NO UVM_ERRORs ***" ) ;
$display ( "%c[0m",27 ) ;
end : pass
`uvm_info (log_id,
"Thanks for using IVL_UVM Package",
UVM_NONE)
end : do_it_only_once
endfunction : report_summarize
function void uvm_report_info( string id,
string message,
int verbosity,
string filename = "",
int line = 0);
string msg_str;
`ifndef IVL_UVM
m_rh.report(UVM_INFO, get_full_name(), id, message, verbosity,
filename, line, this);
`else
msg_str = ivl_uvm_compose_message(UVM_INFO, id, message, filename, line);
uvm_count_info();
$display (msg_str);
`endif // IVL_UVM
endfunction : uvm_report_info
// Function: uvm_report_warning
function void uvm_report_warning( string id,
string message,
int verbosity = UVM_MEDIUM,
string filename = "",
int line = 0);
string msg_str;
`ifndef IVL_UVM
m_rh.report(UVM_WARNING, get_full_name(), id, message, verbosity,
filename, line, this);
`else
msg_str = ivl_uvm_compose_message(UVM_WARNING, id, message, filename, line);
uvm_count_warn();
$display (msg_str);
`endif // IVL_UVM
endfunction
// Function: uvm_report_error
function void uvm_report_error( string id,
string message,
int verbosity = UVM_LOW,
string filename = "",
int line = 0);
string msg_str;
`ifndef IVL_UVM
m_rh.report(UVM_ERROR, get_full_name(), id, message, verbosity,
filename, line, this);
`else
msg_str = ivl_uvm_compose_message(UVM_ERROR, id, message, filename, line);
uvm_count_err ();
$display (msg_str);
`endif // IVL_UVM
endfunction
// Function: uvm_report_fatal
//
// These are the primary reporting methods in the UVM. Using these instead
// of ~$display~ and other ad hoc approaches ensures consistent output and
// central control over where output is directed and any actions that
// result. All reporting methods have the same arguments, although each has
// a different default verbosity:
//
// id - a unique id for the report or report group that can be used
// for identification and therefore targeted filtering. You can
// configure an individual report's actions and output file(s)
// using this id string.
//
// message - the message body, preformatted if necessary to a single
// string.
//
// verbosity - the verbosity of the message, indicating its relative
// importance. If this number is less than or equal to the
// effective verbosity level, see <set_report_verbosity_level>,
// then the report is issued, subject to the configured action
// and file descriptor settings. Verbosity is ignored for
// warnings, errors, and fatals. However, if a warning, error
// or fatal is demoted to an info message using the
// <uvm_report_catcher>, then the verbosity is taken into
// account.
//
// filename/line - (Optional) The location from which the report was issued.
// Use the predefined macros, `__FILE__ and `__LINE__.
// If specified, it is displayed in the output.
function void uvm_report_fatal( string id,
string message,
int verbosity = UVM_NONE,
string filename = "",
int line = 0);
string msg_str;
`ifndef IVL_UVM
m_rh.report(UVM_FATAL, get_full_name(), id, message, verbosity,
filename, line, this);
`else
msg_str = ivl_uvm_compose_message(UVM_FATAL, id, message, filename, line);
uvm_count_fatal ();
$display (msg_str);
report_summarize ();
$finish (2);
`endif // IVL_UVM
endfunction
function string get_uvm_severity_type_str (uvm_severity severity);
string res;
case (severity)
0 : res = "UVM_INFO";
1 : res = "UVM_WARNING";
2 : res = "UVM_ERROR";
3 : res = "UVM_FATAL";
endcase
return (res);
endfunction : get_uvm_severity_type_str
function string ivl_uvm_compose_message(
uvm_severity severity,
string id,
string message,
string filename,
int line
);
string sv;
string time_str;
string line_str;
string name;
// sv = uvm_severity_type'(severity);
sv = get_uvm_severity_type_str (severity);
$swrite(time_str, "%0t", $realtime);
case(1)
(name == "" && filename == ""):
return {sv, " @ ", time_str, " [", id, "] ", message};
(name != "" && filename == ""):
return {sv, " @ ", time_str, ": ", name, " [", id, "] ", message};
(name == "" && filename != ""):
begin
$swrite(line_str, "%0d", line);
return {sv, " ",filename, "(", line_str, ")", " @ ", time_str, " [", id, "] ", message};
end
(name != "" && filename != ""):
begin
$swrite(line_str, "%0d", line);
return {sv, " ", filename, "(", line_str, ")", " @ ", time_str, ": ", name, " [", id, "] ", message};
end
endcase
endfunction : ivl_uvm_compose_message

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// ========== Copyright Header Begin ==========================
//
// Project: IVL_UVM
// File: ivl_uvm_patches.svh
// Author(s): Srinivasan Venkataramanan
//
// Copyright (c) VerifWorks 2016-2020 All Rights Reserved.
// Contact us via: support@verifworks.com
// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
//
// This program is free software; you can redistribute it and/or
// modify it under the terms of the GNU General Public
// License version 3 as published by the Free Software Foundation.
//
// This program is distributed in the hope that it will be
// useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
// General Public License for more details.
//
// You should have received a copy of the GNU General Public
// License along with this work; if not, write to the Free Software
//
// ========== Copyright Header End ============================
////////////////////////////////////////////////////////////////////////
`ifndef __IVL_UVM_PATCHES__
`define __IVL_UVM_PATCHES__
`define IVL_UVM_I419
// Function: uvm_report_enabled
//
// Returns 1 if the configured verbosity for this severity/id is greater than
// ~verbosity~ and the action associated with the given ~severity~ and ~id~
// is not UVM_NO_ACTION, else returns 0.
//
// See also <get_report_verbosity_level> and <get_report_action>, and the
// global version of <uvm_report_enabled>.
function int uvm_report_enabled(int verbosity,
uvm_severity severity=UVM_INFO, string id="");
if (get_report_verbosity_level(severity, id) < verbosity) begin
// get_report_action(severity,id) == uvm_action'(UVM_NO_ACTION)) */
return 0;
end else begin
return 1;
end
endfunction : uvm_report_enabled
function void m_check_verbosity();
string verb_string;
int verb_count;
int plusarg;
int verbosity;
verbosity = 10;
verb_count = $value$plusargs("UVM_VERBOSITY=%s", verb_string);
verbosity = int'(UVM_MEDIUM);
if (verb_count) begin
if (verb_string == "UVM_NONE" || verb_string == "NONE") begin
verbosity = int'(UVM_NONE);
end
if (verb_string == "UVM_LOW" || verb_string == "LOW") begin
verbosity = int'(UVM_LOW);
end
if (verb_string == "UVM_MEDIUM" || verb_string == "MEDIUM") begin
verbosity = int'(UVM_MEDIUM);
end
if (verb_string == "UVM_HIGH" || verb_string == "HIGH") begin
verbosity = int'(UVM_HIGH);
end
if (verb_string == "UVM_FULL" || verb_string == "FULL") begin
verbosity = int'(UVM_FULL);
end
if (verb_string == "UVM_DEBUG" || verb_string == "DEBUG") begin
verbosity = int'(UVM_DEBUG);
end
/*
case(verb_string)
"UVM_NONE" : verbosity = UVM_NONE;
"NONE" : verbosity = UVM_NONE;
"UVM_LOW" : verbosity = UVM_LOW;
"LOW" : verbosity = UVM_LOW;
"UVM_MEDIUM" : verbosity = UVM_MEDIUM;
"MEDIUM" : verbosity = UVM_MEDIUM;
"UVM_HIGH" : verbosity = UVM_HIGH;
"HIGH" : verbosity = UVM_HIGH;
"UVM_FULL" : verbosity = UVM_FULL;
"FULL" : verbosity = UVM_FULL;
"UVM_DEBUG" : verbosity = UVM_DEBUG;
"DEBUG" : verbosity = UVM_DEBUG;
default : verbosity = UVM_MEDIUM;
endcase
*/
end
ivl_uvm_glb_verb = verbosity;
endfunction : m_check_verbosity
// Function: get_report_verbosity_level
//
// Gets the verbosity level in effect for this object. Reports issued
// with verbosity greater than this will be filtered out. The severity
// and tag arguments check if the verbosity level has been modified for
// specific severity/tag combinations.
function int get_report_verbosity_level(uvm_severity severity=UVM_INFO, string id="");
m_check_verbosity ();
return ivl_uvm_glb_verb;
endfunction : get_report_verbosity_level
function string get_name ();
return "IVL_GO2UVM";
endfunction : get_name
typedef class uvm_report_object;
class uvm_object_wrapper;
endclass : uvm_object_wrapper
class uvm_objection;
endclass
class uvm_printer;
endclass
class uvm_recorder;
endclass
class uvm_comparer;
endclass
class uvm_packer;
endclass
class uvm_copy_map;
endclass
// typedef bit uvm_bitstream_t;
class uvm_status_container;
endclass : uvm_status_container
`define IVL_UVM_REF
`endif // __IVL_UVM_PATCHES__

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// ========== Copyright Header Begin ==========================
//
// Project: IVL_UVM
// File: ivl_uvm_pkg.sv
// Author(s): Anirudh Pradyumnan (apseng03@gmail.com)
// Srinivasan Venkataramanan
//
// Copyright (c) VerifWorks 2016-2020 All Rights Reserved.
// Contact us via: support@verifworks.com
// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
//
// This program is free software; you can redistribute it and/or
// modify it under the terms of the GNU General Public
// License version 3 as published by the Free Software Foundation.
//
// This program is distributed in the hope that it will be
// useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
// General Public License for more details.
//
// You should have received a copy of the GNU General Public
// License along with this work; if not, write to the Free Software
//
// ========== Copyright Header End ============================
////////////////////////////////////////////////////////////////////////
`ifndef IVL_UVM_PKG
`define IVL_UVM_PKG
`define IVL_UVM
`define UVM_CMDLINE_NO_DPI
`timescale 1ns/1ns
package ivl_uvm_pkg;
`include "ivl_uvm_macros.svh"
`include "ivl_uvm_types.svh"
`include "ivl_uvm_patches.svh"
`include "ivl_uvm_msg.svh"
`include "base/uvm_misc.svh"
`include "base/uvm_object.svh"
`include "ivl_uvm_comps.svh"
`include "ivl_uvm_mbx.svh"
`include "ivl_uvm_tlm.svh"
`UVM_TESTNAME uvm_test_top;
task run_test ();
`g2u_printf (( "Using UVM_TESTNAME: %s", `GO2UVM_DISP_ARG (`UVM_TESTNAME) ))
uvm_test_top = new ("uvm_test_top", null);
uvm_test_top.ivl_uvm_run_all_phases();
endtask : run_test
endpackage : ivl_uvm_pkg
import ivl_uvm_pkg::*;
`include "ivl_uvm_clp.svh"
// The below file is now part of user's file-list as last file
// `include "ivl_uvm_top.svh"
`endif // IVL_UVM_PKG

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class ivl_uvm_semaphore;
int cur_key_count;
function new (int keyCount = 0);
this.cur_key_count = keyCount;
endfunction : new
function void put (int keyCount = 1);
this.cur_key_count += keyCount;
endfunction : put
task get (int keyCount = 1);
while (this.cur_key_count < keyCount) begin
#1;
end
this.cur_key_count -= keyCount;
endtask : get
function int try_get (int keyCount = 1);
try_get = 0;
if (this.cur_key_count >= keyCount) begin
try_get = this.cur_key_count;
this.cur_key_count -= keyCount;
end
endfunction : try_get
endclass : ivl_uvm_semaphore
module t;
ivl_uvm_semaphore sm_0;
initial begin : test
sm_0 = new(1);
$display ("SM: cur_key: %0d", sm_0.cur_key_count);
end : test
endmodule : t

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class ivl_uvm_tlm_base extends uvm_component;
function new (string name = "ivl_uvm_tlm_base", uvm_component parent = null);
super.new (name, parent);
endfunction : new
endclass : ivl_uvm_tlm_base
class ivl_uvm_tlm_pull_export extends ivl_uvm_tlm_base;
function new (string name = "ivl_uvm_tlm_pull_port", uvm_component parent = null);
super.new (name, parent);
endfunction : new
endclass : ivl_uvm_tlm_pull_export
class ivl_uvm_tlm_pull_port extends ivl_uvm_tlm_base;
bit is_full;
bit is_empty;
int m_size;
`IVL_UVM_MBX_T m_mbx_val;
function new (string name = "ivl_uvm_tlm_pull_port", uvm_component parent = null);
super.new (name, parent);
is_full = 0;
is_empty = 1;
endfunction : new
virtual task put (input `IVL_UVM_MBX_T in_xn);
//wait (is_full == 0);
while (is_full == 1) begin
#1;
end
m_mbx_val = in_xn;
`g2u_printf (("%m Put: "))
is_full = 1;
is_empty = 0;
endtask : put
virtual task get (output `IVL_UVM_MBX_T out_xn);
//wait (is_empty == 0);
while (is_empty == 1) begin
#1;
end
out_xn = m_mbx_val;
is_full = 0;
is_empty = 1;
`g2u_printf (("%m Get: "))
endtask : get
virtual function bit try_get (`IVL_UVM_MBX_T out_xn);
bit rval;
if (is_empty == 0) begin
is_full = 0;
is_empty = 1;
out_xn = m_mbx_val;
rval = 1;
end
endfunction : try_get
virtual task peek (output `IVL_UVM_MBX_T out_xn);
//wait (is_empty == 0);
while (is_empty == 1) begin
#1;
end
out_xn = m_mbx_val;
`g2u_printf (("%m Peek: "))
endtask : peek
virtual function int num ();
return (is_full);
endfunction : num
virtual function void connect (ivl_uvm_tlm_pull_export unused_tlm_exp);
endfunction : connect
virtual task get_next_item (output `IVL_UVM_MBX_T x0);
`g2u_printf (("%m get_next_item: "))
peek(x0);
endtask : get_next_item
virtual function void item_done ();
bit rval;
`IVL_UVM_MBX_T x0;
rval = try_get(x0);
endfunction : item_done
endclass : ivl_uvm_tlm_pull_port

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module ivl_uvm_top;
import ivl_uvm_pkg::*;
/*
`UVM_TESTNAME uvm_test_top;
initial begin : m_top
$timeformat (-9, 3, " ns", 3);
`g2u_printf (( "Using UVM_TESTNAME: %s", `GO2UVM_DISP_ARG (`UVM_TESTNAME) ))
uvm_test_top = new ("uvm_test_top", null);
end : m_top
*/
final begin
report_summarize();
end
endmodule : ivl_uvm_top

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// ========== Copyright Header Begin ==========================
//
// Project: IVL_UVM
// File: ivl_uvm_types.svh
// Author(s): Srinivasan Venkataramanan
//
// Copyright (c) VerifWorks 2016-2020 All Rights Reserved.
// Contact us via: support@verifworks.com
// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
//
// This program is free software; you can redistribute it and/or
// modify it under the terms of the GNU General Public
// License version 3 as published by the Free Software Foundation.
//
// This program is distributed in the hope that it will be
// useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
// General Public License for more details.
//
// You should have received a copy of the GNU General Public
// License along with this work; if not, write to the Free Software
//
// ========== Copyright Header End ============================
////////////////////////////////////////////////////////////////////////
`ifndef __IVL_UVM_TYPES__
`define __IVL_UVM_TYPES__
`include "base/uvm_object_globals.svh"
int uvm_info_counter;
int uvm_warn_counter;
int uvm_err_counter;
int uvm_fatal_counter;
int ivl_uvm_glb_verb;
bit report_summarize_done;
time ivl_uvm_glb_timeout;
int unsigned ivl_uvm_max_quit_count = '1;
string log_id = "IVL_GO2UVM";
typedef class `UVM_TESTNAME;
`endif // __IVL_UVM_TYPES__

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//-----------------------------------------------------------------------------
// Copyright 2007-2011 Mentor Graphics Corporation
// Copyright 2007-2011 Cadence Design Systems, Inc.
// Copyright 2010 Synopsys, Inc.
// All Rights Reserved Worldwide
//
// Licensed under the Apache License, Version 2.0 (the
// "License"); you may not use this file except in
// compliance with the License. You may obtain a copy of
// the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in
// writing, software distributed under the License is
// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See
// the License for the specific language governing
// permissions and limitations under the License.
//-----------------------------------------------------------------------------
`ifndef UVM_CB_MACROS_SVH
`define UVM_CB_MACROS_SVH
//-----------------------------------------------------------------------------
// Title: Callback Macros
//
// These macros are used to register and execute callbacks extending
// from ~uvm_callbacks~.
//-----------------------------------------------------------------------------
//-----------------------------------------------------------------------------
// MACRO: `uvm_register_cb
//
//| `uvm_register_cb(T,CB)
//
// Registers the given ~CB~ callback type with the given ~T~ object type. If
// a type-callback pair is not registered then a warning is issued if an
// attempt is made to use the pair (add, delete, etc.).
//
// The registration will typically occur in the component that executes the
// given type of callback. For instance:
//
//| virtual class mycb extends uvm_callback;
//| virtual function void doit();
//| endclass
//|
//| class my_comp extends uvm_component;
//| `uvm_register_cb(my_comp,mycb)
//| ...
//| task run_phase(uvm_phase phase);
//| ...
//| `uvm_do_callbacks(my_comp, mycb, doit())
//| endtask
//| endclass
//-----------------------------------------------------------------------------
`define uvm_register_cb(T,CB) \
static local bit m_register_cb_``CB = uvm_callbacks#(T,CB)::m_register_pair(`"T`",`"CB`");
//-----------------------------------------------------------------------------
// MACRO: `uvm_set_super_type
//
//| `uvm_set_super_type(T,ST)
//
// Defines the super type of ~T~ to be ~ST~. This allows for derived class
// objects to inherit typewide callbacks that are registered with the base
// class.
//
// The registration will typically occur in the component that executes the
// given type of callback. For instance:
//
//| virtual class mycb extend uvm_callback;
//| virtual function void doit();
//| endclass
//|
//| class my_comp extends uvm_component;
//| `uvm_register_cb(my_comp,mycb)
//| ...
//| task run_phase(uvm_phase phase);
//| ...
//| `uvm_do_callbacks(my_comp, mycb, doit())
//| endtask
//| endclass
//|
//| class my_derived_comp extends my_comp;
//| `uvm_set_super_type(my_derived_comp,my_comp)
//| ...
//| task run_phase(uvm_phase phase);
//| ...
//| `uvm_do_callbacks(my_comp, mycb, doit())
//| endtask
//| endclass
//-----------------------------------------------------------------------------
`define uvm_set_super_type(T,ST) \
static local bit m_register_``T``ST = uvm_derived_callbacks#(T,ST)::register_super_type(`"T`",`"ST`");
//-----------------------------------------------------------------------------
// MACRO: `uvm_do_callbacks
//
//| `uvm_do_callbacks(T,CB,METHOD)
//
// Calls the given ~METHOD~ of all callbacks of type ~CB~ registered with
// the calling object (i.e. ~this~ object), which is or is based on type ~T~.
//
// This macro executes all of the callbacks associated with the calling
// object (i.e. ~this~ object). The macro takes three arguments:
//
// - CB is the class type of the callback objects to execute. The class
// type must have a function signature that matches the METHOD argument.
//
// - T is the type associated with the callback. Typically, an instance
// of type T is passed as one the arguments in the ~METHOD~ call.
//
// - METHOD is the method call to invoke, with all required arguments as
// if they were invoked directly.
//
// For example, given the following callback class definition:
//
//| virtual class mycb extends uvm_cb;
//| pure function void my_function (mycomp comp, int addr, int data);
//| endclass
//
// A component would invoke the macro as
//
//| task mycomp::run_phase(uvm_phase phase);
//| int curr_addr, curr_data;
//| ...
//| `uvm_do_callbacks(mycb, mycomp, my_function(this, curr_addr, curr_data))
//| ...
//| endtask
//-----------------------------------------------------------------------------
`define uvm_do_callbacks(T,CB,METHOD) \
`uvm_do_obj_callbacks(T,CB,this,METHOD)
//-----------------------------------------------------------------------------
// MACRO: `uvm_do_obj_callbacks
//
//| `uvm_do_obj_callbacks(T,CB,OBJ,METHOD)
//
// Calls the given ~METHOD~ of all callbacks based on type ~CB~ registered with
// the given object, ~OBJ~, which is or is based on type ~T~.
//
// This macro is identical to <`uvm_do_callbacks> macro,
// but it has an additional ~OBJ~ argument to allow the specification of an
// external object to associate the callback with. For example, if the
// callbacks are being applied in a sequence, ~OBJ~ could be specified
// as the associated sequencer or parent sequence.
//
//| ...
//| `uvm_do_callbacks(mycb, mycomp, seqr, my_function(seqr, curr_addr, curr_data))
//| ...
//-----------------------------------------------------------------------------
`define uvm_do_obj_callbacks(T,CB,OBJ,METHOD) \
begin \
uvm_callback_iter#(T,CB) iter = new(OBJ); \
CB cb = iter.first(); \
while(cb != null) begin \
`uvm_cb_trace_noobj(cb,$sformatf(`"Executing callback method 'METHOD' for callback %s (CB) from %s (T)`",cb.get_name(), OBJ.get_full_name())) \
cb.METHOD; \
cb = iter.next(); \
end \
end
//-----------------------------------------------------------------------------
// MACRO: `uvm_do_callbacks_exit_on
//
//| `uvm_do_callbacks_exit_on(T,CB,METHOD,VAL)
//
// Calls the given ~METHOD~ of all callbacks of type ~CB~ registered with
// the calling object (i.e. ~this~ object), which is or is based on type ~T~,
// returning upon the first callback returning the bit value given by ~VAL~.
//
// This macro executes all of the callbacks associated with the calling
// object (i.e. ~this~ object). The macro takes three arguments:
//
// - CB is the class type of the callback objects to execute. The class
// type must have a function signature that matches the METHOD argument.
//
// - T is the type associated with the callback. Typically, an instance
// of type T is passed as one the arguments in the ~METHOD~ call.
//
// - METHOD is the method call to invoke, with all required arguments as
// if they were invoked directly.
//
// - VAL, if 1, says return upon the first callback invocation that
// returns 1. If 0, says return upon the first callback invocation that
// returns 0.
//
// For example, given the following callback class definition:
//
//| virtual class mycb extends uvm_cb;
//| pure function bit drop_trans (mycomp comp, my_trans trans);
//| endclass
//
// A component would invoke the macro as
//
//| task mycomp::run_phase(uvm_phase phase);
//| my_trans trans;
//| forever begin
//| get_port.get(trans);
//| if(do_callbacks(trans) == 0)
//| uvm_report_info("DROPPED",{"trans dropped: %s",trans.convert2string()});
//| else
//| // execute transaction
//| end
//| endtask
//| function bit do_callbacks(my_trans);
//| // Returns 0 if drop happens and 1 otherwise
//| `uvm_do_callbacks_exit_on(mycomp, mycb, extobj, drop_trans(this,trans), 1)
//| endfunction
//
// Because this macro calls ~return~, its use is restricted to implementations
// of functions that return a ~bit~ value, as in the above example.
//
//-----------------------------------------------------------------------------
`define uvm_do_callbacks_exit_on(T,CB,METHOD,VAL) \
`uvm_do_obj_callbacks_exit_on(T,CB,this,METHOD,VAL) \
//-----------------------------------------------------------------------------
// MACRO: `uvm_do_obj_callbacks_exit_on
//
//| `uvm_do_obj_callbacks_exit_on(T,CB,OBJ,METHOD,VAL)
//
// Calls the given ~METHOD~ of all callbacks of type ~CB~ registered with
// the given object ~OBJ~, which must be or be based on type ~T~, and returns
// upon the first callback that returns the bit value given by ~VAL~. It is
// exactly the same as the <`uvm_do_callbacks_exit_on> but has a specific
// object instance (instead of the implicit this instance) as the third
// argument.
//
//| ...
//| // Exit if a callback returns a 1
//| `uvm_do_callbacks_exit_on(mycomp, mycb, seqr, drop_trans(seqr,trans), 1)
//| ...
//
// Because this macro calls ~return~, its use is restricted to implementations
// of functions that return a ~bit~ value, as in the above example.
//-----------------------------------------------------------------------------
`define uvm_do_obj_callbacks_exit_on(T,CB,OBJ,METHOD,VAL) \
begin \
uvm_callback_iter#(T,CB) iter = new(OBJ); \
CB cb = iter.first(); \
while(cb != null) begin \
if (cb.METHOD == VAL) begin \
`uvm_cb_trace_noobj(cb,$sformatf(`"Executed callback method 'METHOD' for callback %s (CB) from %s (T) : returned value VAL (other callbacks will be ignored)`",cb.get_name(), OBJ.get_full_name())) \
return VAL; \
end \
`uvm_cb_trace_noobj(cb,$sformatf(`"Executed callback method 'METHOD' for callback %s (CB) from %s (T) : did not return value VAL`",cb.get_name(), OBJ.get_full_name())) \
cb = iter.next(); \
end \
return 1-VAL; \
end
// The +define+UVM_CB_TRACE_ON setting will instrument the uvm library to emit
// messages with message id UVMCB_TRC and UVM_NONE verbosity
// notifing add,delete and execution of uvm callbacks. The instrumentation is off by default.
`ifdef UVM_CB_TRACE_ON
`define uvm_cb_trace(OBJ,CB,OPER) \
begin \
string msg; \
msg = (OBJ == null) ? "null" : $sformatf("%s (%s@%0d)", \
OBJ.get_full_name(), OBJ.get_type_name(), OBJ.get_inst_id()); \
`uvm_info("UVMCB_TRC", $sformatf("%s: callback %s (%s@%0d) : to object %s", \
OPER, CB.get_name(), CB.get_type_name(), CB.get_inst_id(), msg), UVM_NONE) \
end
`define uvm_cb_trace_noobj(CB,OPER) \
begin \
if(uvm_callbacks_base::m_tracing) \
`uvm_info("UVMCB_TRC", $sformatf("%s : callback %s (%s@%0d)" , \
OPER, CB.get_name(), CB.get_type_name(), CB.get_inst_id()), UVM_NONE) \
end
`else
`define uvm_cb_trace_noobj(CB,OPER) /* null */
`define uvm_cb_trace(OBJ,CB,OPER) /* null */
`endif
`endif

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//------------------------------------------------------------------------------
// Copyright 2010-2011 Mentor Graphics Corporation
// All Rights Reserved Worldwide
//
// Licensed under the Apache License, Version 2.0 (the
// "License"); you may not use this file except in
// compliance with the License. You may obtain a copy of
// the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in
// writing, software distributed under the License is
// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See
// the License for the specific language governing
// permissions and limitations under the License.
//------------------------------------------------------------------------------
`ifndef UVM_NO_DEPRECATED
//-----------------------------------------------------------------------------
//
// *** DEPRECATED ***
// Group- Sequence Registration Macros
//
// The sequence-specific macros perform the same function as the set of
// `uvm_object_*_utils macros, except they also set the default sequencer type
// the sequence will run on.
//-----------------------------------------------------------------------------
`define m_uvm_register_sequence(TYPE_NAME, SEQUENCER) \
static bit is_registered_with_sequencer = SEQUENCER``::add_typewide_sequence(`"TYPE_NAME`");
// MACRO- `uvm_sequence_utils_begin
//
`define uvm_sequence_utils_begin(TYPE_NAME, SEQUENCER) \
`m_uvm_register_sequence(TYPE_NAME, SEQUENCER) \
`uvm_declare_p_sequencer(SEQUENCER) \
`uvm_object_utils_begin(TYPE_NAME)
// MACRO- `uvm_sequence_utils_end
//
`define uvm_sequence_utils_end \
`uvm_object_utils_end
// MACRO- `uvm_sequence_utils
//
// The sequence macros can be used in non-parameterized <uvm_sequence #(REQ,RSP)>
// extensions to pre-register the sequence with a given <uvm_sequencer #(REQ,RSP)>
// type.
//
// For sequences that do not use any `uvm_field macros:
//
//| `uvm_sequence_utils(TYPE_NAME,SQR_TYPE_NAME)
//
// For sequences employing with field macros:
//
//| `uvm_sequence_utils_begin(TYPE_NAME,SQR_TYPE_NAME)
//| `uvm_field_* macro invocations here
//| `uvm_sequence_utils_end
//
// The sequence-specific macros perform the same function as the set of
// `uvm_object_*_utils macros except that they also register the sequence's
// type, TYPE_NAME, with the given sequencer type, SQR_TYPE_NAME, and define
// the p_sequencer variable and m_set_p_sequencer method.
//
// Use `uvm_sequence_utils[_begin] for non-parameterized classes and
// `uvm_sequence_param_utils[_begin] for parameterized classes.
`define uvm_sequence_utils(TYPE_NAME, SEQUENCER) \
`uvm_sequence_utils_begin(TYPE_NAME,SEQUENCER) \
`uvm_sequence_utils_end
//-----------------------------------------------------------------------------
//
// *** DEPRECATED ***
//
// Group- Sequencer Registration Macros
//
// The sequencer-specific macros perform the same function as the set of
// `uvm_componenent_*utils macros except that they also declare the plumbing
// necessary for creating the sequencer's sequence library.
//-----------------------------------------------------------------------------
`define uvm_declare_sequence_lib \
protected bit m_set_sequences_called = 1; \
static protected string m_static_sequences[$]; \
static protected string m_static_remove_sequences[$]; \
\
static function bit add_typewide_sequence(string type_name); \
m_static_sequences.push_back(type_name); \
return 1; \
endfunction\
\
static function bit remove_typewide_sequence(string type_name); \
m_static_remove_sequences.push_back(type_name); \
for (int i = 0; i < m_static_sequences.size(); i++) begin \
if (m_static_sequences[i] == type_name) \
m_static_sequences.delete(i); \
end \
return 1;\
endfunction\
\
function void uvm_update_sequence_lib();\
if(this.m_set_sequences_called) begin \
set_sequences_queue(m_static_sequences); \
this.m_set_sequences_called = 0;\
end\
for (int i = 0; i < m_static_remove_sequences.size(); i++) begin \
remove_sequence(m_static_remove_sequences[i]); \
end \
endfunction\
// MACRO- `uvm_update_sequence_lib
//
// This macro populates the instance-specific sequence library for a sequencer.
// It should be invoked inside the sequencer¿s constructor.
`define uvm_update_sequence_lib \
m_add_builtin_seqs(0); \
uvm_update_sequence_lib();
// MACRO- `uvm_update_sequence_lib_and_item
//
// This macro populates the instance specific sequence library for a sequencer,
// and it registers the given ~USER_ITEM~ as an instance override for the simple
// sequence's item variable.
//
// The macro should be invoked inside the sequencer's constructor.
`define uvm_update_sequence_lib_and_item(USER_ITEM) \
factory.set_inst_override_by_type( \
uvm_sequence_item::get_type(), USER_ITEM::get_type(), \
{get_full_name(), "*.item"}); \
m_add_builtin_seqs(1); \
uvm_update_sequence_lib();
// MACRO- `uvm_sequencer_utils
`define uvm_sequencer_utils(TYPE_NAME) \
`uvm_sequencer_utils_begin(TYPE_NAME) \
`uvm_sequencer_utils_end
// MACRO- `uvm_sequencer_utils_begin
`define uvm_sequencer_utils_begin(TYPE_NAME) \
`uvm_declare_sequence_lib \
`uvm_component_utils_begin(TYPE_NAME)
// MACRO- `uvm_sequencer_param_utils
`define uvm_sequencer_param_utils(TYPE_NAME) \
`uvm_sequencer_param_utils_begin(TYPE_NAME) \
`uvm_sequencer_utils_end
// MACRO- `uvm_sequencer_param_utils_begin
`define uvm_sequencer_param_utils_begin(TYPE_NAME) \
`uvm_declare_sequence_lib \
`uvm_component_param_utils_begin(TYPE_NAME)
// MACRO- `uvm_sequencer_utils_end
//
// The sequencer macros are used in uvm_sequencer-based class declarations
// in one of four ways.
//
// For simple sequencers, no field macros
//
// `uvm_sequencer_utils(SQR_TYPE_NAME)
//
// For simple sequencers, with field macros
//
// `uvm_sequencer_utils_begin(SQR_TYPE_NAME)
// `uvm_field_* macros here
// `uvm_sequencer_utils_end
//
// For parameterized sequencers, no field macros
//
// `uvm_sequencer_param_utils(SQR_TYPE_NAME)
//
// For parameterized sequencers, with field macros
//
// `uvm_sequencer_param_utils_begin(SQR_TYPE_NAME)
// `uvm_field_* macros here
// `uvm_sequencer_utils_end
//
// The sequencer-specific macros perform the same function as the set of
// `uvm_componenent_*utils macros except that they also declare the plumbing
// necessary for creating the sequencer's sequence library. This includes:
//
// 1. Declaring the type-based static queue of strings registered on the
// sequencer type.
//
// 2. Declaring the static function to add strings to item #1 above.
//
// 3. Declaring the static function to remove strings to item #1 above.
//
// 4. Declaring the function to populate the instance specific sequence library
// for a sequencer.
//
// Use `uvm_sequencer_utils[_begin] for non-parameterized classes and
// `uvm_sequencer_param_utils[_begin] for parameterized classes.
`define uvm_sequencer_utils_end \
`uvm_component_utils_end
//-----------------------------------------------------------------------------
//
// MACRO- `uvm_package
//
// Use `uvm_package to define the SV package and to create a bogus type to help
// automate triggering the static initializers of the package.
// Use uvm_end_package to endpackage.
//-----------------------------------------------------------------------------
`define uvm_package(PKG) \
package PKG; \
class uvm_bogus_class extends uvm::uvm_sequence;\
endclass
`define uvm_end_package \
endpackage
//-----------------------------------------------------------------------------
//
// MACRO- `uvm_sequence_library_package
//
// This macro is used to trigger static initializers in packages. `uvm_package
// creates a bogus type which gets referred to by uvm_sequence_library_package
// to make a package-based variable of the bogus type.
//-----------------------------------------------------------------------------
`define uvm_sequence_library_package(PKG_NAME) \
import PKG_NAME``::*; \
PKG_NAME``::uvm_bogus_class M_``PKG_NAME``uvm_bogus_class
`endif // UVM_NO_DEPRECATED

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//----------------------------------------------------------------------
// Copyright 2007-2011 Mentor Graphics Corporation
// Copyright 2007-2010 Cadence Design Systems, Inc.
// Copyright 2010 Synopsys, Inc.
// All Rights Reserved Worldwide
//
// Licensed under the Apache License, Version 2.0 (the
// "License"); you may not use this file except in
// compliance with the License. You may obtain a copy of
// the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in
// writing, software distributed under the License is
// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See
// the License for the specific language governing
// permissions and limitations under the License.
//----------------------------------------------------------------------
`ifndef UVM_MESSAGE_DEFINES_SVH
`define UVM_MESSAGE_DEFINES_SVH
`ifndef UVM_LINE_WIDTH
`define UVM_LINE_WIDTH 120
`endif
`ifndef UVM_NUM_LINES
`define UVM_NUM_LINES 120
`endif
//`ifndef UVM_USE_FILE_LINE
//`define UVM_REPORT_DISABLE_FILE_LINE
//`endif
`ifdef UVM_REPORT_DISABLE_FILE_LINE
`define UVM_REPORT_DISABLE_FILE
`define UVM_REPORT_DISABLE_LINE
`endif
`ifdef UVM_REPORT_DISABLE_FILE
`define uvm_file ""
`else
`define uvm_file `__FILE__
`endif
`ifdef UVM_REPORT_DISABLE_LINE
`define uvm_line 0
`else
`define uvm_line `__LINE__
`endif
//------------------------------------------------------------------------------
//
// Title: Report Macros
//
// This set of macros provides wrappers around the uvm_report_* <Reporting>
// functions. The macros serve two essential purposes:
//
// - To reduce the processing overhead associated with filtered out messages,
// a check is made against the report's verbosity setting and the action
// for the id/severity pair before any string formatting is performed. This
// affects only `uvm_info reports.
//
// - The `__FILE__ and `__LINE__ information is automatically provided to the
// underlying uvm_report_* call. Having the file and line number from where
// a report was issued aides in debug. You can disable display of file and
// line information in reports by defining UVM_REPORT_DISABLE_FILE_LINE on
// the command line.
//
// The macros also enforce a verbosity setting of UVM_NONE for warnings, errors
// and fatals so that they cannot be mistakingly turned off by setting the
// verbosity level too low (warning and errors can still be turned off by
// setting the actions appropriately).
//
// To use the macros, replace the previous call to uvm_report_* with the
// corresponding macro.
//
//| //Previous calls to uvm_report_*
//| uvm_report_info("MYINFO1", $sformatf("val: %0d", val), UVM_LOW);
//| uvm_report_warning("MYWARN1", "This is a warning");
//| uvm_report_error("MYERR", "This is an error");
//| uvm_report_fatal("MYFATAL", "A fatal error has occurred");
//
// The above code is replaced by
//
//| //New calls to `uvm_*
//| `uvm_info("MYINFO1", $sformatf("val: %0d", val), UVM_LOW)
//| `uvm_warning("MYWARN1", "This is a warning")
//| `uvm_error("MYERR", "This is an error")
//| `uvm_fatal("MYFATAL", "A fatal error has occurred")
//
// Macros represent text substitutions, not statements, so they should not be
// terminated with semi-colons.
// MACRO: `uvm_info
//
//| `uvm_info(ID,MSG,VERBOSITY)
//
// Calls uvm_report_info if ~VERBOSITY~ is lower than the configured verbosity of
// the associated reporter. ~ID~ is given as the message tag and ~MSG~ is given as
// the message text. The file and line are also sent to the uvm_report_info call.
//
`define uvm_info(ID,MSG,VERBOSITY) \
begin \
if (uvm_report_enabled(VERBOSITY,UVM_INFO,ID)) \
uvm_report_info (ID, MSG, VERBOSITY, `uvm_file, `uvm_line); \
end
// MACRO: `uvm_warning
//
//| `uvm_warning(ID,MSG)
//
// Calls uvm_report_warning with a verbosity of UVM_NONE. The message can not
// be turned off using the reporter's verbosity setting, but can be turned off
// by setting the action for the message. ~ID~ is given as the message tag and
// ~MSG~ is given as the message text. The file and line are also sent to the
// uvm_report_warning call.
`define uvm_warning(ID,MSG) \
begin \
if (uvm_report_enabled(UVM_NONE,UVM_WARNING,ID)) \
uvm_report_warning (ID, MSG, UVM_NONE, `uvm_file, `uvm_line); \
end
// MACRO: `uvm_error
//
//| `uvm_error(ID,MSG)
//
// Calls uvm_report_error with a verbosity of UVM_NONE. The message can not
// be turned off using the reporter's verbosity setting, but can be turned off
// by setting the action for the message. ~ID~ is given as the message tag and
// ~MSG~ is given as the message text. The file and line are also sent to the
// uvm_report_error call.
`define uvm_error(ID,MSG) \
begin \
if (uvm_report_enabled(UVM_NONE,UVM_ERROR,ID)) \
uvm_report_error (ID, MSG, UVM_NONE, `uvm_file, `uvm_line); \
end
// MACRO: `uvm_fatal
//
//| `uvm_fatal(ID,MSG)
//
// Calls uvm_report_fatal with a verbosity of UVM_NONE. The message can not
// be turned off using the reporter's verbosity setting, but can be turned off
// by setting the action for the message. ~ID~ is given as the message tag and
// ~MSG~ is given as the message text. The file and line are also sent to the
// uvm_report_fatal call.
`define uvm_fatal(ID,MSG) \
begin \
if (uvm_report_enabled(UVM_NONE,UVM_FATAL,ID)) \
uvm_report_fatal (ID, MSG, UVM_NONE, `uvm_file, `uvm_line); \
end
// MACRO: `uvm_info_context
//
//| `uvm_info_context(ID,MSG,VERBOSITY,CNTXT)
//
// Operates identically to `uvm_info but requires that the
// context, or <uvm_report_object>, in which the message is printed be
// explicitly supplied as a macro argument.
`define uvm_info_context(ID, MSG, VERBOSITY, CNTXT) \
begin \
if (CNTXT.uvm_report_enabled(VERBOSITY,UVM_INFO,ID)) \
CNTXT.uvm_report_info (ID, MSG, VERBOSITY, `uvm_file, `uvm_line); \
end
// MACRO: `uvm_warning_context
//
//| `uvm_warning_context(ID,MSG,CNTXT)
//
// Operates identically to `uvm_warning but requires that the
// context, or <uvm_report_object>, in which the message is printed be
// explicitly supplied as a macro argument.
`define uvm_warning_context(ID, MSG, CNTXT) \
begin \
if (CNTXT.uvm_report_enabled(UVM_NONE,UVM_WARNING,ID)) \
CNTXT.uvm_report_warning (ID, MSG, UVM_NONE, `uvm_file, `uvm_line); \
end
// MACRO: `uvm_error_context
//
//| `uvm_error_context(ID,MSG,CNTXT)
//
// Operates identically to `uvm_error but requires that the
// context, or <uvm_report_object> in which the message is printed be
// explicitly supplied as a macro argument.
`define uvm_error_context(ID, MSG, CNTXT) \
begin \
if (CNTXT.uvm_report_enabled(UVM_NONE,UVM_ERROR,ID)) \
CNTXT.uvm_report_error (ID, MSG, UVM_NONE, `uvm_file, `uvm_line); \
end
// MACRO: `uvm_fatal_context
//
//| `uvm_fatal_context(ID,MSG,CNTXT)
//
// Operates identically to `uvm_fatal but requires that the
// context, or <uvm_report_object>, in which the message is printed be
// explicitly supplied as a macro argument.
`define uvm_fatal_context(ID, MSG, CNTXT) \
begin \
if (CNTXT.uvm_report_enabled(UVM_NONE,UVM_FATAL,ID)) \
CNTXT.uvm_report_fatal (ID, MSG, UVM_NONE, `uvm_file, `uvm_line); \
end
`endif //UVM_MESSAGE_DEFINES_SVH

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`ifndef UVM_PHASE_DEFINES_SVH
`define UVM_PHASE_DEFINES_SVH
//
//----------------------------------------------------------------------
// Copyright 2007-2011 Mentor Graphics Corporation
// Copyright 2007-2011 Cadence Design Systems, Inc.
// Copyright 2011 Synopsys, Inc.
// All Rights Reserved Worldwide
//
// Licensed under the Apache License, Version 2.0 (the
// "License"); you may not use this file except in
// compliance with the License. You may obtain a copy of
// the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in
// writing, software distributed under the License is
// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See
// the License for the specific language governing
// permissions and limitations under the License.
//----------------------------------------------------------------------
// uvm_root.svh uses these macros to simplify creation of all the phases.
// they are only to be used for UVM builtin phases, because they are simple
// delegate imps that call the corresponding methods on uvm_component.
// Also, they declare classes (uvm_XXXXX_phase) and singleton instances (XXXXX_ph)
// If you require more complex phase functors for your custom phase, code your
// own imp class extending uvm_task/topdown/bottomup_phase base classes, following
// the pattern of the macros below, but customize the exec_task() or exec_func()
// contents to suit your enhanced functionality or derived component type/methods.
// The uvm_user_xxx_phase() macros are provided for your convenience.
`define m_uvm_task_phase(PHASE,COMP,PREFIX) \
class PREFIX``PHASE``_phase extends uvm_task_phase; \
virtual task exec_task(uvm_component comp, uvm_phase phase); \
COMP comp_; \
if ($cast(comp_,comp)) \
comp_.``PHASE``_phase(phase); \
endtask \
local static PREFIX``PHASE``_phase m_inst; \
static const string type_name = `"PREFIX``PHASE``_phase`"; \
static function PREFIX``PHASE``_phase get(); \
if(m_inst == null) begin \
m_inst = new; \
end \
return m_inst; \
endfunction \
protected function new(string name=`"PHASE`"); \
super.new(name); \
endfunction \
virtual function string get_type_name(); \
return type_name; \
endfunction \
endclass \
//PREFIX``PHASE``_phase PREFIX``PHASE``_ph = PREFIX``PHASE``_phase::get();
`define m_uvm_topdown_phase(PHASE,COMP,PREFIX) \
class PREFIX``PHASE``_phase extends uvm_topdown_phase; \
virtual function void exec_func(uvm_component comp, uvm_phase phase); \
COMP comp_; \
if ($cast(comp_,comp)) \
comp_.``PHASE``_phase(phase); \
endfunction \
local static PREFIX``PHASE``_phase m_inst; \
static const string type_name = `"PREFIX``PHASE``_phase`"; \
static function PREFIX``PHASE``_phase get(); \
if(m_inst == null) begin \
m_inst = new(); \
end \
return m_inst; \
endfunction \
protected function new(string name=`"PHASE`"); \
super.new(name); \
endfunction \
virtual function string get_type_name(); \
return type_name; \
endfunction \
endclass \
//PREFIX``PHASE``_phase PREFIX``PHASE``_ph = PREFIX``PHASE``_phase::get();
`define m_uvm_bottomup_phase(PHASE,COMP,PREFIX) \
class PREFIX``PHASE``_phase extends uvm_bottomup_phase; \
virtual function void exec_func(uvm_component comp, uvm_phase phase); \
COMP comp_; \
if ($cast(comp_,comp)) \
comp_.``PHASE``_phase(phase); \
endfunction \
static PREFIX``PHASE``_phase m_inst; \
static const string type_name = `"PREFIX``PHASE``_phase`"; \
static function PREFIX``PHASE``_phase get(); \
if(m_inst == null) begin \
m_inst = new(); \
end \
return m_inst; \
endfunction \
protected function new(string name=`"PHASE`"); \
super.new(name); \
endfunction \
virtual function string get_type_name(); \
return type_name; \
endfunction \
endclass \
//PREFIX``PHASE``_phase PREFIX``PHASE``_ph = PREFIX``PHASE``_phase::get();
`define uvm_builtin_task_phase(PHASE) \
`m_uvm_task_phase(PHASE,uvm_component,uvm_)
`define uvm_builtin_topdown_phase(PHASE) \
`m_uvm_topdown_phase(PHASE,uvm_component,uvm_)
`define uvm_builtin_bottomup_phase(PHASE) \
`m_uvm_bottomup_phase(PHASE,uvm_component,uvm_)
`define uvm_user_task_phase(PHASE,COMP,PREFIX) \
`m_uvm_task_phase(PHASE,COMP,PREFIX)
`define uvm_user_topdown_phase(PHASE,COMP,PREFIX) \
`m_uvm_topdown_phase(PHASE,COMP,PREFIX)
`define uvm_user_bottomup_phase(PHASE,COMP,PREFIX) \
`m_uvm_bottomup_phase(PHASE,COMP,PREFIX)
`endif

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//----------------------------------------------------------------------
// Copyright 2007-2010 Mentor Graphics Corporation
// Copyright 2007-2011 Cadence Design Systems, Inc.
// Copyright 2010 Synopsys, Inc.
// All Rights Reserved Worldwide
//
// Licensed under the Apache License, Version 2.0 (the
// "License"); you may not use this file except in
// compliance with the License. You may obtain a copy of
// the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in
// writing, software distributed under the License is
// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See
// the License for the specific language governing
// permissions and limitations under the License.
//----------------------------------------------------------------------
//------------------------------------------------------------------------------
//
// MACROS for uvm_printer usage
//
// Provides a set of printing macros that will call appropriate print methods
// inside of a uvm_printer object. All macros have two versions: one assumes
// a printer named printer is available in scope; the other takes a printer
// argument.
//
//------------------------------------------------------------------------------
`ifndef UVM_PRINTER_DEFINES_SVH
`define UVM_PRINTER_DEFINES_SVH
// uvm_print_int*
// --------------
`define uvm_print_int(F, R) \
`uvm_print_int3(F, R, uvm_default_printer)
`define uvm_print_int3(F, R, P) \
do begin \
uvm_printer p__; \
if(P!=null) p__ = P; \
else p__ = uvm_default_printer; \
`uvm_print_int4(F, R, `"F`", p__) \
end while(0);
`define uvm_print_int4(F, R, NM, P) \
P.print_int(NM, F, $bits(F), R, "[");
// uvm_print_enum
// --------------
`define uvm_print_enum(T, F, NM, P) \
P.print_generic(NM, `"T`", $bits(F), F.name(), "[");
// uvm_print_object*
// -----------------
`define uvm_print_object(F) \
`uvm_print_object2(F, uvm_default_printer)
`define uvm_print_object2(F, P) \
do begin \
uvm_printer p__; \
if(P!=null) p__ = P; \
else p__ = uvm_default_printer; \
p__.print_object(`"F`", F, "["); \
end while(0);
// uvm_print_string*
// -----------------
`define uvm_print_string(F) \
`uvm_print_string2(F, uvm_default_printer)
`define uvm_print_string2(F, P) \
do begin \
uvm_printer p__; \
if(P!=null) p__ = P; \
else p__ = uvm_default_printer; \
p__.print_string(`"F`", F, "["); \
end while(0);
// uvm_print_array*
// ----------------
`define uvm_print_array_int(F, R) \
`uvm_print_array_int3(F, R, uvm_default_printer)
`define uvm_print_array_int3(F, R, P) \
`uvm_print_qda_int4(F, R, P, da)
// uvm_print_sarray*
// -----------------
`define uvm_print_sarray_int3(F, R, P) \
`uvm_print_qda_int4(F, R, P, sa)
`define uvm_print_qda_int4(F, R, P, T) \
begin \
uvm_printer p__; \
uvm_printer_knobs k__; \
int curr, max__; max__=0; curr=0; \
if(P!=null) p__ = P; \
else p__ = uvm_default_printer; \
foreach(F[i]) max__ = i+1; \
// max__=$size(F); \
p__.print_array_header (`"F`", max__,`"T``(integral)`"); \
k__ = p__.knobs; \
if((p__.knobs.depth == -1) || (p__.m_scope.depth() < p__.knobs.depth+1)) \
begin \
foreach(F[i__]) begin \
if(k__.begin_elements == -1 || k__.end_elements == -1 || curr < k__.begin_elements ) begin \
`uvm_print_int4(F[curr], R, p__.index_string(curr), p__) \
end \
else break; \
curr++; \
end \
if(curr<max__) begin \
if((max__-k__.end_elements) > curr) curr = max__-k__.end_elements; \
if(curr<k__.begin_elements) curr = k__.begin_elements; \
else begin \
p__.print_array_range(k__.begin_elements, curr-1); \
end \
for(curr=curr; curr<max__; ++curr) begin \
`uvm_print_int4(F[curr], R, p__.index_string(curr), p__) \
end \
end \
end \
p__.print_array_footer(max__); \
//p__.print_footer(); \
end
`define uvm_print_qda_enum(F, P, T, ET) \
begin \
uvm_printer p__; \
uvm_printer_knobs k__; \
int curr, max__; max__=0; curr=0; \
if(P!=null) p__ = P; \
else p__ = uvm_default_printer; \
foreach(F[i]) max__ = i+1; \
//max__=$size(F); \
p__.print_array_header (`"F`", max__,`"T``(``ET``)`"); \
k__ = p__.knobs; \
if((p__.knobs.depth == -1) || (p__.m_scope.depth() < p__.knobs.depth+1)) \
begin \
foreach(F[i__]) begin \
if(k__.begin_elements == -1 || k__.end_elements == -1 || curr < k__.begin_elements ) begin \
`uvm_print_enum(ET, F[curr], p__.index_string(curr), p__) \
end \
else break; \
curr++; \
end \
if(curr<max__) begin \
if((max__-k__.end_elements) > curr) curr = max__-k__.end_elements; \
if(curr<k__.begin_elements) curr = k__.begin_elements; \
else begin \
p__.print_array_range(k__.begin_elements, curr-1); \
end \
for(curr=curr; curr<max__; ++curr) begin \
`uvm_print_enum(ET, F[curr], p__.index_string(curr), p__) \
end \
end \
end \
p__.print_array_footer(max__); \
//p__.print_footer(); \
end
`define uvm_print_queue_int(F, R) \
`uvm_print_queue_int3(F, R, uvm_default_printer)
`define uvm_print_queue_int3(F, R, P) \
`uvm_print_qda_int3(F, R, P, queue)
`define uvm_print_array_object(F,FLAG) \
`uvm_print_array_object3(F, uvm_default_printer,FLAG)
`define uvm_print_sarray_object(F,FLAG) \
`uvm_print_sarray_object3(F, uvm_default_printer,FLAG)
`define uvm_print_array_object3(F, P,FLAG) \
`uvm_print_object_qda4(F, P, da,FLAG)
`define uvm_print_sarray_object3(F, P,FLAG) \
`uvm_print_object_qda4(F, P, sa,FLAG)
`define uvm_print_object_qda4(F, P, T,FLAG) \
do begin \
int curr, max__; \
uvm_printer p__; \
max__=0; curr=0; \
if(P!=null) p__ = P; \
else p__ = uvm_default_printer; \
//max__=$size(F); \
foreach(F[i]) max__ = i+1; \
\
//p__.print_header();\
\
p__.m_scope.set_arg(`"F`");\
p__.print_array_header(`"F`", max__, `"T``(object)`");\
if((p__.knobs.depth == -1) || (p__.knobs.depth+1 > p__.m_scope.depth())) \
begin\
for(curr=0; curr<max__ && (p__.knobs.begin_elements == -1 || \
p__.knobs.end_elements == -1 || curr<p__.knobs.begin_elements); ++curr) begin \
if(((FLAG)&UVM_REFERENCE) == 0) \
p__.print_object(p__.index_string(curr), F[curr], "[");\
else \
p__.print_object_header(p__.index_string(curr), F[curr], "[");\
end \
if(curr<max__) begin\
curr = max__-p__.knobs.end_elements;\
if(curr<p__.knobs.begin_elements) curr = p__.knobs.begin_elements;\
else begin\
p__.print_array_range(p__.knobs.begin_elements, curr-1);\
end\
for(curr=curr; curr<max__; ++curr) begin\
if(((FLAG)&UVM_REFERENCE) == 0) \
p__.print_object(p__.index_string(curr), F[curr], "[");\
else \
p__.print_object_header(p__.index_string(curr), F[curr], "[");\
end \
end\
end \
\
p__.print_array_footer(max__); \
//p__.print_footer(); \
end while(0);
`define uvm_print_object_queue(F,FLAG) \
`uvm_print_object_queue3(F, uvm_default_printer,FLAG)
`define uvm_print_object_queue3(F, P,FLAG) \
do begin \
`uvm_print_object_qda4(F,P, queue,FLAG); \
end while(0);
`define uvm_print_array_string(F) \
`uvm_print_array_string2(F, uvm_default_printer)
`define uvm_print_array_string2(F, P) \
`uvm_print_string_qda3(F, P, da)
`define uvm_print_sarray_string2(F, P) \
`uvm_print_string_qda3(F, P, sa)
`define uvm_print_string_qda3(F, P, T) \
do begin \
int curr, max__; \
uvm_printer p__; \
max__=0; curr=0; \
//max__=$size(F); \
foreach(F[i]) max__ = i+1; \
if(P!=null) p__ = P; \
else p__ = uvm_default_printer; \
\
//p__.print_header();\
\
p__.m_scope.set_arg(`"F`");\
p__.print_array_header(`"F`", max__, `"T``(string)`");\
if((p__.knobs.depth == -1) || (p__.knobs.depth+1 > p__.m_scope.depth())) \
begin\
for(curr=0; curr<max__ && curr<p__.knobs.begin_elements; ++curr) begin\
p__.print_string(p__.index_string(curr), F[curr], "[");\
end \
if(curr<max__) begin\
curr = max__-p__.knobs.end_elements;\
if(curr<p__.knobs.begin_elements) curr = p__.knobs.begin_elements;\
else begin\
p__.print_array_range(p__.knobs.begin_elements, curr-1);\
end\
for(curr=curr; curr<max__; ++curr) begin\
p__.print_string(p__.index_string(curr), F[curr], "[");\
end \
end\
end \
\
p__.print_array_footer(max__); \
//p__.print_footer(); \
end while(0);
`define uvm_print_string_queue(F) \
`uvm_print_string_queue2(F, uvm_default_printer)
`define uvm_print_string_queue2(F, P) \
do begin \
`uvm_print_string_qda3(F,P, queue); \
end while(0);
//-----------------------------------------------------------------------------
//
// Associative array printing methods
//
//-----------------------------------------------------------------------------
`define uvm_print_aa_string_int(F) \
`uvm_print_aa_string_int3(F, R, uvm_default_printer)
`define uvm_print_aa_string_int3(F, R, P) \
begin \
uvm_printer p__; \
uvm_printer_knobs k__; \
if(P!=null) p__ = P; \
else p__ = uvm_default_printer; \
p__.print_array_header (`"F`", F.num(), "aa(int,string)"); \
k__ = p__.knobs; \
if((p__.knobs.depth == -1) || (p__.m_scope.depth() < p__.knobs.depth+1)) \
begin \
foreach(F[string_aa_key]) \
`uvm_print_int4(F[string_aa_key], R, \
{"[", string_aa_key, "]"}, p__) \
end \
p__.print_array_footer(F.num()); \
//p__.print_footer(); \
end
`define uvm_print_aa_string_object(F,FLAG) \
`uvm_print_aa_string_object_3(F, uvm_default_printer,FLAG)
`define uvm_print_aa_string_object3(F, P,FLAG) \
begin \
uvm_printer p__; \
uvm_printer_knobs k__; \
uvm_object u__; \
if(P!=null) p__ = P; \
else p__ = uvm_default_printer; \
p__.print_array_header (`"F`", F.num(), "aa(object,string)"); \
k__ = p__.knobs; \
if((p__.knobs.depth == -1) || (p__.m_scope.depth() < p__.knobs.depth+1)) \
begin \
foreach(F[string_aa_key]) begin \
if(((FLAG)&UVM_REFERENCE)==0) \
p__.print_object({"[", string_aa_key, "]"}, F[string_aa_key], "[");\
else \
p__.print_object_header({"[", string_aa_key, "]"}, F[string_aa_key], "[");\
end \
end \
p__.print_array_footer(F.num()); \
//p__.print_footer(); \
end
`define uvm_print_aa_string_string(F) \
`uvm_print_aa_string_string_2(F, uvm_default_printer)
`define uvm_print_aa_string_string2(F, P) \
begin \
uvm_printer p__; \
uvm_printer_knobs k__; \
if(P!=null) p__ = P; \
else p__ = uvm_default_printer; \
p__.print_array_header (`"F`", F.num(), "aa(string,string)"); \
k__ = p__.knobs; \
if((p__.knobs.depth == -1) || (p__.m_scope.depth() < p__.knobs.depth+1)) \
begin \
foreach(F[string_aa_key]) \
p__.print_string({"[", string_aa_key, "]"}, F[string_aa_key], "["); \
end \
p__.print_array_footer(F.num()); \
//p__.print_footer(); \
end
`define uvm_print_aa_int_object(F,FLAG) \
`uvm_print_aa_int_object_3(F, uvm_default_printer,FLAG)
`define uvm_print_aa_int_object3(F, P,FLAG) \
begin \
uvm_printer p__; \
uvm_printer_knobs k__; \
uvm_object u__; \
int key; \
if(P!=null) p__ = P; \
else p__ = uvm_default_printer; \
p__.print_array_header (`"F`", F.num(), "aa(object,int)"); \
k__ = p__.knobs; \
if((p__.knobs.depth == -1) || (p__.m_scope.depth() < p__.knobs.depth+1)) \
begin \
foreach(F[key]) begin \
$swrite(__m_uvm_status_container.stringv, "[%0d]", key); \
if(((FLAG)&UVM_REFERENCE)==0) \
p__.print_object(__m_uvm_status_container.stringv, F[key], "[");\
else \
p__.print_object_header(__m_uvm_status_container.stringv, F[key], "[");\
end \
end \
p__.print_array_footer(F.num()); \
//p__.print_footer(); \
end
`define uvm_print_aa_int_key4(KEY, F, R, P) \
begin \
uvm_printer p__; \
uvm_printer_knobs k__; \
if(P!=null) p__ = P; \
else p__ = uvm_default_printer; \
__m_uvm_status_container.stringv = "aa(int,int)"; \
for(int i=0; i<__m_uvm_status_container.stringv.len(); ++i) \
if(__m_uvm_status_container.stringv[i] == " ") \
__m_uvm_status_container.stringv[i] = "_"; \
p__.print_array_header (`"F`", F.num(), __m_uvm_status_container.stringv); \
k__ = p__.knobs; \
if((p__.knobs.depth == -1) || (p__.m_scope.depth() < p__.knobs.depth+1)) \
begin \
foreach(F[aa_key]) begin \
`uvm_print_int4(F[aa_key], R, \
{"[", $sformatf("%0d",aa_key), "]"}, p__) \
end \
end \
p__.print_array_footer(F.num()); \
//p__.print_footer(); \
end
`endif

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//----------------------------------------------------------------------
// Copyright 2010 Synopsys, Inc.
// Copyright 2010 Mentor Graphics Corporation
// All Rights Reserved Worldwide
//
// Licensed under the Apache License, Version 2.0 (the
// "License"); you may not use this file except in
// compliance with the License. You may obtain a copy of
// the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in
// writing, software distributed under the License is
// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See
// the License for the specific language governing
// permissions and limitations under the License.
//----------------------------------------------------------------------
//------------------------
// Group: Register Defines
//------------------------
// Macro: `UVM_REG_ADDR_WIDTH
//
// Maximum address width in bits
//
// Default value is 64. Used to define the <uvm_reg_addr_t> type.
//
`ifndef UVM_REG_ADDR_WIDTH
`define UVM_REG_ADDR_WIDTH 64
`endif
// Macro: `UVM_REG_DATA_WIDTH
//
// Maximum data width in bits
//
// Default value is 64. Used to define the <uvm_reg_data_t> type.
//
`ifndef UVM_REG_DATA_WIDTH
`define UVM_REG_DATA_WIDTH 64
`endif
// Macro: `UVM_REG_BYTENABLE_WIDTH
//
// Maximum number of byte enable bits
//
// Default value is one per byte in <`UVM_REG_DATA_WIDTH>.
// Used to define the <uvm_reg_byte_en_t> type.
//
`ifndef UVM_REG_BYTENABLE_WIDTH
`define UVM_REG_BYTENABLE_WIDTH ((`UVM_REG_DATA_WIDTH-1)/8+1)
`endif
// Macro: `UVM_REG_CVR_WIDTH
//
// Maximum number of bits in a <uvm_reg_cvr_t> coverage model set.
//
// Default value is 32.
//
`ifndef UVM_REG_CVR_WIDTH
`define UVM_REG_CVR_WIDTH 32
`endif

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//------------------------------------------------------------------------------
// Copyright 2007-2011 Mentor Graphics Corporation
// Copyright 2007-2010 Cadence Design Systems, Inc.
// Copyright 2010 Synopsys, Inc.
// All Rights Reserved Worldwide
//
// Licensed under the Apache License, Version 2.0 (the
// "License"); you may not use this file except in
// compliance with the License. You may obtain a copy of
// the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in
// writing, software distributed under the License is
// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See
// the License for the specific language governing
// permissions and limitations under the License.
//------------------------------------------------------------------------------
// Title: Sequence-Related Macros
//-----------------------------------------------------------------------------
//
// Group: Sequence Action Macros
//
// These macros are used to start sequences and sequence items on the default
// sequencer, ~m_sequencer~. This is determined a number of ways.
// - the sequencer handle provided in the <uvm_sequence_base::start> method
// - the sequencer used by the parent sequence
// - the sequencer that was set using the <uvm_sequence_item::set_sequencer> method
//-----------------------------------------------------------------------------
// MACRO: `uvm_create
//
//| `uvm_create(SEQ_OR_ITEM)
//
// This action creates the item or sequence using the factory. It intentionally
// does zero processing. After this action completes, the user can manually set
// values, manipulate rand_mode and constraint_mode, etc.
`define uvm_create(SEQ_OR_ITEM) \
`uvm_create_on(SEQ_OR_ITEM, m_sequencer)
// MACRO: `uvm_do
//
//| `uvm_do(SEQ_OR_ITEM)
//
// This macro takes as an argument a uvm_sequence_item variable or object.
// The argument is created using <`uvm_create> if necessary,
// then randomized.
// In the case of an item, it is randomized after the call to
// <uvm_sequence_base::start_item()> returns.
// This is called late-randomization.
// In the case of a sequence, the sub-sequence is started using
// <uvm_sequence_base::start()> with ~call_pre_post~ set to 0.
// In the case of an item,
// the item is sent to the driver through the associated sequencer.
//
// For a sequence item, the following are called, in order
//
//|
//| `uvm_create(item)
//| sequencer.wait_for_grant(prior) (task)
//| this.pre_do(1) (task)
//| item.randomize()
//| this.mid_do(item) (func)
//| sequencer.send_request(item) (func)
//| sequencer.wait_for_item_done() (task)
//| this.post_do(item) (func)
//|
//
// For a sequence, the following are called, in order
//
//|
//| `uvm_create(sub_seq)
//| sub_seq.randomize()
//| sub_seq.pre_start() (task)
//| this.pre_do(0) (task)
//| this.mid_do(sub_seq) (func)
//| sub_seq.body() (task)
//| this.post_do(sub_seq) (func)
//| sub_seq.post_start() (task)
//|
`define uvm_do(SEQ_OR_ITEM) \
`uvm_do_on_pri_with(SEQ_OR_ITEM, m_sequencer, -1, {})
// MACRO: `uvm_do_pri
//
//| `uvm_do_pri(SEQ_OR_ITEM, PRIORITY)
//
// This is the same as `uvm_do except that the sequene item or sequence is
// executed with the priority specified in the argument
`define uvm_do_pri(SEQ_OR_ITEM, PRIORITY) \
`uvm_do_on_pri_with(SEQ_OR_ITEM, m_sequencer, PRIORITY, {})
// MACRO: `uvm_do_with
//
//| `uvm_do_with(SEQ_OR_ITEM, CONSTRAINTS)
//
// This is the same as `uvm_do except that the constraint block in the 2nd
// argument is applied to the item or sequence in a randomize with statement
// before execution.
`define uvm_do_with(SEQ_OR_ITEM, CONSTRAINTS) \
`uvm_do_on_pri_with(SEQ_OR_ITEM, m_sequencer, -1, CONSTRAINTS)
// MACRO: `uvm_do_pri_with
//
//| `uvm_do_pri_with(SEQ_OR_ITEM, PRIORITY, CONSTRAINTS)
//
// This is the same as `uvm_do_pri except that the given constraint block is
// applied to the item or sequence in a randomize with statement before
// execution.
`define uvm_do_pri_with(SEQ_OR_ITEM, PRIORITY, CONSTRAINTS) \
`uvm_do_on_pri_with(SEQ_OR_ITEM, m_sequencer, PRIORITY, CONSTRAINTS)
//-----------------------------------------------------------------------------
//
// Group: Sequence on Sequencer Action Macros
//
// These macros are used to start sequences and sequence items on a specific
// sequencer. The sequence or item is created and executed on the given
// sequencer.
//-----------------------------------------------------------------------------
// MACRO: `uvm_create_on
//
//| `uvm_create_on(SEQ_OR_ITEM, SEQR)
//
// This is the same as <`uvm_create> except that it also sets the parent sequence
// to the sequence in which the macro is invoked, and it sets the sequencer to
// the specified ~SEQR~ argument.
`define uvm_create_on(SEQ_OR_ITEM, SEQR) \
begin \
uvm_object_wrapper w_; \
w_ = SEQ_OR_ITEM.get_type(); \
$cast(SEQ_OR_ITEM , create_item(w_, SEQR, `"SEQ_OR_ITEM`"));\
end
// MACRO: `uvm_do_on
//
//| `uvm_do_on(SEQ_OR_ITEM, SEQR)
//
// This is the same as <`uvm_do> except that it also sets the parent sequence to
// the sequence in which the macro is invoked, and it sets the sequencer to the
// specified ~SEQR~ argument.
`define uvm_do_on(SEQ_OR_ITEM, SEQR) \
`uvm_do_on_pri_with(SEQ_OR_ITEM, SEQR, -1, {})
// MACRO: `uvm_do_on_pri
//
//| `uvm_do_on_pri(SEQ_OR_ITEM, SEQR, PRIORITY)
//
// This is the same as <`uvm_do_pri> except that it also sets the parent sequence
// to the sequence in which the macro is invoked, and it sets the sequencer to
// the specified ~SEQR~ argument.
`define uvm_do_on_pri(SEQ_OR_ITEM, SEQR, PRIORITY) \
`uvm_do_on_pri_with(SEQ_OR_ITEM, SEQR, PRIORITY, {})
// MACRO: `uvm_do_on_with
//
//| `uvm_do_on_with(SEQ_OR_ITEM, SEQR, CONSTRAINTS)
//
// This is the same as <`uvm_do_with> except that it also sets the parent
// sequence to the sequence in which the macro is invoked, and it sets the
// sequencer to the specified ~SEQR~ argument.
// The user must supply brackets around the constraints.
`define uvm_do_on_with(SEQ_OR_ITEM, SEQR, CONSTRAINTS) \
`uvm_do_on_pri_with(SEQ_OR_ITEM, SEQR, -1, CONSTRAINTS)
// MACRO: `uvm_do_on_pri_with
//
//| `uvm_do_on_pri_with(SEQ_OR_ITEM, SEQR, PRIORITY, CONSTRAINTS)
//
// This is the same as `uvm_do_pri_with except that it also sets the parent
// sequence to the sequence in which the macro is invoked, and it sets the
// sequencer to the specified ~SEQR~ argument.
`define uvm_do_on_pri_with(SEQ_OR_ITEM, SEQR, PRIORITY, CONSTRAINTS) \
begin \
uvm_sequence_base __seq; \
`uvm_create_on(SEQ_OR_ITEM, SEQR) \
if (!$cast(__seq,SEQ_OR_ITEM)) start_item(SEQ_OR_ITEM, PRIORITY);\
if ((__seq == null || !__seq.do_not_randomize) && !SEQ_OR_ITEM.randomize() with CONSTRAINTS ) begin \
`uvm_warning("RNDFLD", "Randomization failed in uvm_do_with action") \
end\
if (!$cast(__seq,SEQ_OR_ITEM)) finish_item(SEQ_OR_ITEM, PRIORITY); \
else __seq.start(SEQR, this, PRIORITY, 0); \
end
//-----------------------------------------------------------------------------
//
// Group: Sequence Action Macros for Pre-Existing Sequences
//
// These macros are used to start sequences and sequence items that do not
// need to be created.
//-----------------------------------------------------------------------------
// MACRO: `uvm_send
//
//| `uvm_send(SEQ_OR_ITEM)
//
// This macro processes the item or sequence that has been created using
// `uvm_create. The processing is done without randomization. Essentially, an
// `uvm_do without the create or randomization.
`define uvm_send(SEQ_OR_ITEM) \
`uvm_send_pri(SEQ_OR_ITEM, -1)
// MACRO: `uvm_send_pri
//
//| `uvm_send_pri(SEQ_OR_ITEM, PRIORITY)
//
// This is the same as `uvm_send except that the sequene item or sequence is
// executed with the priority specified in the argument.
`define uvm_send_pri(SEQ_OR_ITEM, PRIORITY) \
begin \
uvm_sequence_base __seq; \
if (!$cast(__seq,SEQ_OR_ITEM)) begin \
start_item(SEQ_OR_ITEM, PRIORITY);\
finish_item(SEQ_OR_ITEM, PRIORITY);\
end \
else __seq.start(__seq.get_sequencer(), this, PRIORITY, 0);\
end
// MACRO: `uvm_rand_send
//
//| `uvm_rand_send(SEQ_OR_ITEM)
//
// This macro processes the item or sequence that has been already been
// allocated (possibly with `uvm_create). The processing is done with
// randomization. Essentially, an `uvm_do without the create.
`define uvm_rand_send(SEQ_OR_ITEM) \
`uvm_rand_send_pri_with(SEQ_OR_ITEM, -1, {})
// MACRO: `uvm_rand_send_pri
//
//| `uvm_rand_send_pri(SEQ_OR_ITEM, PRIORITY)
//
// This is the same as `uvm_rand_send except that the sequene item or sequence
// is executed with the priority specified in the argument.
`define uvm_rand_send_pri(SEQ_OR_ITEM, PRIORITY) \
`uvm_rand_send_pri_with(SEQ_OR_ITEM, PRIORITY, {})
// MACRO: `uvm_rand_send_with
//
//| `uvm_rand_send_with(SEQ_OR_ITEM, CONSTRAINTS)
//
// This is the same as `uvm_rand_send except that the given constraint block is
// applied to the item or sequence in a randomize with statement before
// execution.
`define uvm_rand_send_with(SEQ_OR_ITEM, CONSTRAINTS) \
`uvm_rand_send_pri_with(SEQ_OR_ITEM, -1, CONSTRAINTS)
// MACRO: `uvm_rand_send_pri_with
//
//| `uvm_rand_send_pri_with(SEQ_OR_ITEM, PRIORITY, CONSTRAINTS)
//
// This is the same as `uvm_rand_send_pri except that the given constraint block
// is applied to the item or sequence in a randomize with statement before
// execution.
`define uvm_rand_send_pri_with(SEQ_OR_ITEM, PRIORITY, CONSTRAINTS) \
begin \
uvm_sequence_base __seq; \
if (!$cast(__seq,SEQ_OR_ITEM)) start_item(SEQ_OR_ITEM, PRIORITY);\
else __seq.set_item_context(this,SEQ_OR_ITEM.get_sequencer()); \
if ((__seq == null || !__seq.do_not_randomize) && !SEQ_OR_ITEM.randomize() with CONSTRAINTS ) begin \
`uvm_warning("RNDFLD", "Randomization failed in uvm_rand_send_with action") \
end\
if (!$cast(__seq,SEQ_OR_ITEM)) finish_item(SEQ_OR_ITEM, PRIORITY);\
else __seq.start(__seq.get_sequencer(), this, PRIORITY, 0);\
end
`define uvm_create_seq(UVM_SEQ, SEQR_CONS_IF) \
`uvm_create_on(UVM_SEQ, SEQR_CONS_IF.consumer_seqr) \
`define uvm_do_seq(UVM_SEQ, SEQR_CONS_IF) \
`uvm_do_on(UVM_SEQ, SEQR_CONS_IF.consumer_seqr) \
`define uvm_do_seq_with(UVM_SEQ, SEQR_CONS_IF, CONSTRAINTS) \
`uvm_do_on_with(UVM_SEQ, SEQR_CONS_IF.consumer_seqr, CONSTRAINTS) \
//-----------------------------------------------------------------------------
//
// Group- Sequence Library
//
//-----------------------------------------------------------------------------
// MACRO- `uvm_add_to_sequence_library
//
// Adds the given sequence ~TYPE~ to the given sequence library ~LIBTYPE~
//
//| `uvm_add_to_seq_lib(TYPE,LIBTYPE)
//
// Invoke any number of times within a sequence declaration to statically add
// that sequence to one or more sequence library types. The sequence will then
// be available for selection and execution in all instances of the given
// sequencer types.
//
//| class seqA extends uvm_sequence_base #(simple_item);
//|
//| function new(string name=`"TYPE`");
//| super.new(name);
//| endfunction
//|
//| `uvm_object_utils(seqA)
//|
//| `uvm_add_to_seq_lib(seqA, simple_seq_lib_RST)
//| `uvm_add_to_seq_lib(seqA, simple_seq_lib_CFG)
//|
//| virtual task body(); \
//| `uvm_info("SEQ_START", {"Executing sequence '", get_full_name(),
//| "' (",get_type_name(),")"},UVM_HIGH)
//| #10;
//| endtask
//|
//| endclass
`define uvm_add_to_seq_lib(TYPE,LIBTYPE) \
static bit add_``TYPE``_to_seq_lib_``LIBTYPE =\
LIBTYPE::m_add_typewide_sequence(TYPE::get_type());
// MACRO- `uvm_sequence_library_utils
//
//| `uvm_sequence_library_utils(TYPE)
//
// Declares the infrastructure needed to define extensions to the
// <uvm_sequence_library> class. You define new sequence library subtypes
// to statically specify sequence membership from within sequence
// definitions. See also <`uvm_add_to_sequence_library> for more information.
//
//
//| typedef simple_seq_lib uvm_sequence_library #(simple_item);
//|
//| class simple_seq_lib_RST extends simple_seq_lib;
//|
//| `uvm_object_utils(simple_seq_lib_RST)
//|
//| `uvm_sequence_library_utils(simple_seq_lib_RST)
//|
//| function new(string name="");
//| super.new(name);
//| endfunction
//|
//| endclass
//
// Each library, itself a sequence, can then be started independently
// on different sequencers or in different phases of the same sequencer.
// See <uvm_sequencer_base::start_phase_sequence> for information on
// starting default sequences.
`define uvm_sequence_library_utils(TYPE) \
\
static protected uvm_object_wrapper m_typewide_sequences[$]; \
\
function void init_sequence_library(); \
foreach (TYPE::m_typewide_sequences[i]) \
sequences.push_back(TYPE::m_typewide_sequences[i]); \
endfunction \
\
static function void add_typewide_sequence(uvm_object_wrapper seq_type); \
if (m_static_check(seq_type)) \
TYPE::m_typewide_sequences.push_back(seq_type); \
endfunction \
\
static function void add_typewide_sequences(uvm_object_wrapper seq_types[$]); \
foreach (seq_types[i]) \
TYPE::add_typewide_sequence(seq_types[i]); \
endfunction \
\
static function bit m_add_typewide_sequence(uvm_object_wrapper seq_type); \
TYPE::add_typewide_sequence(seq_type); \
return 1; \
endfunction
//-----------------------------------------------------------------------------
//
// Group: Sequencer Subtypes
//
//-----------------------------------------------------------------------------
// MACRO: `uvm_declare_p_sequencer
//
// This macro is used to declare a variable ~p_sequencer~ whose type is
// specified by ~SEQUENCER~.
//
//| `uvm_declare_p_sequencer(SEQUENCER)
//
// The example below shows using the the `uvm_declare_p_sequencer macro
// along with the uvm_object_utils macros to set up the sequence but
// not register the sequence in the sequencer's library.
//
//| class mysequence extends uvm_sequence#(mydata);
//| `uvm_object_utils(mysequence)
//| `uvm_declare_p_sequencer(some_seqr_type)
//| task body;
//| //Access some variable in the user's custom sequencer
//| if(p_sequencer.some_variable) begin
//| ...
//| end
//| endtask
//| endclass
//
`define uvm_declare_p_sequencer(SEQUENCER) \
SEQUENCER p_sequencer;\
virtual function void m_set_p_sequencer();\
super.m_set_p_sequencer(); \
if( !$cast(p_sequencer, m_sequencer)) \
`uvm_fatal("DCLPSQ", \
$sformatf("%m %s Error casting p_sequencer, please verify that this sequence/sequence item is intended to execute on this type of sequencer", get_full_name())) \
endfunction

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//----------------------------------------------------------------------
// Copyright 2007-2011 Mentor Graphics Corporation
// Copyright 2007-2010 Cadence Design Systems, Inc.
// Copyright 2010 Synopsys, Inc.
// All Rights Reserved Worldwide
//
// Licensed under the Apache License, Version 2.0 (the
// "License"); you may not use this file except in
// compliance with the License. You may obtain a copy of
// the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in
// writing, software distributed under the License is
// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See
// the License for the specific language governing
// permissions and limitations under the License.
//----------------------------------------------------------------------
//-----------------------------------------------------------------------------
//
// Title: TLM Implementation Port Declaration Macros
//
// The TLM implemenation declaration macros provide a way for components
// to provide multiple implemenation ports of the same implementation
// interface. When an implementation port is defined using the built-in
// set of imps, there must be exactly one implementation of the interface.
//
// For example, if a component needs to provide a put implemenation then
// it would have an implementation port defined like:
//
//| class mycomp extends uvm_component;
//| uvm_put_imp#(data_type, mycomp) put_imp;
//| ...
//| virtual task put (data_type t);
//| ...
//| endtask
//| endclass
//
// There are times, however, when you need more than one implementation for
// for an interface. This set of declarations allow you to easily create
// a new implemenation class to allow for multiple implementations. Although
// the new implemenation class is a different class, it can be bound to
// the same types of exports and ports as the original class. Extending
// the put example above, lets say that mycomp needs to provide two put
// implementation ports. In that case, you would do something like:
//
//| //Define two new put interfaces which are compatible with uvm_put_ports
//| //and uvm_put_exports.
//|
//| `uvm_put_imp_decl(_1)
//| `uvm_put_imp_decl(_2)
//|
//| class my_put_imp#(type T=int) extends uvm_component;
//| uvm_put_imp_1#(T) put_imp1;
//| uvm_put_imp_2#(T) put_imp2;
//| ...
//| function void put_1 (input T t);
//| //puts comming into put_imp1
//| ...
//| endfunction
//| function void put_2(input T t);
//| //puts comming into put_imp2
//| ...
//| endfunction
//| endclass
//
// The important thing to note is that each `uvm_<interface>_imp_decl creates a
// new class of type uvm_<interface>_imp<suffix>, where suffix is the input
// argument to the macro. For this reason, you will typically want to put
// these macros in a seperate package to avoid collisions and to allow
// sharing of the definitions.
//-----------------------------------------------------------------------------
// MACRO: `uvm_blocking_put_imp_decl
//
//| `uvm_blocking_put_imp_decl(SFX)
//
// Define the class uvm_blocking_put_impSFX for providing blocking put
// implementations. ~SFX~ is the suffix for the new class type.
`define uvm_blocking_put_imp_decl(SFX) \
class uvm_blocking_put_imp``SFX #(type T=int, type IMP=int) \
extends uvm_port_base #(uvm_tlm_if_base #(T,T)); \
`UVM_IMP_COMMON(`UVM_TLM_BLOCKING_PUT_MASK,`"uvm_blocking_put_imp``SFX`",IMP) \
`UVM_BLOCKING_PUT_IMP_SFX(SFX, m_imp, T, t) \
endclass
// MACRO: `uvm_nonblocking_put_imp_decl
//
//| `uvm_nonblocking_put_imp_decl(SFX)
//
// Define the class uvm_nonblocking_put_impSFX for providing non-blocking
// put implementations. ~SFX~ is the suffix for the new class type.
`define uvm_nonblocking_put_imp_decl(SFX) \
class uvm_nonblocking_put_imp``SFX #(type T=int, type IMP=int) \
extends uvm_port_base #(uvm_tlm_if_base #(T,T)); \
`UVM_IMP_COMMON(`UVM_TLM_NONBLOCKING_PUT_MASK,`"uvm_nonblocking_put_imp``SFX`",IMP) \
`UVM_NONBLOCKING_PUT_IMP_SFX( SFX, m_imp, T, t) \
endclass
// MACRO: `uvm_put_imp_decl
//
//| `uvm_put_imp_decl(SFX)
//
// Define the class uvm_put_impSFX for providing both blocking and
// non-blocking put implementations. ~SFX~ is the suffix for the new class
// type.
`define uvm_put_imp_decl(SFX) \
class uvm_put_imp``SFX #(type T=int, type IMP=int) \
extends uvm_port_base #(uvm_tlm_if_base #(T,T)); \
`UVM_IMP_COMMON(`UVM_TLM_PUT_MASK,`"uvm_put_imp``SFX`",IMP) \
`UVM_BLOCKING_PUT_IMP_SFX(SFX, m_imp, T, t) \
`UVM_NONBLOCKING_PUT_IMP_SFX(SFX, m_imp, T, t) \
endclass
// MACRO: `uvm_blocking_get_imp_decl
//
//| `uvm_blocking_get_imp_decl(SFX)
//
// Define the class uvm_blocking_get_impSFX for providing blocking get
// implementations. ~SFX~ is the suffix for the new class type.
`define uvm_blocking_get_imp_decl(SFX) \
class uvm_blocking_get_imp``SFX #(type T=int, type IMP=int) \
extends uvm_port_base #(uvm_tlm_if_base #(T,T)); \
`UVM_IMP_COMMON(`UVM_TLM_BLOCKING_GET_MASK,`"uvm_blocking_get_imp``SFX`",IMP) \
`UVM_BLOCKING_GET_IMP_SFX(SFX, m_imp, T, t) \
endclass
// MACRO: `uvm_nonblocking_get_imp_decl
//
//| `uvm_nonblocking_get_imp_decl(SFX)
//
// Define the class uvm_nonblocking_get_impSFX for providing non-blocking
// get implementations. ~SFX~ is the suffix for the new class type.
`define uvm_nonblocking_get_imp_decl(SFX) \
class uvm_nonblocking_get_imp``SFX #(type T=int, type IMP=int) \
extends uvm_port_base #(uvm_tlm_if_base #(T,T)); \
`UVM_IMP_COMMON(`UVM_TLM_NONBLOCKING_GET_MASK,`"uvm_nonblocking_get_imp``SFX`",IMP) \
`UVM_NONBLOCKING_GET_IMP_SFX(SFX, m_imp, T, t) \
endclass
// MACRO: `uvm_get_imp_decl
//
//| `uvm_get_imp_decl(SFX)
//
// Define the class uvm_get_impSFX for providing both blocking and
// non-blocking get implementations. ~SFX~ is the suffix for the new class
// type.
`define uvm_get_imp_decl(SFX) \
class uvm_get_imp``SFX #(type T=int, type IMP=int) \
extends uvm_port_base #(uvm_tlm_if_base #(T,T)); \
`UVM_IMP_COMMON(`UVM_TLM_GET_MASK,`"uvm_get_imp``SFX`",IMP) \
`UVM_BLOCKING_GET_IMP_SFX(SFX, m_imp, T, t) \
`UVM_NONBLOCKING_GET_IMP_SFX(SFX, m_imp, T, t) \
endclass
// MACRO: `uvm_blocking_peek_imp_decl
//
//| `uvm_blocking_peek_imp_decl(SFX)
//
// Define the class uvm_blocking_peek_impSFX for providing blocking peek
// implementations. ~SFX~ is the suffix for the new class type.
`define uvm_blocking_peek_imp_decl(SFX) \
class uvm_blocking_peek_imp``SFX #(type T=int, type IMP=int) \
extends uvm_port_base #(uvm_tlm_if_base #(T,T)); \
`UVM_IMP_COMMON(`UVM_TLM_BLOCKING_PEEK_MASK,`"uvm_blocking_peek_imp``SFX`",IMP) \
`UVM_BLOCKING_PEEK_IMP_SFX(SFX, m_imp, T, t) \
endclass
// MACRO: `uvm_nonblocking_peek_imp_decl
//
//| `uvm_nonblocking_peek_imp_decl(SFX)
//
// Define the class uvm_nonblocking_peek_impSFX for providing non-blocking
// peek implementations. ~SFX~ is the suffix for the new class type.
`define uvm_nonblocking_peek_imp_decl(SFX) \
class uvm_nonblocking_peek_imp``SFX #(type T=int, type IMP=int) \
extends uvm_port_base #(uvm_tlm_if_base #(T,T)); \
`UVM_IMP_COMMON(`UVM_TLM_NONBLOCKING_PEEK_MASK,`"uvm_nonblocking_peek_imp``SFX`",IMP) \
`UVM_NONBLOCKING_PEEK_IMP_SFX(SFX, m_imp, T, t) \
endclass
// MACRO: `uvm_peek_imp_decl
//
//| `uvm_peek_imp_decl(SFX)
//
// Define the class uvm_peek_impSFX for providing both blocking and
// non-blocking peek implementations. ~SFX~ is the suffix for the new class
// type.
`define uvm_peek_imp_decl(SFX) \
class uvm_peek_imp``SFX #(type T=int, type IMP=int) \
extends uvm_port_base #(uvm_tlm_if_base #(T,T)); \
`UVM_IMP_COMMON(`UVM_TLM_PEEK_MASK,`"uvm_peek_imp``SFX`",IMP) \
`UVM_BLOCKING_PEEK_IMP_SFX(SFX, m_imp, T, t) \
`UVM_NONBLOCKING_PEEK_IMP_SFX(SFX, m_imp, T, t) \
endclass
// MACRO: `uvm_blocking_get_peek_imp_decl
//
//| `uvm_blocking_get_peek_imp_decl(SFX)
//
// Define the class uvm_blocking_get_peek_impSFX for providing the
// blocking get_peek implemenation.
`define uvm_blocking_get_peek_imp_decl(SFX) \
class uvm_blocking_get_peek_imp``SFX #(type T=int, type IMP=int) \
extends uvm_port_base #(uvm_tlm_if_base #(T,T)); \
`UVM_IMP_COMMON(`UVM_TLM_BLOCKING_GET_PEEK_MASK,`"uvm_blocking_get_peek_imp``SFX`",IMP) \
`UVM_BLOCKING_GET_IMP_SFX(SFX, m_imp, T, t) \
`UVM_BLOCKING_PEEK_IMP_SFX(SFX, m_imp, T, t) \
endclass
// MACRO: `uvm_nonblocking_get_peek_imp_decl
//
//| `uvm_nonblocking_get_peek_imp_decl(SFX)
//
// Define the class uvm_nonblocking_get_peek_impSFX for providing non-blocking
// get_peek implemenation.
`define uvm_nonblocking_get_peek_imp_decl(SFX) \
class uvm_nonblocking_get_peek_imp``SFX #(type T=int, type IMP=int) \
extends uvm_port_base #(uvm_tlm_if_base #(T,T)); \
`UVM_IMP_COMMON(`UVM_TLM_NONBLOCKING_GET_PEEK_MASK,`"uvm_nonblocking_get_peek_imp``SFX`",IMP) \
`UVM_NONBLOCKING_GET_IMP_SFX(SFX, m_imp, T, t) \
`UVM_NONBLOCKING_PEEK_IMP_SFX(SFX, m_imp, T, t) \
endclass
// MACRO: `uvm_get_peek_imp_decl
//
//| `uvm_get_peek_imp_decl(SFX)
//
// Define the class uvm_get_peek_impSFX for providing both blocking and
// non-blocking get_peek implementations. ~SFX~ is the suffix for the new class
// type.
`define uvm_get_peek_imp_decl(SFX) \
class uvm_get_peek_imp``SFX #(type T=int, type IMP=int) \
extends uvm_port_base #(uvm_tlm_if_base #(T,T)); \
`UVM_IMP_COMMON(`UVM_TLM_GET_PEEK_MASK,`"uvm_get_peek_imp``SFX`",IMP) \
`UVM_BLOCKING_GET_IMP_SFX(SFX, m_imp, T, t) \
`UVM_NONBLOCKING_GET_IMP_SFX(SFX, m_imp, T, t) \
`UVM_BLOCKING_PEEK_IMP_SFX(SFX, m_imp, T, t) \
`UVM_NONBLOCKING_PEEK_IMP_SFX(SFX, m_imp, T, t) \
endclass
// MACRO: `uvm_blocking_master_imp_decl
//
//| `uvm_blocking_master_imp_decl(SFX)
//
// Define the class uvm_blocking_master_impSFX for providing the
// blocking master implemenation.
`define uvm_blocking_master_imp_decl(SFX) \
class uvm_blocking_master_imp``SFX #(type REQ=int, type RSP=int, type IMP=int, \
type REQ_IMP=IMP, type RSP_IMP=IMP) \
extends uvm_port_base #(uvm_tlm_if_base #(REQ, RSP)); \
typedef IMP this_imp_type; \
typedef REQ_IMP this_req_type; \
typedef RSP_IMP this_rsp_type; \
`UVM_MS_IMP_COMMON(`UVM_TLM_BLOCKING_MASTER_MASK,`"uvm_blocking_master_imp``SFX`") \
\
`UVM_BLOCKING_PUT_IMP_SFX(SFX, m_req_imp, REQ, t) // req \
\
`UVM_BLOCKING_GET_IMP_SFX(SFX, m_rsp_imp, RSP, t) // rsp \
`UVM_BLOCKING_PEEK_IMP_SFX(SFX, m_rsp_imp, RSP, t) // rsp \
\
endclass
// MACRO: `uvm_nonblocking_master_imp_decl
//
//| `uvm_nonblocking_master_imp_decl(SFX)
//
// Define the class uvm_nonblocking_master_impSFX for providing the
// non-blocking master implemenation.
`define uvm_nonblocking_master_imp_decl(SFX) \
class uvm_nonblocking_master_imp``SFX #(type REQ=int, type RSP=int, type IMP=int, \
type REQ_IMP=IMP, type RSP_IMP=IMP) \
extends uvm_port_base #(uvm_tlm_if_base #(REQ, RSP)); \
typedef IMP this_imp_type; \
typedef REQ_IMP this_req_type; \
typedef RSP_IMP this_rsp_type; \
`UVM_MS_IMP_COMMON(`UVM_TLM_NONBLOCKING_MASTER_MASK,`"uvm_nonblocking_master_imp``SFX`") \
\
`UVM_NONBLOCKING_PUT_IMP_SFX(SFX, m_req_imp, REQ, t) // req \
\
`UVM_NONBLOCKING_GET_IMP_SFX(SFX, m_rsp_imp, RSP, t) // rsp \
`UVM_NONBLOCKING_PEEK_IMP_SFX(SFX, m_rsp_imp, RSP, t) // rsp \
\
endclass
// MACRO: `uvm_master_imp_decl
//
//| `uvm_master_imp_decl(SFX)
//
// Define the class uvm_master_impSFX for providing both blocking and
// non-blocking master implementations. ~SFX~ is the suffix for the new class
// type.
`define uvm_master_imp_decl(SFX) \
class uvm_master_imp``SFX #(type REQ=int, type RSP=int, type IMP=int, \
type REQ_IMP=IMP, type RSP_IMP=IMP) \
extends uvm_port_base #(uvm_tlm_if_base #(REQ, RSP)); \
typedef IMP this_imp_type; \
typedef REQ_IMP this_req_type; \
typedef RSP_IMP this_rsp_type; \
`UVM_MS_IMP_COMMON(`UVM_TLM_MASTER_MASK,`"uvm_master_imp``SFX`") \
\
`UVM_BLOCKING_PUT_IMP_SFX(SFX, m_req_imp, REQ, t) // req \
`UVM_NONBLOCKING_PUT_IMP_SFX(SFX, m_req_imp, REQ, t) // req \
\
`UVM_BLOCKING_GET_IMP_SFX(SFX, m_rsp_imp, RSP, t) // rsp \
`UVM_BLOCKING_PEEK_IMP_SFX(SFX, m_rsp_imp, RSP, t) // rsp \
`UVM_NONBLOCKING_GET_IMP_SFX(SFX, m_rsp_imp, RSP, t) // rsp \
`UVM_NONBLOCKING_PEEK_IMP_SFX(SFX, m_rsp_imp, RSP, t) // rsp \
\
endclass
// MACRO: `uvm_blocking_slave_imp_decl
//
//| `uvm_blocking_slave_imp_decl(SFX)
//
// Define the class uvm_blocking_slave_impSFX for providing the
// blocking slave implemenation.
`define uvm_blocking_slave_imp_decl(SFX) \
class uvm_blocking_slave_imp``SFX #(type REQ=int, type RSP=int, type IMP=int, \
type REQ_IMP=IMP, type RSP_IMP=IMP) \
extends uvm_port_base #(uvm_tlm_if_base #(RSP, REQ)); \
typedef IMP this_imp_type; \
typedef REQ_IMP this_req_type; \
typedef RSP_IMP this_rsp_type; \
`UVM_MS_IMP_COMMON(`UVM_TLM_BLOCKING_SLAVE_MASK,`"uvm_blocking_slave_imp``SFX`") \
\
`UVM_BLOCKING_PUT_IMP_SFX(SFX, m_rsp_imp, RSP, t) // rsp \
\
`UVM_BLOCKING_GET_IMP_SFX(SFX, m_req_imp, REQ, t) // req \
`UVM_BLOCKING_PEEK_IMP_SFX(SFX, m_req_imp, REQ, t) // req \
\
endclass
// MACRO: `uvm_nonblocking_slave_imp_decl
//
//| `uvm_nonblocking_slave_imp_decl(SFX)
//
// Define the class uvm_nonblocking_slave_impSFX for providing the
// non-blocking slave implemenation.
`define uvm_nonblocking_slave_imp_decl(SFX) \
class uvm_nonblocking_slave_imp``SFX #(type REQ=int, type RSP=int, type IMP=int, \
type REQ_IMP=IMP, type RSP_IMP=IMP) \
extends uvm_port_base #(uvm_tlm_if_base #(RSP, REQ)); \
typedef IMP this_imp_type; \
typedef REQ_IMP this_req_type; \
typedef RSP_IMP this_rsp_type; \
`UVM_MS_IMP_COMMON(`UVM_TLM_NONBLOCKING_SLAVE_MASK,`"uvm_nonblocking_slave_imp``SFX`") \
\
`UVM_NONBLOCKING_PUT_IMP_SFX(SFX, m_rsp_imp, RSP, t) // rsp \
\
`UVM_NONBLOCKING_GET_IMP_SFX(SFX, m_req_imp, REQ, t) // req \
`UVM_NONBLOCKING_PEEK_IMP_SFX(SFX, m_req_imp, REQ, t) // req \
\
endclass
// MACRO: `uvm_slave_imp_decl
//
//| `uvm_slave_imp_decl(SFX)
//
// Define the class uvm_slave_impSFX for providing both blocking and
// non-blocking slave implementations. ~SFX~ is the suffix for the new class
// type.
`define uvm_slave_imp_decl(SFX) \
class uvm_slave_imp``SFX #(type REQ=int, type RSP=int, type IMP=int, \
type REQ_IMP=IMP, type RSP_IMP=IMP) \
extends uvm_port_base #(uvm_tlm_if_base #(RSP, REQ)); \
typedef IMP this_imp_type; \
typedef REQ_IMP this_req_type; \
typedef RSP_IMP this_rsp_type; \
`UVM_MS_IMP_COMMON(`UVM_TLM_SLAVE_MASK,`"uvm_slave_imp``SFX`") \
\
`UVM_BLOCKING_PUT_IMP_SFX(SFX, m_rsp_imp, RSP, t) // rsp \
`UVM_NONBLOCKING_PUT_IMP_SFX(SFX, m_rsp_imp, RSP, t) // rsp \
\
`UVM_BLOCKING_GET_IMP_SFX(SFX, m_req_imp, REQ, t) // req \
`UVM_BLOCKING_PEEK_IMP_SFX(SFX, m_req_imp, REQ, t) // req \
`UVM_NONBLOCKING_GET_IMP_SFX(SFX, m_req_imp, REQ, t) // req \
`UVM_NONBLOCKING_PEEK_IMP_SFX(SFX, m_req_imp, REQ, t) // req \
\
endclass
// MACRO: `uvm_blocking_transport_imp_decl
//
//| `uvm_blocking_transport_imp_decl(SFX)
//
// Define the class uvm_blocking_transport_impSFX for providing the
// blocking transport implemenation.
`define uvm_blocking_transport_imp_decl(SFX) \
class uvm_blocking_transport_imp``SFX #(type REQ=int, type RSP=int, type IMP=int) \
extends uvm_port_base #(uvm_tlm_if_base #(REQ, RSP)); \
`UVM_IMP_COMMON(`UVM_TLM_BLOCKING_TRANSPORT_MASK,`"uvm_blocking_transport_imp``SFX`",IMP) \
`UVM_BLOCKING_TRANSPORT_IMP_SFX(SFX, m_imp, REQ, RSP, req, rsp) \
endclass
// MACRO: `uvm_nonblocking_transport_imp_decl
//
//| `uvm_nonblocking_transport_imp_decl(SFX)
//
// Define the class uvm_nonblocking_transport_impSFX for providing the
// non-blocking transport implemenation.
`define uvm_nonblocking_transport_imp_decl(SFX) \
class uvm_nonblocking_transport_imp``SFX #(type REQ=int, type RSP=int, type IMP=int) \
extends uvm_port_base #(uvm_tlm_if_base #(REQ, RSP)); \
`UVM_IMP_COMMON(`UVM_TLM_NONBLOCKING_TRANSPORT_MASK,`"uvm_nonblocking_transport_imp``SFX`",IMP) \
`UVM_NONBLOCKING_TRANSPORT_IMP_SFX(SFX, m_imp, REQ, RSP, req, rsp) \
endclass
`define uvm_non_blocking_transport_imp_decl(SFX) \
`uvm_nonblocking_transport_imp_decl(SFX)
// MACRO: `uvm_transport_imp_decl
//
//| `uvm_transport_imp_decl(SFX)
//
// Define the class uvm_transport_impSFX for providing both blocking and
// non-blocking transport implementations. ~SFX~ is the suffix for the new class
// type.
`define uvm_transport_imp_decl(SFX) \
class uvm_transport_imp``SFX #(type REQ=int, type RSP=int, type IMP=int) \
extends uvm_port_base #(uvm_tlm_if_base #(REQ, RSP)); \
`UVM_IMP_COMMON(`UVM_TLM_TRANSPORT_MASK,`"uvm_transport_imp``SFX`",IMP) \
`UVM_BLOCKING_TRANSPORT_IMP_SFX(SFX, m_imp, REQ, RSP, req, rsp) \
`UVM_NONBLOCKING_TRANSPORT_IMP_SFX(SFX, m_imp, REQ, RSP, req, rsp) \
endclass
// MACRO: `uvm_analysis_imp_decl
//
//| `uvm_analysis_imp_decl(SFX)
//
// Define the class uvm_analysis_impSFX for providing an analysis
// implementation. ~SFX~ is the suffix for the new class type. The analysis
// implemenation is the write function. The `uvm_analysis_imp_decl allows
// for a scoreboard (or other analysis component) to support input from many
// places. For example:
//
//| `uvm_analysis_imp_decl(_ingress)
//| `uvm_analysis_imp_decl(_egress)
//|
//| class myscoreboard extends uvm_component;
//| uvm_analysis_imp_ingress#(mydata, myscoreboard) ingress;
//| uvm_analysis_imp_egress#(mydata, myscoreboard) egress;
//| mydata ingress_list[$];
//| ...
//|
//| function new(string name, uvm_component parent);
//| super.new(name,parent);
//| ingress = new("ingress", this);
//| egress = new("egress", this);
//| endfunction
//|
//| function void write_ingress(mydata t);
//| ingress_list.push_back(t);
//| endfunction
//|
//| function void write_egress(mydata t);
//| find_match_in_ingress_list(t);
//| endfunction
//|
//| function void find_match_in_ingress_list(mydata t);
//| //implement scoreboarding for this particular dut
//| ...
//| endfunction
//| endclass
`define uvm_analysis_imp_decl(SFX) \
class uvm_analysis_imp``SFX #(type T=int, type IMP=int) \
extends uvm_port_base #(uvm_tlm_if_base #(T,T)); \
`UVM_IMP_COMMON(`UVM_TLM_ANALYSIS_MASK,`"uvm_analysis_imp``SFX`",IMP) \
function void write( input T t); \
m_imp.write``SFX( t); \
endfunction \
\
endclass
// These imps are used in uvm_*_port, uvm_*_export and uvm_*_imp, using suffixes
//
`define UVM_BLOCKING_PUT_IMP_SFX(SFX, imp, TYPE, arg) \
task put( input TYPE arg); imp.put``SFX( arg); endtask
`define UVM_BLOCKING_GET_IMP_SFX(SFX, imp, TYPE, arg) \
task get( output TYPE arg); imp.get``SFX( arg); endtask
`define UVM_BLOCKING_PEEK_IMP_SFX(SFX, imp, TYPE, arg) \
task peek( output TYPE arg);imp.peek``SFX( arg); endtask
`define UVM_NONBLOCKING_PUT_IMP_SFX(SFX, imp, TYPE, arg) \
function bit try_put( input TYPE arg); \
if( !imp.try_put``SFX( arg)) return 0; \
return 1; \
endfunction \
function bit can_put(); return imp.can_put``SFX(); endfunction
`define UVM_NONBLOCKING_GET_IMP_SFX(SFX, imp, TYPE, arg) \
function bit try_get( output TYPE arg); \
if( !imp.try_get``SFX( arg)) return 0; \
return 1; \
endfunction \
function bit can_get(); return imp.can_get``SFX(); endfunction
`define UVM_NONBLOCKING_PEEK_IMP_SFX(SFX, imp, TYPE, arg) \
function bit try_peek( output TYPE arg); \
if( !imp.try_peek``SFX( arg)) return 0; \
return 1; \
endfunction \
function bit can_peek(); return imp.can_peek``SFX(); endfunction
`define UVM_BLOCKING_TRANSPORT_IMP_SFX(SFX, imp, REQ, RSP, req_arg, rsp_arg) \
task transport( input REQ req_arg, output RSP rsp_arg); \
imp.transport``SFX(req_arg, rsp_arg); \
endtask
`define UVM_NONBLOCKING_TRANSPORT_IMP_SFX(SFX, imp, REQ, RSP, req_arg, rsp_arg) \
function bit nb_transport( input REQ req_arg, output RSP rsp_arg); \
if(imp) return imp.nb_transport``SFX(req_arg, rsp_arg); \
endfunction
//----------------------------------------------------------------------
// imp definitions
//----------------------------------------------------------------------
`define UVM_SEQ_ITEM_PULL_IMP(imp, REQ, RSP, req_arg, rsp_arg) \
task get_next_item(output REQ req_arg); imp.get_next_item(req_arg); endtask \
task try_next_item(output REQ req_arg); imp.try_next_item(req_arg); endtask \
function void item_done(input RSP rsp_arg = null); imp.item_done(rsp_arg); endfunction \
task wait_for_sequences(); imp.wait_for_sequences(); endtask \
function bit has_do_available(); return imp.has_do_available(); endfunction \
function void put_response(input RSP rsp_arg); imp.put_response(rsp_arg); endfunction \
task get(output REQ req_arg); imp.get(req_arg); endtask \
task peek(output REQ req_arg); imp.peek(req_arg); endtask \
task put(input RSP rsp_arg); imp.put(rsp_arg); endtask
// primitive interfaces
`define UVM_TLM_BLOCKING_PUT_MASK (1<<0)
`define UVM_TLM_BLOCKING_GET_MASK (1<<1)
`define UVM_TLM_BLOCKING_PEEK_MASK (1<<2)
`define UVM_TLM_BLOCKING_TRANSPORT_MASK (1<<3)
`define UVM_TLM_NONBLOCKING_PUT_MASK (1<<4)
`define UVM_TLM_NONBLOCKING_GET_MASK (1<<5)
`define UVM_TLM_NONBLOCKING_PEEK_MASK (1<<6)
`define UVM_TLM_NONBLOCKING_TRANSPORT_MASK (1<<7)
`define UVM_TLM_ANALYSIS_MASK (1<<8)
`define UVM_TLM_MASTER_BIT_MASK (1<<9)
`define UVM_TLM_SLAVE_BIT_MASK (1<<10)
// combination interfaces
`define UVM_TLM_PUT_MASK (`UVM_TLM_BLOCKING_PUT_MASK | `UVM_TLM_NONBLOCKING_PUT_MASK)
`define UVM_TLM_GET_MASK (`UVM_TLM_BLOCKING_GET_MASK | `UVM_TLM_NONBLOCKING_GET_MASK)
`define UVM_TLM_PEEK_MASK (`UVM_TLM_BLOCKING_PEEK_MASK | `UVM_TLM_NONBLOCKING_PEEK_MASK)
`define UVM_TLM_BLOCKING_GET_PEEK_MASK (`UVM_TLM_BLOCKING_GET_MASK | `UVM_TLM_BLOCKING_PEEK_MASK)
`define UVM_TLM_BLOCKING_MASTER_MASK (`UVM_TLM_BLOCKING_PUT_MASK | `UVM_TLM_BLOCKING_GET_MASK | `UVM_TLM_BLOCKING_PEEK_MASK | `UVM_TLM_MASTER_BIT_MASK)
`define UVM_TLM_BLOCKING_SLAVE_MASK (`UVM_TLM_BLOCKING_PUT_MASK | `UVM_TLM_BLOCKING_GET_MASK | `UVM_TLM_BLOCKING_PEEK_MASK | `UVM_TLM_SLAVE_BIT_MASK)
`define UVM_TLM_NONBLOCKING_GET_PEEK_MASK (`UVM_TLM_NONBLOCKING_GET_MASK | `UVM_TLM_NONBLOCKING_PEEK_MASK)
`define UVM_TLM_NONBLOCKING_MASTER_MASK (`UVM_TLM_NONBLOCKING_PUT_MASK | `UVM_TLM_NONBLOCKING_GET_MASK | `UVM_TLM_NONBLOCKING_PEEK_MASK | `UVM_TLM_MASTER_BIT_MASK)
`define UVM_TLM_NONBLOCKING_SLAVE_MASK (`UVM_TLM_NONBLOCKING_PUT_MASK | `UVM_TLM_NONBLOCKING_GET_MASK | `UVM_TLM_NONBLOCKING_PEEK_MASK | `UVM_TLM_SLAVE_BIT_MASK)
`define UVM_TLM_GET_PEEK_MASK (`UVM_TLM_GET_MASK | `UVM_TLM_PEEK_MASK)
`define UVM_TLM_MASTER_MASK (`UVM_TLM_BLOCKING_MASTER_MASK | `UVM_TLM_NONBLOCKING_MASTER_MASK)
`define UVM_TLM_SLAVE_MASK (`UVM_TLM_BLOCKING_SLAVE_MASK | `UVM_TLM_NONBLOCKING_SLAVE_MASK)
`define UVM_TLM_TRANSPORT_MASK (`UVM_TLM_BLOCKING_TRANSPORT_MASK | `UVM_TLM_NONBLOCKING_TRANSPORT_MASK)
`define UVM_SEQ_ITEM_GET_NEXT_ITEM_MASK (1<<0)
`define UVM_SEQ_ITEM_TRY_NEXT_ITEM_MASK (1<<1)
`define UVM_SEQ_ITEM_ITEM_DONE_MASK (1<<2)
`define UVM_SEQ_ITEM_HAS_DO_AVAILABLE_MASK (1<<3)
`define UVM_SEQ_ITEM_WAIT_FOR_SEQUENCES_MASK (1<<4)
`define UVM_SEQ_ITEM_PUT_RESPONSE_MASK (1<<5)
`define UVM_SEQ_ITEM_PUT_MASK (1<<6)
`define UVM_SEQ_ITEM_GET_MASK (1<<7)
`define UVM_SEQ_ITEM_PEEK_MASK (1<<8)
`define UVM_SEQ_ITEM_PULL_MASK (`UVM_SEQ_ITEM_GET_NEXT_ITEM_MASK | `UVM_SEQ_ITEM_TRY_NEXT_ITEM_MASK | \
`UVM_SEQ_ITEM_ITEM_DONE_MASK | `UVM_SEQ_ITEM_HAS_DO_AVAILABLE_MASK | \
`UVM_SEQ_ITEM_WAIT_FOR_SEQUENCES_MASK | `UVM_SEQ_ITEM_PUT_RESPONSE_MASK | \
`UVM_SEQ_ITEM_PUT_MASK | `UVM_SEQ_ITEM_GET_MASK | `UVM_SEQ_ITEM_PEEK_MASK)
`define UVM_SEQ_ITEM_UNI_PULL_MASK (`UVM_SEQ_ITEM_GET_NEXT_ITEM_MASK | `UVM_SEQ_ITEM_TRY_NEXT_ITEM_MASK | \
`UVM_SEQ_ITEM_ITEM_DONE_MASK | `UVM_SEQ_ITEM_HAS_DO_AVAILABLE_MASK | \
`UVM_SEQ_ITEM_WAIT_FOR_SEQUENCES_MASK | `UVM_SEQ_ITEM_GET_MASK | \
`UVM_SEQ_ITEM_PEEK_MASK)
`define UVM_SEQ_ITEM_PUSH_MASK (`UVM_SEQ_ITEM_PUT_MASK)
`include "tlm1/uvm_tlm_imps.svh"

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//----------------------------------------------------------------------
// Copyright 2007-2010 Mentor Graphics Corporation
// Copyright 2007-2010 Cadence Design Systems, Inc.
// Copyright 2010 Synopsys, Inc.
// All Rights Reserved Worldwide
//
// Licensed under the Apache License, Version 2.0 (the
// "License"); you may not use this file except in
// compliance with the License. You may obtain a copy of
// the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in
// writing, software distributed under the License is
// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See
// the License for the specific language governing
// permissions and limitations under the License.
//----------------------------------------------------------------------
// This file undefs all macros that are defined by the UVM library. This can
// be used to load uvm into multiple scopes using a single compilation.
`undef UVM_BLOCKING_GET_IMP
`undef UVM_BLOCKING_GET_IMP_SFX
`undef UVM_BLOCKING_GET_PEEK_IMP
`undef UVM_BLOCKING_PEEK_IMP
`undef UVM_BLOCKING_PEEK_IMP_SFX
`undef UVM_BLOCKING_PUT_IMP
`undef UVM_BLOCKING_PUT_IMP_SFX
`undef UVM_BLOCKING_TRANSPORT_IMP
`undef UVM_BLOCKING_TRANSPORT_IMP_SFX
`undef DODEEPCOPY
`undef DOREFERENCECOPY
`undef DOSHALLOWCOPY
`undef UVM_FUNCTION_ERROR
`undef UVM_GET_IMP
`undef UVM_GET_PEEK_IMP
`undef M_RESIZE_QUEUE_COPY
`undef M_RESIZE_QUEUE_NOCOPY
`undef M_RESIZE_QUEUE_OBJECT_COPY
`undef M_RESIZE_QUEUE_OBJECT_NOCOPY
`undef m_uvm_record_any_object
`undef m_uvm_record_array_int
`undef m_uvm_record_array_object
`undef m_uvm_record_array_string
`undef m_uvm_record_int
`undef m_uvm_record_object
`undef m_uvm_record_qda_enum
`undef m_uvm_record_string
`undef UVM_NONBLOCKING_GET_IMP
`undef UVM_NONBLOCKING_GET_IMP_SFX
`undef UVM_NONBLOCKING_GET_PEEK_IMP
`undef UVM_NONBLOCKING_PEEK_IMP
`undef UVM_NONBLOCKING_PEEK_IMP_SFX
`undef UVM_NONBLOCKING_PUT_IMP
`undef UVM_NONBLOCKING_PUT_IMP_SFX
`undef UVM_NONBLOCKING_TRANSPORT_IMP
`undef UVM_NONBLOCKING_TRANSPORT_IMP_SFX
`undef UVM_PEEK_IMP
`undef print_enum_field
`undef print_integral_field
`undef _protected
`undef UVM_PUT_IMP
`undef UVM_SEQ_ITEM_FUNCTION_ERROR
`undef UVM_SEQ_ITEM_GET_MASK
`undef UVM_SEQ_ITEM_GET_NEXT_ITEM_MASK
`undef UVM_SEQ_ITEM_HAS_DO_AVAILABLE_MASK
`undef UVM_SEQ_ITEM_ITEM_DONE_MASK
`undef UVM_SEQ_ITEM_PEEK_MASK
`undef UVM_SEQ_ITEM_PULL_IMP
`undef UVM_SEQ_ITEM_PULL_MASK
`undef UVM_SEQ_ITEM_PUSH_MASK
`undef UVM_SEQ_ITEM_PUT_MASK
`undef UVM_SEQ_ITEM_PUT_RESPONSE_MASK
`undef UVM_SEQ_ITEM_TASK_ERROR
`undef UVM_SEQ_ITEM_TRY_NEXT_ITEM_MASK
`undef UVM_SEQ_ITEM_UNI_PULL_MASK
`undef UVM_SEQ_ITEM_WAIT_FOR_SEQUENCES_MASK
`undef UVM_TASK_ERROR
`undef UVM_TRANSPORT_IMP
`undef _UVM_CB_MSG_NO_CBS
`undef _UVM_CB_MSG_NOT_REG
`undef _UVM_CB_MSG_NULL_CB
`undef _UVM_CB_MSG_NULL_OBJ

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//----------------------------------------------------------------------
// Copyright 2007-2010 Mentor Graphics Corporation
// Copyright 2007-2010 Cadence Design Systems, Inc.
// Copyright 2010-2011 Synopsys, Inc.
// All Rights Reserved Worldwide
//
// Licensed under the Apache License, Version 2.0 (the
// "License"); you may not use this file except in
// compliance with the License. You may obtain a copy of
// the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in
// writing, software distributed under the License is
// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See
// the License for the specific language governing
// permissions and limitations under the License.
//----------------------------------------------------------------------
`ifndef UVM_VERSION_DEFINES_SVH
`define UVM_VERSION_DEFINES_SVH
// Version numbers to be used in creating version strings for printing
// or programmatic tesing against version numbers
`define UVM_NAME UVM
`define UVM_MAJOR_REV 1
`define UVM_MINOR_REV 1
`define UVM_FIX_REV d
// Whole version identifiers that can be used in `ifdefs and `ifndefs
// to do conditional compilation
`define UVM_VERSION_1_1
`define UVM_MAJOR_VERSION_1_1
`define UVM_FIX_VERSION_1_1_d
`define UVM_MAJOR_REV_1
`define UVM_MINOR_REV_1
`define UVM_FIX_REV_d
// When there is a FIX_REV, print as "M.mf"
// When there is NO FIX_REV, print as "M.m".
// Fix rev kind of string:
`define UVM_VERSION_STRING `"`UVM_NAME``-```UVM_MAJOR_REV``.```UVM_MINOR_REV`UVM_FIX_REV`"
// No fix rev kind of string:
//`define UVM_VERSION_STRING `"`UVM_NAME``-```UVM_MAJOR_REV``.```UVM_MINOR_REV```"
`endif // UVM_VERSION_DEFINES_SVH

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`define IVL_UVM_MBX_T apb_xn
// `define IVL_UVM_MBX_T int
`define uvm_info(ID, MSG, VERB)
package p;
typedef enum {IDLE, APB_WR, APB_RD} apb_kind_e;
class apb_xn;
rand int addr;
rand int data;
rand apb_kind_e kind;
function new ();
addr = $urandom();
data = $urandom();
endfunction : new
virtual function void print ();
$display ("%m addr: 0x%0h data: 0x%0h kind: %0d ",
addr, data, kind);
endfunction : print
endclass : apb_xn
class ivl_uvm_mbx;
endclass : ivl_uvm_mbx
class uvm_phase;
endclass : uvm_phase
class ivl_uvm_tlm_export;
endclass : ivl_uvm_tlm_export
class ivl_uvm_tlm_drvr_port;
bit is_full;
bit is_empty;
int m_size;
`IVL_UVM_MBX_T m_mbx_val;
function new (string name = "mailbox_int");
//super.new (name);
is_full = 0;
is_empty = 1;
endfunction : new
virtual task put (input `IVL_UVM_MBX_T in_xn);
//wait (is_full == 0);
while (is_full == 1) begin
#1;
end
m_mbx_val = in_xn;
//`g2u_printf (("MBX: Put: 0x%0h", in_xn))
is_full = 1;
is_empty = 0;
endtask : put
virtual task get (output `IVL_UVM_MBX_T out_xn);
//wait (is_empty == 0);
while (is_empty == 1) begin
#1;
end
out_xn = m_mbx_val;
//`g2u_printf (("MBX: Get: 0x%0h", out_xn))
is_full = 0;
is_empty = 1;
endtask : get
virtual function bit try_get (`IVL_UVM_MBX_T out_xn);
bit rval;
if (is_empty == 0) begin
is_full = 0;
is_empty = 1;
out_xn = m_mbx_val;
rval = 1;
end
endfunction : try_get
virtual task peek (output `IVL_UVM_MBX_T out_xn);
//wait (is_empty == 0);
while (is_empty == 1) begin
#1;
end
out_xn = m_mbx_val;
//`g2u_printf (("MBX: Peek: 0x%0h", out_xn))
endtask : peek
virtual function int num ();
return (is_full);
endfunction : num
virtual function void connect (ivl_uvm_tlm_export unused_tlm_exp);
endfunction : connect
virtual task get_next_item (output `IVL_UVM_MBX_T x0);
peek(x0);
endtask : get_next_item
virtual function void item_done ();
bit rval;
`IVL_UVM_MBX_T x0;
rval = try_get(x0);
endfunction : item_done
endclass : ivl_uvm_tlm_drvr_port
endpackage : p
module ivl_uvm_driver;
import p::*;
`IVL_UVM_MBX_T req;
`IVL_UVM_MBX_T rsp;
ivl_uvm_tlm_drvr_port seq_item_port;
initial begin
seq_item_port = new ();
end
task run_phase (uvm_phase phase);
forever begin
seq_item_port.get_next_item (req);
$display ("%m %0t Get:", $time);
req.print();
seq_item_port.item_done ();
end
endtask : run_phase
uvm_phase u_ph_0;
initial begin
run_phase (u_ph_0);
end
endmodule : ivl_uvm_driver
module ivl_uvm_sequencer;
import p::*;
ivl_uvm_tlm_export seq_item_export;
initial begin
seq_item_export = new ();
end
endmodule : ivl_uvm_sequencer
module ivl_uvm_agent;
import p::*;
ivl_uvm_driver drvr ();
ivl_uvm_sequencer sqr ();
function void connect_phase (uvm_phase phase);
drvr.seq_item_port.connect (sqr.seq_item_export);
endfunction : connect_phase
endmodule : ivl_uvm_agent
module ivl_uvm_sqr_drvr;
import p::*;
`IVL_UVM_MBX_T lv_put_val;
`IVL_UVM_MBX_T lv_get_val;
ivl_uvm_agent u_agent ();
task do_puts();
repeat (10) begin
lv_put_val = new();
u_agent.drvr.seq_item_port.put (lv_put_val);
$display ("Test MBX: Put");
lv_put_val.print();
#10;
end
endtask : do_puts
initial begin : test
// run_test ();
#100;
`uvm_info("IVL_UVM", "UVM_MEDIUM: Hello World", UVM_MEDIUM)
fork
do_puts();
join
#1000;
$finish (2);
end : test
endmodule : ivl_uvm_sqr_drvr

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//
//----------------------------------------------------------------------
// Copyright 2007-2011 Mentor Graphics Corporation
// Copyright 2007-2011 Cadence Design Systems, Inc.
// Copyright 2010 Synopsys, Inc.
// All Rights Reserved Worldwide
//
// Licensed under the Apache License, Version 2.0 (the
// "License"); you may not use this file except in
// compliance with the License. You may obtain a copy of
// the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in
// writing, software distributed under the License is
// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See
// the License for the specific language governing
// permissions and limitations under the License.
//----------------------------------------------------------------------
//------------------------------------------------------------------------------
// Title: Analysis Ports
//------------------------------------------------------------------------------
//
// This section defines the port, export, and imp classes used for transaction
// analysis.
//
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
// Class: uvm_analysis_port
//
// Broadcasts a value to all subscribers implementing a <uvm_analysis_imp>.
//
//| class mon extends uvm_component;
//| uvm_analysis_port#(trans) ap;
//|
//| function new(string name = "sb", uvm_component parent = null);
//| super.new(name, parent);
//| ap = new("ap", this);
//| endfunction
//|
//| task run_phase(uvm_phase phase);
//| trans t;
//| ...
//| ap.write(t);
//| ...
//| endfunction
//| endclass
//------------------------------------------------------------------------------
class uvm_analysis_port # (type T = int)
extends uvm_port_base # (uvm_tlm_if_base #(T,T));
function new (string name, uvm_component parent);
super.new (name, parent, UVM_PORT, 0, UVM_UNBOUNDED_CONNECTIONS);
m_if_mask = `UVM_TLM_ANALYSIS_MASK;
endfunction
virtual function string get_type_name();
return "uvm_analysis_port";
endfunction
// Method: write
// Send specified value to all connected interface
function void write (input T t);
uvm_tlm_if_base # (T, T) tif;
for (int i = 0; i < this.size(); i++) begin
tif = this.get_if (i);
if ( tif == null )
uvm_report_fatal ("NTCONN", {"No uvm_tlm interface is connected to ", get_full_name(), " for executing write()"}, UVM_NONE);
tif.write (t);
end
endfunction
endclass
//------------------------------------------------------------------------------
// Class: uvm_analysis_imp
//
// Receives all transactions broadcasted by a <uvm_analysis_port>. It serves as
// the termination point of an analysis port/export/imp connection. The component
// attached to the ~imp~ class--called a ~subscriber~-- implements the analysis
// interface.
//
// Will invoke the ~write(T)~ method in the parent component.
// The implementation of the ~write(T)~ method must not modify
// the value passed to it.
//
//| class sb extends uvm_component;
//| uvm_analysis_imp#(trans, sb) ap;
//|
//| function new(string name = "sb", uvm_component parent = null);
//| super.new(name, parent);
//| ap = new("ap", this);
//| endfunction
//|
//| function void write(trans t);
//| ...
//| endfunction
//| endclass
//------------------------------------------------------------------------------
class uvm_analysis_imp #(type T=int, type IMP=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_IMP_COMMON(`UVM_TLM_ANALYSIS_MASK,"uvm_analysis_imp",IMP)
function void write (input T t);
m_imp.write (t);
endfunction
endclass
//------------------------------------------------------------------------------
// Class: uvm_analysis_export
//
// Exports a lower-level <uvm_analysis_imp> to its parent.
//------------------------------------------------------------------------------
class uvm_analysis_export #(type T=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
// Function: new
// Instantiate the export.
function new (string name, uvm_component parent = null);
super.new (name, parent, UVM_EXPORT, 1, UVM_UNBOUNDED_CONNECTIONS);
m_if_mask = `UVM_TLM_ANALYSIS_MASK;
endfunction
virtual function string get_type_name();
return "uvm_analysis_export";
endfunction
// analysis port differs from other ports in that it broadcasts
// to all connected interfaces. Ports only send to the interface
// at the index specified in a call to set_if (0 by default).
function void write (input T t);
uvm_tlm_if_base #(T, T) tif;
for (int i = 0; i < this.size(); i++) begin
tif = this.get_if (i);
if (tif == null)
uvm_report_fatal ("NTCONN", {"No uvm_tlm interface is connected to ", get_full_name(), " for executing write()"}, UVM_NONE);
tif.write (t);
end
endfunction
endclass

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//
//------------------------------------------------------------------------------
// Copyright 2007-2011 Mentor Graphics Corporation
// Copyright 2007-2010 Cadence Design Systems, Inc.
// Copyright 2010 Synopsys, Inc.
// All Rights Reserved Worldwide
//
// Licensed under the Apache License, Version 2.0 (the
// "License"); you may not use this file except in
// compliance with the License. You may obtain a copy of
// the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in
// writing, software distributed under the License is
// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See
// the License for the specific language governing
// permissions and limitations under the License.
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
// Title: TLM Export Classes
//------------------------------------------------------------------------------
// The following classes define the TLM export classes.
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
//
// CLASS: uvm_*_export #(T)
//
// The unidirectional uvm_*_export is a port that ~forwards~ or ~promotes~
// an interface implementation from a child component to its parent.
// An export can be connected to any compatible child export or imp port.
// It must ultimately be connected to at least one implementation
// of its associated interface.
//
// The interface type represented by the asterisk is any of the following
//
//| blocking_put
//| nonblocking_put
//| put
//|
//| blocking_get
//| nonblocking_get
//| get
//|
//| blocking_peek
//| nonblocking_peek
//| peek
//|
//| blocking_get_peek
//| nonblocking_get_peek
//| get_peek
//
// Type parameters
//
// T - The type of transaction to be communicated by the export
//
// Exports are connected to interface implementations directly via
// <uvm_*_imp #(T,IMP)> ports or indirectly via other <uvm_*_export #(T)> exports.
//
//------------------------------------------------------------------------------
// Function: new
//
// The ~name~ and ~parent~ are the standard <uvm_component> constructor arguments.
// The ~min_size~ and ~max_size~ specify the minimum and maximum number of
// interfaces that must have been supplied to this port by the end of elaboration.
//
//| function new (string name,
//| uvm_component parent,
//| int min_size=1,
//| int max_size=1)
class uvm_blocking_put_export #(type T=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_EXPORT_COMMON(`UVM_TLM_BLOCKING_PUT_MASK,"uvm_blocking_put_export")
`UVM_BLOCKING_PUT_IMP (this.m_if, T, t)
endclass
class uvm_nonblocking_put_export #(type T=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_EXPORT_COMMON(`UVM_TLM_NONBLOCKING_PUT_MASK,"uvm_nonblocking_put_export")
`UVM_NONBLOCKING_PUT_IMP (this.m_if, T, t)
endclass
class uvm_put_export #(type T=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_EXPORT_COMMON(`UVM_TLM_PUT_MASK,"uvm_put_export")
`UVM_PUT_IMP (this.m_if, T, t)
endclass
class uvm_blocking_get_export #(type T=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_EXPORT_COMMON(`UVM_TLM_BLOCKING_GET_MASK,"uvm_blocking_get_export")
`UVM_BLOCKING_GET_IMP (this.m_if, T, t)
endclass
class uvm_nonblocking_get_export #(type T=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_EXPORT_COMMON(`UVM_TLM_NONBLOCKING_GET_MASK,"uvm_nonblocking_get_export")
`UVM_NONBLOCKING_GET_IMP (this.m_if, T, t)
endclass
class uvm_get_export #(type T=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_EXPORT_COMMON(`UVM_TLM_GET_MASK,"uvm_get_export")
`UVM_GET_IMP (this.m_if, T, t)
endclass
class uvm_blocking_peek_export #(type T=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_EXPORT_COMMON(`UVM_TLM_BLOCKING_PEEK_MASK,"uvm_blocking_peek_export")
`UVM_BLOCKING_PEEK_IMP (this.m_if, T, t)
endclass
class uvm_nonblocking_peek_export #(type T=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_EXPORT_COMMON(`UVM_TLM_NONBLOCKING_PEEK_MASK,"uvm_nonblocking_peek_export")
`UVM_NONBLOCKING_PEEK_IMP (this.m_if, T, t)
endclass
class uvm_peek_export #(type T=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_EXPORT_COMMON(`UVM_TLM_PEEK_MASK,"uvm_peek_export")
`UVM_PEEK_IMP (this.m_if, T, t)
endclass
class uvm_blocking_get_peek_export #(type T=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_EXPORT_COMMON(`UVM_TLM_BLOCKING_GET_PEEK_MASK,"uvm_blocking_get_peek_export")
`UVM_BLOCKING_GET_PEEK_IMP (this.m_if, T, t)
endclass
class uvm_nonblocking_get_peek_export #(type T=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_EXPORT_COMMON(`UVM_TLM_NONBLOCKING_GET_PEEK_MASK,"uvm_nonblocking_get_peek_export")
`UVM_NONBLOCKING_GET_PEEK_IMP (this.m_if, T, t)
endclass
class uvm_get_peek_export #(type T=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_EXPORT_COMMON(`UVM_TLM_GET_PEEK_MASK,"uvm_get_peek_export")
`UVM_GET_PEEK_IMP (this.m_if, T, t)
endclass
//------------------------------------------------------------------------------
//
// CLASS: uvm_*_export #(REQ,RSP)
//
// The bidirectional uvm_*_export is a port that ~forwards~ or ~promotes~
// an interface implementation from a child component to its parent.
// An export can be connected to any compatible child export or imp port.
// It must ultimately be connected to at least one implementation
// of its associated interface.
//
// The interface type represented by the asterisk is any of the following
//
//| blocking_transport
//| nonblocking_transport
//| transport
//|
//| blocking_master
//| nonblocking_master
//| master
//|
//| blocking_slave
//| nonblocking_slave
//| slave
//
// Type parameters
//
// REQ - The type of request transaction to be communicated by the export
//
// RSP - The type of response transaction to be communicated by the export
//
// Exports are connected to interface implementations directly via
// <uvm_*_imp #(REQ, RSP, IMP, REQ_IMP, RSP_IMP)> ports or indirectly via other
// <uvm_*_export #(REQ,RSP)> exports.
//
//------------------------------------------------------------------------------
// Function: new
//
// The ~name~ and ~parent~ are the standard <uvm_component> constructor arguments.
// The ~min_size~ and ~max_size~ specify the minimum and maximum number of
// interfaces that must have been supplied to this port by the end of elaboration.
//
//| function new (string name,
//| uvm_component parent,
//| int min_size=1,
//| int max_size=1)
class uvm_blocking_master_export #(type REQ=int, type RSP=REQ)
extends uvm_port_base #(uvm_tlm_if_base #(REQ, RSP));
`UVM_EXPORT_COMMON(`UVM_TLM_BLOCKING_MASTER_MASK,"uvm_blocking_master_export")
`UVM_BLOCKING_PUT_IMP (this.m_if, REQ, t)
`UVM_BLOCKING_GET_PEEK_IMP (this.m_if, RSP, t)
endclass
class uvm_nonblocking_master_export #(type REQ=int, type RSP=REQ)
extends uvm_port_base #(uvm_tlm_if_base #(REQ, RSP));
`UVM_EXPORT_COMMON(`UVM_TLM_NONBLOCKING_MASTER_MASK,"uvm_nonblocking_master_export")
`UVM_NONBLOCKING_PUT_IMP (this.m_if, REQ, t)
`UVM_NONBLOCKING_GET_PEEK_IMP (this.m_if, RSP, t)
endclass
class uvm_master_export #(type REQ=int, type RSP=REQ)
extends uvm_port_base #(uvm_tlm_if_base #(REQ, RSP));
`UVM_EXPORT_COMMON(`UVM_TLM_MASTER_MASK,"uvm_master_export")
`UVM_PUT_IMP (this.m_if, REQ, t)
`UVM_GET_PEEK_IMP (this.m_if, RSP, t)
endclass
class uvm_blocking_slave_export #(type REQ=int, type RSP=REQ)
extends uvm_port_base #(uvm_tlm_if_base #(RSP, REQ));
`UVM_EXPORT_COMMON(`UVM_TLM_BLOCKING_SLAVE_MASK,"uvm_blocking_slave_export")
`UVM_BLOCKING_PUT_IMP (this.m_if, RSP, t)
`UVM_BLOCKING_GET_PEEK_IMP (this.m_if, REQ, t)
endclass
class uvm_nonblocking_slave_export #(type REQ=int, type RSP=REQ)
extends uvm_port_base #(uvm_tlm_if_base #(RSP, REQ));
`UVM_EXPORT_COMMON(`UVM_TLM_NONBLOCKING_SLAVE_MASK,"uvm_nonblocking_slave_export")
`UVM_NONBLOCKING_PUT_IMP (this.m_if, RSP, t)
`UVM_NONBLOCKING_GET_PEEK_IMP (this.m_if, REQ, t)
endclass
class uvm_slave_export #(type REQ=int, type RSP=REQ)
extends uvm_port_base #(uvm_tlm_if_base #(RSP, REQ));
`UVM_EXPORT_COMMON(`UVM_TLM_SLAVE_MASK,"uvm_slave_export")
`UVM_PUT_IMP (this.m_if, RSP, t)
`UVM_GET_PEEK_IMP (this.m_if, REQ, t)
endclass
class uvm_blocking_transport_export #(type REQ=int, type RSP=REQ)
extends uvm_port_base #(uvm_tlm_if_base #(REQ, RSP));
`UVM_EXPORT_COMMON(`UVM_TLM_BLOCKING_TRANSPORT_MASK,"uvm_blocking_transport_export")
`UVM_BLOCKING_TRANSPORT_IMP (this.m_if, REQ, RSP, req, rsp)
endclass
class uvm_nonblocking_transport_export #(type REQ=int, type RSP=REQ)
extends uvm_port_base #(uvm_tlm_if_base #(REQ, RSP));
`UVM_EXPORT_COMMON(`UVM_TLM_NONBLOCKING_TRANSPORT_MASK,"uvm_nonblocking_transport_export")
`UVM_NONBLOCKING_TRANSPORT_IMP (this.m_if, REQ, RSP, req, rsp)
endclass
class uvm_transport_export #(type REQ=int, type RSP=REQ)
extends uvm_port_base #(uvm_tlm_if_base #(REQ, RSP));
`UVM_EXPORT_COMMON(`UVM_TLM_TRANSPORT_MASK,"uvm_transport_export")
`UVM_TRANSPORT_IMP (this.m_if, REQ, RSP, req, rsp)
endclass

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//
//------------------------------------------------------------------------------
// Copyright 2007-2011 Mentor Graphics Corporation
// Copyright 2007-2010 Cadence Design Systems, Inc.
// Copyright 2010 Synopsys, Inc.
// All Rights Reserved Worldwide
//
// Licensed under the Apache License, Version 2.0 (the
// "License"); you may not use this file except in
// compliance with the License. You may obtain a copy of
// the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in
// writing, software distributed under the License is
// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See
// the License for the specific language governing
// permissions and limitations under the License.
//-------------.----------------------------------------------------------------
//------------------------------------------------------------------------------
// Title: uvm_*_imp ports
//
// The following defines the TLM implementation (imp) classes.
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
//
// CLASS: uvm_*_imp #(T,IMP)
//
// Unidirectional implementation (imp) port classes--An imp port provides access
// to an implementation of the associated interface to all connected ~ports~ and
// ~exports~. Each imp port instance ~must~ be connected to the component instance
// that implements the associated interface, typically the imp port's parent.
// All other connections-- e.g. to other ports and exports-- are prohibited.
//
// The asterisk in ~uvm_*_imp~ may be any of the following
//
//| blocking_put
//| nonblocking_put
//| put
//|
//| blocking_get
//| nonblocking_get
//| get
//|
//| blocking_peek
//| nonblocking_peek
//| peek
//|
//| blocking_get_peek
//| nonblocking_get_peek
//| get_peek
//
// Type parameters
//
// T - The type of transaction to be communicated by the imp
//
// IMP - The type of the component implementing the interface. That is, the class
// to which this imp will delegate.
//
// The interface methods are implemented in a component of type ~IMP~, a handle
// to which is passed in a constructor argument. The imp port delegates all
// interface calls to this component.
//
//------------------------------------------------------------------------------
// Function: new
//
// Creates a new unidirectional imp port with the given ~name~ and ~parent~.
// The ~parent~ must implement the interface associated with this port.
// Its type must be the type specified in the imp's type-parameter, ~IMP~.
//
//| function new (string name, IMP parent);
class uvm_blocking_put_imp #(type T=int, type IMP=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_IMP_COMMON(`UVM_TLM_BLOCKING_PUT_MASK,"uvm_blocking_put_imp",IMP)
`UVM_BLOCKING_PUT_IMP (m_imp, T, t)
endclass
class uvm_nonblocking_put_imp #(type T=int, type IMP=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_IMP_COMMON(`UVM_TLM_NONBLOCKING_PUT_MASK,"uvm_nonblocking_put_imp",IMP)
`UVM_NONBLOCKING_PUT_IMP (m_imp, T, t)
endclass
class uvm_put_imp #(type T=int, type IMP=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_IMP_COMMON(`UVM_TLM_PUT_MASK,"uvm_put_imp",IMP)
`UVM_PUT_IMP (m_imp, T, t)
endclass
class uvm_blocking_get_imp #(type T=int, type IMP=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_IMP_COMMON(`UVM_TLM_BLOCKING_GET_MASK,"uvm_blocking_get_imp",IMP)
`UVM_BLOCKING_GET_IMP (m_imp, T, t)
endclass
class uvm_nonblocking_get_imp #(type T=int, type IMP=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_IMP_COMMON(`UVM_TLM_NONBLOCKING_GET_MASK,"uvm_nonblocking_get_imp",IMP)
`UVM_NONBLOCKING_GET_IMP (m_imp, T, t)
endclass
class uvm_get_imp #(type T=int, type IMP=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_IMP_COMMON(`UVM_TLM_GET_MASK,"uvm_get_imp",IMP)
`UVM_GET_IMP (m_imp, T, t)
endclass
class uvm_blocking_peek_imp #(type T=int, type IMP=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_IMP_COMMON(`UVM_TLM_BLOCKING_PEEK_MASK,"uvm_blocking_peek_imp",IMP)
`UVM_BLOCKING_PEEK_IMP (m_imp, T, t)
endclass
class uvm_nonblocking_peek_imp #(type T=int, type IMP=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_IMP_COMMON(`UVM_TLM_NONBLOCKING_PEEK_MASK,"uvm_nonblocking_peek_imp",IMP)
`UVM_NONBLOCKING_PEEK_IMP (m_imp, T, t)
endclass
class uvm_peek_imp #(type T=int, type IMP=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_IMP_COMMON(`UVM_TLM_PEEK_MASK,"uvm_peek_imp",IMP)
`UVM_PEEK_IMP (m_imp, T, t)
endclass
class uvm_blocking_get_peek_imp #(type T=int, type IMP=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_IMP_COMMON(`UVM_TLM_BLOCKING_GET_PEEK_MASK,"uvm_blocking_get_peek_imp",IMP)
`UVM_BLOCKING_GET_PEEK_IMP (m_imp, T, t)
endclass
class uvm_nonblocking_get_peek_imp #(type T=int, type IMP=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_IMP_COMMON(`UVM_TLM_NONBLOCKING_GET_PEEK_MASK,"uvm_nonblocking_get_peek_imp",IMP)
`UVM_NONBLOCKING_GET_PEEK_IMP (m_imp, T, t)
endclass
class uvm_get_peek_imp #(type T=int, type IMP=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_IMP_COMMON(`UVM_TLM_GET_PEEK_MASK,"uvm_get_peek_imp",IMP)
`UVM_GET_PEEK_IMP (m_imp, T, t)
endclass
//------------------------------------------------------------------------------
//
// CLASS: uvm_*_imp #(REQ, RSP, IMP, REQ_IMP, RSP_IMP)
//
// Bidirectional implementation (imp) port classes--An imp port provides access
// to an implementation of the associated interface to all connected ~ports~ and
// ~exports~. Each imp port instance ~must~ be connected to the component instance
// that implements the associated interface, typically the imp port's parent.
// All other connections-- e.g. to other ports and exports-- are prohibited.
//
// The interface represented by the asterisk is any of the following
//
//| blocking_transport
//| nonblocking_transport
//| transport
//|
//| blocking_master
//| nonblocking_master
//| master
//|
//| blocking_slave
//| nonblocking_slave
//| slave
//
// Type parameters
//
// REQ - Request transaction type
//
// RSP - Response transaction type
//
// IMP - Component type that implements the interface methods, typically the
// the parent of this imp port.
//
// REQ_IMP - Component type that implements the request side of the
// interface. Defaults to IMP. For master and slave imps only.
//
// RSP_IMP - Component type that implements the response side of the
// interface. Defaults to IMP. For master and slave imps only.
//
// The interface methods are implemented in a component of type ~IMP~, a handle
// to which is passed in a constructor argument. The imp port delegates all
// interface calls to this component.
//
// The master and slave imps have two modes of operation.
//
// - A single component of type IMP implements the entire interface for
// both requests and responses.
//
// - Two sibling components of type REQ_IMP and RSP_IMP implement the request
// and response interfaces, respectively. In this case, the IMP parent
// instantiates this imp port ~and~ the REQ_IMP and RSP_IMP components.
//
// The second mode is needed when a component instantiates more than one imp
// port, as in the <uvm_tlm_req_rsp_channel #(REQ,RSP)> channel.
//
//------------------------------------------------------------------------------
// Function: new
//
// Creates a new bidirectional imp port with the given ~name~ and ~parent~.
// The ~parent~, whose type is specified by ~IMP~ type parameter,
// must implement the interface associated with this port.
//
// Transport imp constructor
//
//| function new(string name, IMP imp)
//
// Master and slave imp constructor
//
// The optional ~req_imp~ and ~rsp_imp~ arguments, available to master and
// slave imp ports, allow the requests and responses to be handled by different
// subcomponents. If they are specified, they must point to the underlying
// component that implements the request and response methods, respectively.
//
//| function new(string name, IMP imp,
//| REQ_IMP req_imp=imp, RSP_IMP rsp_imp=imp)
class uvm_blocking_master_imp #(type REQ=int, type RSP=REQ, type IMP=int,
type REQ_IMP=IMP, type RSP_IMP=IMP)
extends uvm_port_base #(uvm_tlm_if_base #(REQ, RSP));
typedef IMP this_imp_type;
typedef REQ_IMP this_req_type;
typedef RSP_IMP this_rsp_type;
`UVM_MS_IMP_COMMON(`UVM_TLM_BLOCKING_MASTER_MASK,"uvm_blocking_master_imp")
`UVM_BLOCKING_PUT_IMP (m_req_imp, REQ, t)
`UVM_BLOCKING_GET_PEEK_IMP (m_rsp_imp, RSP, t)
endclass
class uvm_nonblocking_master_imp #(type REQ=int, type RSP=REQ, type IMP=int,
type REQ_IMP=IMP, type RSP_IMP=IMP)
extends uvm_port_base #(uvm_tlm_if_base #(REQ, RSP));
typedef IMP this_imp_type;
typedef REQ_IMP this_req_type;
typedef RSP_IMP this_rsp_type;
`UVM_MS_IMP_COMMON(`UVM_TLM_NONBLOCKING_MASTER_MASK,"uvm_nonblocking_master_imp")
`UVM_NONBLOCKING_PUT_IMP (m_req_imp, REQ, t)
`UVM_NONBLOCKING_GET_PEEK_IMP (m_rsp_imp, RSP, t)
endclass
class uvm_master_imp #(type REQ=int, type RSP=REQ, type IMP=int,
type REQ_IMP=IMP, type RSP_IMP=IMP)
extends uvm_port_base #(uvm_tlm_if_base #(REQ, RSP));
typedef IMP this_imp_type;
typedef REQ_IMP this_req_type;
typedef RSP_IMP this_rsp_type;
`UVM_MS_IMP_COMMON(`UVM_TLM_MASTER_MASK,"uvm_master_imp")
`UVM_PUT_IMP (m_req_imp, REQ, t)
`UVM_GET_PEEK_IMP (m_rsp_imp, RSP, t)
endclass
class uvm_blocking_slave_imp #(type REQ=int, type RSP=REQ, type IMP=int,
type REQ_IMP=IMP, type RSP_IMP=IMP)
extends uvm_port_base #(uvm_tlm_if_base #(RSP, REQ));
typedef IMP this_imp_type;
typedef REQ_IMP this_req_type;
typedef RSP_IMP this_rsp_type;
`UVM_MS_IMP_COMMON(`UVM_TLM_BLOCKING_SLAVE_MASK,"uvm_blocking_slave_imp")
`UVM_BLOCKING_PUT_IMP (m_rsp_imp, RSP, t)
`UVM_BLOCKING_GET_PEEK_IMP (m_req_imp, REQ, t)
endclass
class uvm_nonblocking_slave_imp #(type REQ=int, type RSP=REQ, type IMP=int,
type REQ_IMP=IMP, type RSP_IMP=IMP)
extends uvm_port_base #(uvm_tlm_if_base #(RSP, REQ));
typedef IMP this_imp_type;
typedef REQ_IMP this_req_type;
typedef RSP_IMP this_rsp_type;
`UVM_MS_IMP_COMMON(`UVM_TLM_NONBLOCKING_SLAVE_MASK,"uvm_nonblocking_slave_imp")
`UVM_NONBLOCKING_PUT_IMP (m_rsp_imp, RSP, t)
`UVM_NONBLOCKING_GET_PEEK_IMP (m_req_imp, REQ, t)
endclass
class uvm_slave_imp #(type REQ=int, type RSP=REQ, type IMP=int,
type REQ_IMP=IMP, type RSP_IMP=IMP)
extends uvm_port_base #(uvm_tlm_if_base #(RSP, REQ));
typedef IMP this_imp_type;
typedef REQ_IMP this_req_type;
typedef RSP_IMP this_rsp_type;
`UVM_MS_IMP_COMMON(`UVM_TLM_SLAVE_MASK,"uvm_slave_imp")
`UVM_PUT_IMP (m_rsp_imp, RSP, t)
`UVM_GET_PEEK_IMP (m_req_imp, REQ, t)
endclass
class uvm_blocking_transport_imp #(type REQ=int, type RSP=REQ, type IMP=int)
extends uvm_port_base #(uvm_tlm_if_base #(REQ, RSP));
`UVM_IMP_COMMON(`UVM_TLM_BLOCKING_TRANSPORT_MASK,"uvm_blocking_transport_imp",IMP)
`UVM_BLOCKING_TRANSPORT_IMP (m_imp, REQ, RSP, req, rsp)
endclass
class uvm_nonblocking_transport_imp #(type REQ=int, type RSP=REQ, type IMP=int)
extends uvm_port_base #(uvm_tlm_if_base #(REQ, RSP));
`UVM_IMP_COMMON(`UVM_TLM_NONBLOCKING_TRANSPORT_MASK,"uvm_nonblocking_transport_imp",IMP)
`UVM_NONBLOCKING_TRANSPORT_IMP (m_imp, REQ, RSP, req, rsp)
endclass
class uvm_transport_imp #(type REQ=int, type RSP=REQ, type IMP=int)
extends uvm_port_base #(uvm_tlm_if_base #(REQ, RSP));
`UVM_IMP_COMMON(`UVM_TLM_TRANSPORT_MASK,"uvm_transport_imp",IMP)
`UVM_BLOCKING_TRANSPORT_IMP (m_imp, REQ, RSP, req, rsp)
`UVM_NONBLOCKING_TRANSPORT_IMP (m_imp, REQ, RSP, req, rsp)
endclass

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//
//----------------------------------------------------------------------
// Copyright 2007-2011 Mentor Graphics Corporation
// Copyright 2007-2010 Cadence Design Systems, Inc.
// Copyright 2010 Synopsys, Inc.
// All Rights Reserved Worldwide
//
// Licensed under the Apache License, Version 2.0 (the
// "License"); you may not use this file except in
// compliance with the License. You may obtain a copy of
// the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in
// writing, software distributed under the License is
// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See
// the License for the specific language governing
// permissions and limitations under the License.
//----------------------------------------------------------------------
//------------------------------------------------------------------------------
// Title: TLM Port Classes
//------------------------------------------------------------------------------
// The following classes define the TLM port classes.
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
//
// Class: uvm_*_port #(T)
//
// These unidirectional ports are instantiated by components that ~require~,
// or ~use~, the associated interface to convey transactions. A port can
// be connected to any compatible port, export, or imp port. Unless its
// ~min_size~ is 0, a port ~must~ be connected to at least one implementation
// of its assocated interface.
//
// The asterisk in ~uvm_*_port~ is any of the following
//
//| blocking_put
//| nonblocking_put
//| put
//|
//| blocking_get
//| nonblocking_get
//| get
//|
//| blocking_peek
//| nonblocking_peek
//| peek
//|
//| blocking_get_peek
//| nonblocking_get_peek
//| get_peek
//
// Type parameters
//
// T - The type of transaction to be communicated by the export
//
// Ports are connected to interface implementations directly via
// <uvm_*_imp #(T,IMP)> ports or indirectly via hierarchical connections
// to <uvm_*_port #(T)> and <uvm_*_export #(T)> ports.
//
//------------------------------------------------------------------------------
// Function: new
//
// The ~name~ and ~parent~ are the standard <uvm_component> constructor arguments.
// The ~min_size~ and ~max_size~ specify the minimum and maximum number of
// interfaces that must have been connected to this port by the end of elaboration.
//
//| function new (string name,
//| uvm_component parent,
//| int min_size=1,
//| int max_size=1)
class uvm_blocking_put_port #(type T=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_PORT_COMMON(`UVM_TLM_BLOCKING_PUT_MASK,"uvm_blocking_put_port")
`UVM_BLOCKING_PUT_IMP (this.m_if, T, t)
endclass
class uvm_nonblocking_put_port #(type T=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_PORT_COMMON(`UVM_TLM_NONBLOCKING_PUT_MASK,"uvm_nonblocking_put_port")
`UVM_NONBLOCKING_PUT_IMP (this.m_if, T, t)
endclass
class uvm_put_port #(type T=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_PORT_COMMON(`UVM_TLM_PUT_MASK,"uvm_put_port")
`UVM_PUT_IMP (this.m_if, T, t)
endclass
class uvm_blocking_get_port #(type T=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_PORT_COMMON(`UVM_TLM_BLOCKING_GET_MASK,"uvm_blocking_get_port")
`UVM_BLOCKING_GET_IMP (this.m_if, T, t)
endclass
class uvm_nonblocking_get_port #(type T=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_PORT_COMMON(`UVM_TLM_NONBLOCKING_GET_MASK,"uvm_nonblocking_get_port")
`UVM_NONBLOCKING_GET_IMP (this.m_if, T, t)
endclass
class uvm_get_port #(type T=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_PORT_COMMON(`UVM_TLM_GET_MASK,"uvm_get_port")
`UVM_GET_IMP (this.m_if, T, t)
endclass
class uvm_blocking_peek_port #(type T=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_PORT_COMMON(`UVM_TLM_BLOCKING_PEEK_MASK,"uvm_blocking_peek_port")
`UVM_BLOCKING_PEEK_IMP (this.m_if, T, t)
endclass
class uvm_nonblocking_peek_port #(type T=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_PORT_COMMON(`UVM_TLM_NONBLOCKING_PEEK_MASK,"uvm_nonblocking_peek_port")
`UVM_NONBLOCKING_PEEK_IMP (this.m_if, T, t)
endclass
class uvm_peek_port #(type T=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_PORT_COMMON(`UVM_TLM_PEEK_MASK,"uvm_peek_port")
`UVM_PEEK_IMP (this.m_if, T, t)
endclass
class uvm_blocking_get_peek_port #(type T=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_PORT_COMMON(`UVM_TLM_BLOCKING_GET_PEEK_MASK,"uvm_blocking_get_peek_port")
`UVM_BLOCKING_GET_PEEK_IMP (this.m_if, T, t)
endclass
class uvm_nonblocking_get_peek_port #(type T=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_PORT_COMMON(`UVM_TLM_NONBLOCKING_GET_PEEK_MASK,"uvm_nonblocking_get_peek_port")
`UVM_NONBLOCKING_GET_PEEK_IMP (this.m_if, T, t)
endclass
class uvm_get_peek_port #(type T=int)
extends uvm_port_base #(uvm_tlm_if_base #(T,T));
`UVM_PORT_COMMON(`UVM_TLM_GET_PEEK_MASK,"uvm_get_peek_port")
`UVM_GET_PEEK_IMP (this.m_if, T, t)
endclass
//------------------------------------------------------------------------------
//
// Class: uvm_*_port #(REQ,RSP)
//
// These bidirectional ports are instantiated by components that ~require~,
// or ~use~, the associated interface to convey transactions. A port can
// be connected to any compatible port, export, or imp port. Unless its
// ~min_size~ is 0, a port ~must~ be connected to at least one implementation
// of its assocated interface.
//
// The asterisk in ~uvm_*_port~ is any of the following
//
//| blocking_transport
//| nonblocking_transport
//| transport
//|
//| blocking_master
//| nonblocking_master
//| master
//|
//| blocking_slave
//| nonblocking_slave
//| slave
//
// Ports are connected to interface implementations directly via
// <uvm_*_imp #(REQ,RSP,IMP,REQ_IMP,RSP_IMP)> ports or indirectly via
// hierarchical connections to <uvm_*_port #(REQ,RSP)> and
// <uvm_*_export #(REQ,RSP)> ports.
//
// Type parameters
//
// REQ - The type of request transaction to be communicated by the export
//
// RSP - The type of response transaction to be communicated by the export
//
//------------------------------------------------------------------------------
// Function: new
//
// The ~name~ and ~parent~ are the standard <uvm_component> constructor arguments.
// The ~min_size~ and ~max_size~ specify the minimum and maximum number of
// interfaces that must have been supplied to this port by the end of elaboration.
//
// function new (string name,
// uvm_component parent,
// int min_size=1,
// int max_size=1)
class uvm_blocking_master_port #(type REQ=int, type RSP=REQ)
extends uvm_port_base #(uvm_tlm_if_base #(REQ, RSP));
`UVM_PORT_COMMON(`UVM_TLM_BLOCKING_MASTER_MASK,"uvm_blocking_master_port")
`UVM_BLOCKING_PUT_IMP (this.m_if, REQ, t)
`UVM_BLOCKING_GET_PEEK_IMP (this.m_if, RSP, t)
endclass
class uvm_nonblocking_master_port #(type REQ=int, type RSP=REQ)
extends uvm_port_base #(uvm_tlm_if_base #(REQ, RSP));
`UVM_PORT_COMMON(`UVM_TLM_NONBLOCKING_MASTER_MASK,"uvm_nonblocking_master_port")
`UVM_NONBLOCKING_PUT_IMP (this.m_if, REQ, t)
`UVM_NONBLOCKING_GET_PEEK_IMP (this.m_if, RSP, t)
endclass
class uvm_master_port #(type REQ=int, type RSP=REQ)
extends uvm_port_base #(uvm_tlm_if_base #(REQ, RSP));
`UVM_PORT_COMMON(`UVM_TLM_MASTER_MASK,"uvm_master_port")
`UVM_PUT_IMP (this.m_if, REQ, t)
`UVM_GET_PEEK_IMP (this.m_if, RSP, t)
endclass
class uvm_blocking_slave_port #(type REQ=int, type RSP=REQ)
extends uvm_port_base #(uvm_tlm_if_base #(RSP, REQ));
`UVM_PORT_COMMON(`UVM_TLM_BLOCKING_SLAVE_MASK,"uvm_blocking_slave_port")
`UVM_BLOCKING_PUT_IMP (this.m_if, RSP, t)
`UVM_BLOCKING_GET_PEEK_IMP (this.m_if, REQ, t)
endclass
class uvm_nonblocking_slave_port #(type REQ=int, type RSP=REQ)
extends uvm_port_base #(uvm_tlm_if_base #(RSP, REQ));
`UVM_PORT_COMMON(`UVM_TLM_NONBLOCKING_SLAVE_MASK,"uvm_nonblocking_slave_port")
`UVM_NONBLOCKING_PUT_IMP (this.m_if, RSP, t)
`UVM_NONBLOCKING_GET_PEEK_IMP (this.m_if, REQ, t)
endclass
class uvm_slave_port #(type REQ=int, type RSP=REQ)
extends uvm_port_base #(uvm_tlm_if_base #(RSP, REQ));
`UVM_PORT_COMMON(`UVM_TLM_SLAVE_MASK,"uvm_slave_port")
`UVM_PUT_IMP (this.m_if, RSP, t)
`UVM_GET_PEEK_IMP (this.m_if, REQ, t)
endclass
class uvm_blocking_transport_port #(type REQ=int, type RSP=REQ)
extends uvm_port_base #(uvm_tlm_if_base #(REQ, RSP));
`UVM_PORT_COMMON(`UVM_TLM_BLOCKING_TRANSPORT_MASK,"uvm_blocking_transport_port")
`UVM_BLOCKING_TRANSPORT_IMP (this.m_if, REQ, RSP, req, rsp)
endclass
class uvm_nonblocking_transport_port #(type REQ=int, type RSP=REQ)
extends uvm_port_base #(uvm_tlm_if_base #(REQ, RSP));
`UVM_PORT_COMMON(`UVM_TLM_NONBLOCKING_TRANSPORT_MASK,"uvm_nonblocking_transport_port")
`UVM_NONBLOCKING_TRANSPORT_IMP (this.m_if, REQ, RSP, req, rsp)
endclass
class uvm_transport_port #(type REQ=int, type RSP=REQ)
extends uvm_port_base #(uvm_tlm_if_base #(REQ, RSP));
`UVM_PORT_COMMON(`UVM_TLM_TRANSPORT_MASK,"uvm_transport_port")
`UVM_TRANSPORT_IMP (this.m_if, REQ, RSP, req, rsp)
endclass

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//
//-----------------------------------------------------------------------------
// Copyright 2007-2011 Mentor Graphics Corporation
// Copyright 2007-2010 Cadence Design Systems, Inc.
// Copyright 2010 Synopsys, Inc.
// All Rights Reserved Worldwide
//
// Licensed under the Apache License, Version 2.0 (the
// "License"); you may not use this file except in
// compliance with the License. You may obtain a copy of
// the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in
// writing, software distributed under the License is
// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See
// the License for the specific language governing
// permissions and limitations under the License.
//-----------------------------------------------------------------------------
//-----------------------------------------------------------------------------
// Title: Sequence Item Pull Ports
//
// This section defines the port, export, and imp port classes for
// communicating sequence items between <uvm_sequencer #(REQ,RSP)> and
// <uvm_driver #(REQ,RSP)>.
//-----------------------------------------------------------------------------
//-----------------------------------------------------------------------------
//
// Class: uvm_seq_item_pull_port #(REQ,RSP)
//
// UVM provides a port, export, and imp connector for use in sequencer-driver
// communication. All have standard port connector constructors, except that
// uvm_seq_item_pull_port's default min_size argument is 0; it can be left
// unconnected.
//
//-----------------------------------------------------------------------------
class uvm_seq_item_pull_port #(type REQ=int, type RSP=REQ)
extends uvm_port_base #(uvm_sqr_if_base #(REQ, RSP));
`UVM_SEQ_PORT(`UVM_SEQ_ITEM_PULL_MASK, "uvm_seq_item_pull_port")
`UVM_SEQ_ITEM_PULL_IMP(this.m_if, REQ, RSP, t, t)
bit print_enabled;
endclass
//-----------------------------------------------------------------------------
//
// Class: uvm_seq_item_pull_export #(REQ,RSP)
//
// This export type is used in sequencer-driver communication. It has the
// standard constructor for exports.
//
//-----------------------------------------------------------------------------
class uvm_seq_item_pull_export #(type REQ=int, type RSP=REQ)
extends uvm_port_base #(uvm_sqr_if_base #(REQ, RSP));
`UVM_EXPORT_COMMON(`UVM_SEQ_ITEM_PULL_MASK, "uvm_seq_item_pull_export")
`UVM_SEQ_ITEM_PULL_IMP(this.m_if, REQ, RSP, t, t)
endclass
//-----------------------------------------------------------------------------
//
// Class: uvm_seq_item_pull_imp #(REQ,RSP,IMP)
//
// This imp type is used in sequencer-driver communication. It has the
// standard constructor for imp-type ports.
//
//-----------------------------------------------------------------------------
class uvm_seq_item_pull_imp #(type REQ=int, type RSP=REQ, type IMP=int)
extends uvm_port_base #(uvm_sqr_if_base #(REQ, RSP));
// Function: new
`UVM_IMP_COMMON(`UVM_SEQ_ITEM_PULL_MASK, "uvm_seq_item_pull_imp",IMP)
`UVM_SEQ_ITEM_PULL_IMP(m_imp, REQ, RSP, t, t)
endclass

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//
//------------------------------------------------------------------------------
// Copyright 2007-2011 Mentor Graphics Corporation
// Copyright 2007-2010 Cadence Design Systems, Inc.
// Copyright 2010 Synopsys, Inc.
// All Rights Reserved Worldwide
//
// Licensed under the Apache License, Version 2.0 (the
// "License"); you may not use this file except in
// compliance with the License. You may obtain a copy of
// the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in
// writing, software distributed under the License is
// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See
// the License for the specific language governing
// permissions and limitations under the License.
//------------------------------------------------------------------------------
`define UVM_SEQ_ITEM_TASK_ERROR "Sequencer interface task not implemented"
`define UVM_SEQ_ITEM_FUNCTION_ERROR "Sequencer interface function not implemented"
//------------------------------------------------------------------------------
//
// CLASS: uvm_sqr_if_base #(REQ,RSP)
//
// This class defines an interface for sequence drivers to communicate with
// sequencers. The driver requires the interface via a port, and the sequencer
// implements it and provides it via an export.
//
//------------------------------------------------------------------------------
virtual class uvm_sqr_if_base #(type T1=uvm_object, T2=T1);
// Task: get_next_item
//
// Retrieves the next available item from a sequence. The call will block
// until an item is available. The following steps occur on this call:
//
// 1 - Arbitrate among requesting, unlocked, relevant sequences - choose the
// highest priority sequence based on the current sequencer arbitration
// mode. If no sequence is available, wait for a requesting unlocked
// relevant sequence, then re-arbitrate.
// 2 - The chosen sequence will return from wait_for_grant
// 3 - The chosen sequence <uvm_sequence_base::pre_do> is called
// 4 - The chosen sequence item is randomized
// 5 - The chosen sequence <uvm_sequence_base::post_do> is called
// 6 - Return with a reference to the item
//
// Once <get_next_item> is called, <item_done> must be called to indicate the
// completion of the request to the sequencer. This will remove the request
// item from the sequencer fifo.
virtual task get_next_item(output T1 t);
uvm_report_error("get_next_item", `UVM_SEQ_ITEM_TASK_ERROR, UVM_NONE);
endtask
// Task: try_next_item
//
// Retrieves the next available item from a sequence if one is available.
// Otherwise, the function returns immediately with request set to null.
// The following steps occur on this call:
//
// 1 - Arbitrate among requesting, unlocked, relevant sequences - choose the
// highest priority sequence based on the current sequencer arbitration
// mode. If no sequence is available, return null.
// 2 - The chosen sequence will return from wait_for_grant
// 3 - The chosen sequence <uvm_sequence_base::pre_do> is called
// 4 - The chosen sequence item is randomized
// 5 - The chosen sequence <uvm_sequence_base::post_do> is called
// 6 - Return with a reference to the item
//
// Once <try_next_item> is called, <item_done> must be called to indicate the
// completion of the request to the sequencer. This will remove the request
// item from the sequencer fifo.
virtual task try_next_item(output T1 t);
uvm_report_error("try_next_item", `UVM_SEQ_ITEM_TASK_ERROR, UVM_NONE);
endtask
// Function: item_done
//
// Indicates that the request is completed to the sequencer. Any
// <uvm_sequence_base::wait_for_item_done>
// calls made by a sequence for this item will return.
//
// The current item is removed from the sequencer fifo.
//
// If a response item is provided, then it will be sent back to the requesting
// sequence. The response item must have it's sequence ID and transaction ID
// set correctly, using the <uvm_sequence_item::set_id_info> method:
//
//| rsp.set_id_info(req);
//
// Before <item_done> is called, any calls to peek will retrieve the current
// item that was obtained by <get_next_item>. After <item_done> is called, peek
// will cause the sequencer to arbitrate for a new item.
virtual function void item_done(input T2 t = null);
uvm_report_error("item_done", `UVM_SEQ_ITEM_FUNCTION_ERROR, UVM_NONE);
endfunction
// Task: wait_for_sequences
//
// Waits for a sequence to have a new item available. The default
// implementation in the sequencer delays
// <uvm_sequencer_base::pound_zero_count> delta cycles.
// User-derived sequencers
// may override its <wait_for_sequences> implementation to perform some other
// application-specific implementation.
virtual task wait_for_sequences();
uvm_report_error("wait_for_sequences", `UVM_SEQ_ITEM_TASK_ERROR, UVM_NONE);
endtask
// Function: has_do_available
//
// Indicates whether a sequence item is available for immediate processing.
// Implementations should return 1 if an item is available, 0 otherwise.
virtual function bit has_do_available();
uvm_report_error("has_do_available", `UVM_SEQ_ITEM_FUNCTION_ERROR, UVM_NONE);
return 0;
endfunction
//-----------------------
// uvm_tlm_blocking_slave_if
//-----------------------
// Task: get
//
// Retrieves the next available item from a sequence. The call blocks until
// an item is available. The following steps occur on this call:
//
// 1 - Arbitrate among requesting, unlocked, relevant sequences - choose the
// highest priority sequence based on the current sequencer arbitration
// mode. If no sequence is available, wait for a requesting unlocked
// relevant sequence, then re-arbitrate.
// 2 - The chosen sequence will return from <uvm_sequence_base::wait_for_grant>
// 3 - The chosen sequence <uvm_sequence_base::pre_do> is called
// 4 - The chosen sequence item is randomized
// 5 - The chosen sequence <uvm_sequence_base::post_do> is called
// 6 - Indicate <item_done> to the sequencer
// 7 - Return with a reference to the item
//
// When get is called, <item_done> may not be called. A new item can be
// obtained by calling get again, or a response may be sent using either
// <put>, or uvm_driver::rsp_port.write().
virtual task get(output T1 t);
uvm_report_error("get", `UVM_SEQ_ITEM_TASK_ERROR, UVM_NONE);
endtask
// Task: peek
//
// Returns the current request item if one is in the sequencer fifo. If no
// item is in the fifo, then the call will block until the sequencer has a new
// request. The following steps will occur if the sequencer fifo is empty:
//
// 1 - Arbitrate among requesting, unlocked, relevant sequences - choose the
// highest priority sequence based on the current sequencer arbitration mode.
// If no sequence is available, wait for a requesting unlocked relevant
// sequence, then re-arbitrate.
//
// 2 - The chosen sequence will return from <uvm_sequence_base::wait_for_grant>
// 3 - The chosen sequence <uvm_sequence_base::pre_do> is called
// 4 - The chosen sequence item is randomized
// 5 - The chosen sequence <uvm_sequence_base::post_do> is called
//
// Once a request item has been retrieved and is in the sequencer fifo,
// subsequent calls to peek will return the same item. The item will stay in
// the fifo until either get or <item_done> is called.
virtual task peek(output T1 t);
uvm_report_error("peek", `UVM_SEQ_ITEM_TASK_ERROR, UVM_NONE);
endtask
// Task: put
//
// Sends a response back to the sequence that issued the request. Before the
// response is put, it must have it's sequence ID and transaction ID set to
// match the request. This can be done using the
// <uvm_sequence_item::set_id_info> call:
//
// rsp.set_id_info(req);
//
// This task will not block. The response will be put into the
// sequence response queue or it will be sent to the
// sequence response handler.
virtual task put(input T2 t);
uvm_report_error("put", `UVM_SEQ_ITEM_TASK_ERROR, UVM_NONE);
endtask
// Function- put_response
//
// Internal method.
virtual function void put_response(input T2 t);
uvm_report_error("put_response", `UVM_SEQ_ITEM_FUNCTION_ERROR, UVM_NONE);
endfunction
endclass

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//
//----------------------------------------------------------------------
// Copyright 2007-2011 Mentor Graphics Corporation
// Copyright 2007-2010 Cadence Design Systems, Inc.
// Copyright 2010 Synopsys, Inc.
// All Rights Reserved Worldwide
//
// Licensed under the Apache License, Version 2.0 (the
// "License"); you may not use this file except in
// compliance with the License. You may obtain a copy of
// the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in
// writing, software distributed under the License is
// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See
// the License for the specific language governing
// permissions and limitations under the License.
//----------------------------------------------------------------------
`include "tlm1/uvm_tlm_ifs.svh"
`include "tlm1/uvm_sqr_ifs.svh"
`include "base/uvm_port_base.svh"
`include "tlm1/uvm_tlm_imps.svh"
`include "tlm1/uvm_imps.svh"
`include "tlm1/uvm_ports.svh"
`include "tlm1/uvm_exports.svh"
`include "tlm1/uvm_analysis_port.svh"
`include "tlm1/uvm_tlm_fifo_base.svh"
`include "tlm1/uvm_tlm_fifos.svh"
`include "tlm1/uvm_tlm_req_rsp.svh"
`include "tlm1/uvm_sqr_connections.svh"

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//
//------------------------------------------------------------------------------
// Copyright 2007-2011 Mentor Graphics Corporation
// Copyright 2007-2011 Cadence Design Systems, Inc.
// Copyright 2010 Synopsys, Inc.
// All Rights Reserved Worldwide
//
// Licensed under the Apache License, Version 2.0 (the
// "License"); you may not use this file except in
// compliance with the License. You may obtain a copy of
// the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in
// writing, software distributed under the License is
// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See
// the License for the specific language governing
// permissions and limitations under the License.
//------------------------------------------------------------------------------
`define UVM_TLM_FIFO_TASK_ERROR "fifo channel task not implemented"
`define UVM_TLM_FIFO_FUNCTION_ERROR "fifo channel function not implemented"
class uvm_tlm_event;
event trigger;
endclass
//------------------------------------------------------------------------------
//
// CLASS: uvm_tlm_fifo_base #(T)
//
// This class is the base for <uvm_tlm_fifo #(T)>. It defines the TLM exports
// through which all transaction-based FIFO operations occur. It also defines
// default implementations for each inteface method provided by these exports.
//
// The interface methods provided by the <put_export> and the <get_peek_export>
// are defined and described by <uvm_tlm_if_base #(T1,T2)>. See the TLM Overview
// section for a general discussion of TLM interface definition and usage.
//
// Parameter type
//
// T - The type of transactions to be stored by this FIFO.
//
//------------------------------------------------------------------------------
virtual class uvm_tlm_fifo_base #(type T=int) extends uvm_component;
typedef uvm_tlm_fifo_base #(T) this_type;
// Port: put_export
//
// The ~put_export~ provides both the blocking and non-blocking put interface
// methods to any attached port:
//
//| task put (input T t)
//| function bit can_put ()
//| function bit try_put (input T t)
//
// Any ~put~ port variant can connect and send transactions to the FIFO via this
// export, provided the transaction types match. See <uvm_tlm_if_base #(T1,T2)>
// for more information on each of the above interface methods.
uvm_put_imp #(T, this_type) put_export;
// Port: get_peek_export
//
// The ~get_peek_export~ provides all the blocking and non-blocking get and peek
// interface methods:
//
//| task get (output T t)
//| function bit can_get ()
//| function bit try_get (output T t)
//| task peek (output T t)
//| function bit can_peek ()
//| function bit try_peek (output T t)
//
// Any ~get~ or ~peek~ port variant can connect to and retrieve transactions from
// the FIFO via this export, provided the transaction types match. See
// <uvm_tlm_if_base #(T1,T2)> for more information on each of the above interface
// methods.
uvm_get_peek_imp #(T, this_type) get_peek_export;
// Port: put_ap
//
// Transactions passed via ~put~ or ~try_put~ (via any port connected to the
// <put_export>) are sent out this port via its ~write~ method.
//
//| function void write (T t)
//
// All connected analysis exports and imps will receive put transactions.
// See <uvm_tlm_if_base #(T1,T2)> for more information on the ~write~ interface
// method.
uvm_analysis_port #(T) put_ap;
// Port: get_ap
//
// Transactions passed via ~get~, ~try_get~, ~peek~, or ~try_peek~ (via any
// port connected to the <get_peek_export>) are sent out this port via its
// ~write~ method.
//
//| function void write (T t)
//
// All connected analysis exports and imps will receive get transactions.
// See <uvm_tlm_if_base #(T1,T2)> for more information on the ~write~ method.
uvm_analysis_port #(T) get_ap;
// The following are aliases to the above put_export.
uvm_put_imp #(T, this_type) blocking_put_export;
uvm_put_imp #(T, this_type) nonblocking_put_export;
// The following are all aliased to the above get_peek_export, which provides
// the superset of these interfaces.
uvm_get_peek_imp #(T, this_type) blocking_get_export;
uvm_get_peek_imp #(T, this_type) nonblocking_get_export;
uvm_get_peek_imp #(T, this_type) get_export;
uvm_get_peek_imp #(T, this_type) blocking_peek_export;
uvm_get_peek_imp #(T, this_type) nonblocking_peek_export;
uvm_get_peek_imp #(T, this_type) peek_export;
uvm_get_peek_imp #(T, this_type) blocking_get_peek_export;
uvm_get_peek_imp #(T, this_type) nonblocking_get_peek_export;
// Function: new
//
// The ~name~ and ~parent~ are the normal uvm_component constructor arguments.
// The ~parent~ should be null if the uvm_tlm_fifo is going to be used in a
// statically elaborated construct (e.g., a module). The ~size~ indicates the
// maximum size of the FIFO. A value of zero indicates no upper bound.
function new(string name, uvm_component parent = null);
super.new(name, parent);
put_export = new("put_export", this);
blocking_put_export = put_export;
nonblocking_put_export = put_export;
get_peek_export = new("get_peek_export", this);
blocking_get_peek_export = get_peek_export;
nonblocking_get_peek_export = get_peek_export;
blocking_get_export = get_peek_export;
nonblocking_get_export = get_peek_export;
get_export = get_peek_export;
blocking_peek_export = get_peek_export;
nonblocking_peek_export = get_peek_export;
peek_export = get_peek_export;
put_ap = new("put_ap", this);
get_ap = new("get_ap", this);
endfunction
//turn off auto config
function void build_phase(uvm_phase phase);
build(); //for backward compat, won't cause auto-config
return;
endfunction
virtual function void flush();
uvm_report_error("flush", `UVM_TLM_FIFO_FUNCTION_ERROR, UVM_NONE);
endfunction
virtual function int size();
uvm_report_error("size", `UVM_TLM_FIFO_FUNCTION_ERROR, UVM_NONE);
return 0;
endfunction
virtual task put(T t);
uvm_report_error("put", `UVM_TLM_FIFO_TASK_ERROR, UVM_NONE);
endtask
virtual task get(output T t);
uvm_report_error("get", `UVM_TLM_FIFO_TASK_ERROR, UVM_NONE);
endtask
virtual task peek(output T t);
uvm_report_error("peek", `UVM_TLM_FIFO_TASK_ERROR, UVM_NONE);
endtask
virtual function bit try_put(T t);
uvm_report_error("try_put", `UVM_TLM_FIFO_FUNCTION_ERROR, UVM_NONE);
return 0;
endfunction
virtual function bit try_get(output T t);
uvm_report_error("try_get", `UVM_TLM_FIFO_FUNCTION_ERROR, UVM_NONE);
return 0;
endfunction
virtual function bit try_peek(output T t);
uvm_report_error("try_peek", `UVM_TLM_FIFO_FUNCTION_ERROR, UVM_NONE);
return 0;
endfunction
virtual function bit can_put();
uvm_report_error("can_put", `UVM_TLM_FIFO_FUNCTION_ERROR, UVM_NONE);
return 0;
endfunction
virtual function bit can_get();
uvm_report_error("can_get", `UVM_TLM_FIFO_FUNCTION_ERROR, UVM_NONE);
return 0;
endfunction
virtual function bit can_peek();
uvm_report_error("can_peek", `UVM_TLM_FIFO_FUNCTION_ERROR, UVM_NONE);
return 0;
endfunction
virtual function uvm_tlm_event ok_to_put();
uvm_report_error("ok_to_put", `UVM_TLM_FIFO_FUNCTION_ERROR, UVM_NONE);
return null;
endfunction
virtual function uvm_tlm_event ok_to_get();
uvm_report_error("ok_to_get", `UVM_TLM_FIFO_FUNCTION_ERROR, UVM_NONE);
return null;
endfunction
virtual function uvm_tlm_event ok_to_peek();
uvm_report_error("ok_to_peek", `UVM_TLM_FIFO_FUNCTION_ERROR, UVM_NONE);
return null;
endfunction
virtual function bit is_empty();
uvm_report_error("is_empty", `UVM_TLM_FIFO_FUNCTION_ERROR, UVM_NONE);
return 0;
endfunction
virtual function bit is_full();
uvm_report_error("is_full", `UVM_TLM_FIFO_FUNCTION_ERROR);
return 0;
endfunction
virtual function int used();
uvm_report_error("used", `UVM_TLM_FIFO_FUNCTION_ERROR, UVM_NONE);
return 0;
endfunction
endclass

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//
//------------------------------------------------------------------------------
// Copyright 2007-2011 Mentor Graphics Corporation
// Copyright 2007-2010 Cadence Design Systems, Inc.
// Copyright 2010 Synopsys, Inc.
// All Rights Reserved Worldwide
//
// Licensed under the Apache License, Version 2.0 (the
// "License"); you may not use this file except in
// compliance with the License. You may obtain a copy of
// the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in
// writing, software distributed under the License is
// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See
// the License for the specific language governing
// permissions and limitations under the License.
//------------------------------------------------------------------------------
typedef class uvm_tlm_event;
//------------------------------------------------------------------------------
//
// Title: TLM FIFO Classes
//
// This section defines TLM-based FIFO classes.
//
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
//
// Class: uvm_tlm_fifo
//
// This class provides storage of transactions between two independently running
// processes. Transactions are put into the FIFO via the ~put_export~.
// transactions are fetched from the FIFO in the order they arrived via the
// ~get_peek_export~. The ~put_export~ and ~get_peek_export~ are inherited from
// the <uvm_tlm_fifo_base #(T)> super class, and the interface methods provided by
// these exports are defined by the <uvm_tlm_if_base #(T1,T2)> class.
//
//------------------------------------------------------------------------------
class uvm_tlm_fifo #(type T=int) extends uvm_tlm_fifo_base #(T);
const static string type_name = "uvm_tlm_fifo #(T)";
local mailbox #( T ) m;
local int m_size;
protected int m_pending_blocked_gets;
// Function: new
//
// The ~name~ and ~parent~ are the normal uvm_component constructor arguments.
// The ~parent~ should be null if the <uvm_tlm_fifo> is going to be used in a
// statically elaborated construct (e.g., a module). The ~size~ indicates the
// maximum size of the FIFO; a value of zero indicates no upper bound.
function new(string name, uvm_component parent = null, int size = 1);
super.new(name, parent);
m = new( size );
m_size = size;
endfunction
virtual function string get_type_name();
return type_name;
endfunction
// Function: size
//
// Returns the capacity of the FIFO-- that is, the number of entries
// the FIFO is capable of holding. A return value of 0 indicates the
// FIFO capacity has no limit.
virtual function int size();
return m_size;
endfunction
// Function: used
//
// Returns the number of entries put into the FIFO.
virtual function int used();
return m.num();
endfunction
// Function: is_empty
//
// Returns 1 when there are no entries in the FIFO, 0 otherwise.
virtual function bit is_empty();
return (m.num() == 0);
endfunction
// Function: is_full
//
// Returns 1 when the number of entries in the FIFO is equal to its <size>,
// 0 otherwise.
virtual function bit is_full();
return (m_size != 0) && (m.num() == m_size);
endfunction
virtual task put( input T t );
m.put( t );
put_ap.write( t );
endtask
virtual task get( output T t );
m_pending_blocked_gets++;
m.get( t );
m_pending_blocked_gets--;
get_ap.write( t );
endtask
virtual task peek( output T t );
m.peek( t );
endtask
virtual function bit try_get( output T t );
if( !m.try_get( t ) ) begin
return 0;
end
get_ap.write( t );
return 1;
endfunction
virtual function bit try_peek( output T t );
if( !m.try_peek( t ) ) begin
return 0;
end
return 1;
endfunction
virtual function bit try_put( input T t );
if( !m.try_put( t ) ) begin
return 0;
end
put_ap.write( t );
return 1;
endfunction
virtual function bit can_put();
return m_size == 0 || m.num() < m_size;
endfunction
virtual function bit can_get();
return m.num() > 0 && m_pending_blocked_gets == 0;
endfunction
virtual function bit can_peek();
return m.num() > 0;
endfunction
// Function: flush
//
// Removes all entries from the FIFO, after which <used> returns 0
// and <is_empty> returns 1.
virtual function void flush();
T t;
bit r;
r = 1;
while( r ) r = try_get( t ) ;
if( m.num() > 0 && m_pending_blocked_gets != 0 ) begin
uvm_report_error("flush failed" ,
"there are blocked gets preventing the flush", UVM_NONE);
end
endfunction
endclass
//------------------------------------------------------------------------------
//
// Class: uvm_tlm_analysis_fifo
//
// An analysis_fifo is a <uvm_tlm_fifo> with an unbounded size and a write interface.
// It can be used any place a <uvm_analysis_imp> is used. Typical usage is
// as a buffer between an <uvm_analysis_port> in an initiator component
// and TLM1 target component.
//
//------------------------------------------------------------------------------
class uvm_tlm_analysis_fifo #(type T = int) extends uvm_tlm_fifo #(T);
// Port: analysis_export #(T)
//
// The analysis_export provides the write method to all connected analysis
// ports and parent exports:
//
//| function void write (T t)
//
// Access via ports bound to this export is the normal mechanism for writing
// to an analysis FIFO.
// See write method of <uvm_tlm_if_base #(T1,T2)> for more information.
uvm_analysis_imp #(T, uvm_tlm_analysis_fifo #(T)) analysis_export;
// Function: new
//
// This is the standard uvm_component constructor. ~name~ is the local name
// of this component. The ~parent~ should be left unspecified when this
// component is instantiated in statically elaborated constructs and must be
// specified when this component is a child of another UVM component.
function new(string name , uvm_component parent = null);
super.new(name, parent, 0); // analysis fifo must be unbounded
analysis_export = new("analysis_export", this);
endfunction
const static string type_name = "uvm_tlm_analysis_fifo #(T)";
virtual function string get_type_name();
return type_name;
endfunction
function void write(input T t);
void'(this.try_put(t)); // unbounded => must succeed
endfunction
endclass

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//
//-----------------------------------------------------------------------------
// Copyright 2007-2011 Mentor Graphics Corporation
// Copyright 2007-2010 Cadence Design Systems, Inc.
// Copyright 2010 Synopsys, Inc.
// All Rights Reserved Worldwide
//
// Licensed under the Apache License, Version 2.0 (the
// "License"); you may not use this file except in
// compliance with the License. You may obtain a copy of
// the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in
// writing, software distributed under the License is
// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See
// the License for the specific language governing
// permissions and limitations under the License.
//-----------------------------------------------------------------------------
`define UVM_TASK_ERROR "TLM interface task not implemented"
`define UVM_FUNCTION_ERROR "TLM interface function not implemented"
//-----------------------------------------------------------------------------
//
// CLASS: uvm_tlm_if_base #(T1,T2)
//
// This class declares all of the methods of the TLM API.
//
// Various subsets of these methods are combined to form primitive TLM
// interfaces, which are then paired in various ways to form more abstract
// "combination" TLM interfaces. Components that require a particular interface
// use ports to convey that requirement. Components that provide a particular
// interface use exports to convey its availability.
//
// Communication between components is established by connecting ports to
// compatible exports, much like connecting module signal-level output ports to
// compatible input ports. The difference is that UVM ports and exports bind
// interfaces (groups of methods), not signals and wires. The methods of the
// interfaces so bound pass data as whole transactions (e.g. objects).
// The set of primitve and combination TLM interfaces afford many choices for
// designing components that communicate at the transaction level.
//
//-----------------------------------------------------------------------------
virtual class uvm_tlm_if_base #(type T1=int, type T2=int);
// Group: Blocking put
// Task: put
//
// Sends a user-defined transaction of type T.
//
// Components implementing the put method will block the calling thread if
// it cannot immediately accept delivery of the transaction.
virtual task put( input T1 t );
uvm_report_error("put", `UVM_TASK_ERROR, UVM_NONE);
endtask
// Group: Blocking get
// Task: get
//
// Provides a new transaction of type T.
//
// The calling thread is blocked if the requested transaction cannot be
// provided immediately. The new transaction is returned in the provided
// output argument.
//
// The implementation of get must regard the transaction as consumed.
// Subsequent calls to get must return a different transaction instance.
virtual task get( output T2 t );
uvm_report_error("get", `UVM_TASK_ERROR, UVM_NONE);
endtask
// Group: Blocking peek
// Task: peek
//
// Obtain a new transaction without consuming it.
//
// If a transaction is available, then it is written to the provided output
// argument. If a transaction is not available, then the calling thread is
// blocked until one is available.
//
// The returned transaction is not consumed. A subsequent peek or get will
// return the same transaction.
virtual task peek( output T2 t );
uvm_report_error("peek", `UVM_TASK_ERROR, UVM_NONE);
endtask
// Group: Non-blocking put
// Function: try_put
//
// Sends a transaction of type T, if possible.
//
// If the component is ready to accept the transaction argument, then it does
// so and returns 1, otherwise it returns 0.
virtual function bit try_put( input T1 t );
uvm_report_error("try_put", `UVM_FUNCTION_ERROR, UVM_NONE);
return 0;
endfunction
// Function: can_put
//
// Returns 1 if the component is ready to accept the transaction; 0 otherwise.
virtual function bit can_put();
uvm_report_error("can_put", `UVM_FUNCTION_ERROR, UVM_NONE);
return 0;
endfunction
// Group: Non-blocking get
// Function: try_get
//
// Provides a new transaction of type T.
//
// If a transaction is immediately available, then it is written to the output
// argument and 1 is returned. Otherwise, the output argument is not modified
// and 0 is returned.
virtual function bit try_get( output T2 t );
uvm_report_error("try_get", `UVM_FUNCTION_ERROR, UVM_NONE);
return 0;
endfunction
// Function: can_get
//
// Returns 1 if a new transaction can be provided immediately upon request,
// 0 otherwise.
virtual function bit can_get();
uvm_report_error("can_get", `UVM_FUNCTION_ERROR, UVM_NONE);
return 0;
endfunction
// Group: Non-blocking peek
// Function: try_peek
//
// Provides a new transaction without consuming it.
//
// If available, a transaction is written to the output argument and 1 is
// returned. A subsequent peek or get will return the same transaction. If a
// transaction is not available, then the argument is unmodified and 0 is
// returned.
virtual function bit try_peek( output T2 t );
uvm_report_error("try_peek", `UVM_FUNCTION_ERROR, UVM_NONE);
return 0;
endfunction
// Function: can_peek
//
// Returns 1 if a new transaction is available; 0 otherwise.
virtual function bit can_peek();
uvm_report_error("can_ppeek", `UVM_FUNCTION_ERROR, UVM_NONE);
return 0;
endfunction
// Group: Blocking transport
// Task: transport
//
// Executes the given request and returns the response in the given output
// argument. The calling thread may block until the operation is complete.
virtual task transport( input T1 req , output T2 rsp );
uvm_report_error("transport", `UVM_TASK_ERROR, UVM_NONE);
endtask
// Group: Non-blocking transport
// Task: nb_transport
//
// Executes the given request and returns the response in the given output
// argument. Completion of this operation must occur without blocking.
//
// If for any reason the operation could not be executed immediately, then
// a 0 must be returned; otherwise 1.
virtual function bit nb_transport(input T1 req, output T2 rsp);
uvm_report_error("nb_transport", `UVM_FUNCTION_ERROR, UVM_NONE);
return 0;
endfunction
// Group: Analysis
// Function: write
//
// Broadcasts a user-defined transaction of type T to any number of listeners.
// The operation must complete without blocking.
virtual function void write( input T1 t );
uvm_report_error("write", `UVM_FUNCTION_ERROR, UVM_NONE);
endfunction
endclass

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//
//----------------------------------------------------------------------
// Copyright 2007-2011 Mentor Graphics Corporation
// Copyright 2007-2010 Cadence Design Systems, Inc.
// Copyright 2010 Synopsys, Inc.
// All Rights Reserved Worldwide
//
// Licensed under the Apache License, Version 2.0 (the
// "License"); you may not use this file except in
// compliance with the License. You may obtain a copy of
// the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in
// writing, software distributed under the License is
// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See
// the License for the specific language governing
// permissions and limitations under the License.
//----------------------------------------------------------------------
`ifndef UVM_TLM_IMPS_SVH
`define UVM_TLM_IMPS_SVH
//
// These IMP macros define implementations of the uvm_*_port, uvm_*_export,
// and uvm_*_imp ports.
//
//---------------------------------------------------------------
// Macros for implementations of UVM ports and exports
/*
`define UVM_BLOCKING_PUT_IMP(imp, TYPE, arg) \
task put (TYPE arg); \
if (m_imp_list.size()) == 0) begin \
uvm_report_error("Port Not Bound","Blocking put to unbound port will wait forever.", UVM_NONE);
@imp;
end
if (bcast_mode) begin \
if (m_imp_list.size()) > 1) \
fork
begin
foreach (m_imp_list[index]) \
fork \
automatic int i = index; \
begin m_imp_list[i].put(arg); end \
join_none \
wait fork; \
end \
join \
else \
m_imp_list[0].put(arg); \
end \
else \
if (imp != null) \
imp.put(arg); \
endtask \
`define UVM_NONBLOCKING_PUT_IMP(imp, TYPE, arg) \
function bit try_put(input TYPE arg); \
if (bcast_mode) begin \
if (!can_put()) \
return 0; \
foreach (m_imp_list[index]) \
void'(m_imp_list[index].try_put(arg)); \
return 1; \
end \
if (imp != null) \
return imp.try_put(arg)); \
return 0; \
endfunction \
\
function bit can_put(); \
if (bcast_mode) begin \
if (m_imp_list.size()) begin \
foreach (m_imp_list[index]) begin \
if (!m_imp_list[index].can_put() \
return 0; \
end \
return 1; \
end \
return 0; \
end \
if (imp != null) \
return imp.can_put(); \
return 0; \
endfunction
*/
//-----------------------------------------------------------------------
// TLM imp implementations
`define UVM_BLOCKING_PUT_IMP(imp, TYPE, arg) \
task put (TYPE arg); \
imp.put(arg); \
endtask
`define UVM_NONBLOCKING_PUT_IMP(imp, TYPE, arg) \
function bit try_put (TYPE arg); \
return imp.try_put(arg); \
endfunction \
function bit can_put(); \
return imp.can_put(); \
endfunction
`define UVM_BLOCKING_GET_IMP(imp, TYPE, arg) \
task get (output TYPE arg); \
imp.get(arg); \
endtask
`define UVM_NONBLOCKING_GET_IMP(imp, TYPE, arg) \
function bit try_get (output TYPE arg); \
return imp.try_get(arg); \
endfunction \
function bit can_get(); \
return imp.can_get(); \
endfunction
`define UVM_BLOCKING_PEEK_IMP(imp, TYPE, arg) \
task peek (output TYPE arg); \
imp.peek(arg); \
endtask
`define UVM_NONBLOCKING_PEEK_IMP(imp, TYPE, arg) \
function bit try_peek (output TYPE arg); \
return imp.try_peek(arg); \
endfunction \
function bit can_peek(); \
return imp.can_peek(); \
endfunction
`define UVM_BLOCKING_TRANSPORT_IMP(imp, REQ, RSP, req_arg, rsp_arg) \
task transport (REQ req_arg, output RSP rsp_arg); \
imp.transport(req_arg, rsp_arg); \
endtask
`define UVM_NONBLOCKING_TRANSPORT_IMP(imp, REQ, RSP, req_arg, rsp_arg) \
function bit nb_transport (REQ req_arg, output RSP rsp_arg); \
return imp.nb_transport(req_arg, rsp_arg); \
endfunction
`define UVM_PUT_IMP(imp, TYPE, arg) \
`UVM_BLOCKING_PUT_IMP(imp, TYPE, arg) \
`UVM_NONBLOCKING_PUT_IMP(imp, TYPE, arg)
`define UVM_GET_IMP(imp, TYPE, arg) \
`UVM_BLOCKING_GET_IMP(imp, TYPE, arg) \
`UVM_NONBLOCKING_GET_IMP(imp, TYPE, arg)
`define UVM_PEEK_IMP(imp, TYPE, arg) \
`UVM_BLOCKING_PEEK_IMP(imp, TYPE, arg) \
`UVM_NONBLOCKING_PEEK_IMP(imp, TYPE, arg)
`define UVM_BLOCKING_GET_PEEK_IMP(imp, TYPE, arg) \
`UVM_BLOCKING_GET_IMP(imp, TYPE, arg) \
`UVM_BLOCKING_PEEK_IMP(imp, TYPE, arg)
`define UVM_NONBLOCKING_GET_PEEK_IMP(imp, TYPE, arg) \
`UVM_NONBLOCKING_GET_IMP(imp, TYPE, arg) \
`UVM_NONBLOCKING_PEEK_IMP(imp, TYPE, arg)
`define UVM_GET_PEEK_IMP(imp, TYPE, arg) \
`UVM_BLOCKING_GET_PEEK_IMP(imp, TYPE, arg) \
`UVM_NONBLOCKING_GET_PEEK_IMP(imp, TYPE, arg)
`define UVM_TRANSPORT_IMP(imp, REQ, RSP, req_arg, rsp_arg) \
`UVM_BLOCKING_TRANSPORT_IMP(imp, REQ, RSP, req_arg, rsp_arg) \
`UVM_NONBLOCKING_TRANSPORT_IMP(imp, REQ, RSP, req_arg, rsp_arg)
`define UVM_TLM_GET_TYPE_NAME(NAME) \
virtual function string get_type_name(); \
return NAME; \
endfunction
`define UVM_PORT_COMMON(MASK,TYPE_NAME) \
function new (string name, uvm_component parent, \
int min_size=1, int max_size=1); \
super.new (name, parent, UVM_PORT, min_size, max_size); \
m_if_mask = MASK; \
endfunction \
`UVM_TLM_GET_TYPE_NAME(TYPE_NAME)
`define UVM_SEQ_PORT(MASK,TYPE_NAME) \
function new (string name, uvm_component parent, \
int min_size=0, int max_size=1); \
super.new (name, parent, UVM_PORT, min_size, max_size); \
m_if_mask = MASK; \
endfunction \
`UVM_TLM_GET_TYPE_NAME(TYPE_NAME)
`define UVM_EXPORT_COMMON(MASK,TYPE_NAME) \
function new (string name, uvm_component parent, \
int min_size=1, int max_size=1); \
super.new (name, parent, UVM_EXPORT, min_size, max_size); \
m_if_mask = MASK; \
endfunction \
`UVM_TLM_GET_TYPE_NAME(TYPE_NAME)
`define UVM_IMP_COMMON(MASK,TYPE_NAME,IMP) \
local IMP m_imp; \
function new (string name, IMP imp); \
super.new (name, imp, UVM_IMPLEMENTATION, 1, 1); \
m_imp = imp; \
m_if_mask = MASK; \
endfunction \
`UVM_TLM_GET_TYPE_NAME(TYPE_NAME)
`define UVM_MS_IMP_COMMON(MASK,TYPE_NAME) \
local this_req_type m_req_imp; \
local this_rsp_type m_rsp_imp; \
function new (string name, this_imp_type imp, \
this_req_type req_imp = null, this_rsp_type rsp_imp = null); \
super.new (name, imp, UVM_IMPLEMENTATION, 1, 1); \
if(req_imp==null) $cast(req_imp, imp); \
if(rsp_imp==null) $cast(rsp_imp, imp); \
m_req_imp = req_imp; \
m_rsp_imp = rsp_imp; \
m_if_mask = MASK; \
endfunction \
`UVM_TLM_GET_TYPE_NAME(TYPE_NAME)
`endif

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//
//----------------------------------------------------------------------
// Copyright 2007-2011 Mentor Graphics Corporation
// Copyright 2007-2011 Cadence Design Systems, Inc.
// Copyright 2010 Synopsys, Inc.
// All Rights Reserved Worldwide
//
// Licensed under the Apache License, Version 2.0 (the
// "License"); you may not use this file except in
// compliance with the License. You may obtain a copy of
// the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in
// writing, software distributed under the License is
// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See
// the License for the specific language governing
// permissions and limitations under the License.
//----------------------------------------------------------------------
//------------------------------------------------------------------------------
// Title: TLM Channel Classes
//------------------------------------------------------------------------------
// This section defines built-in TLM channel classes.
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
//
// CLASS: uvm_tlm_req_rsp_channel #(REQ,RSP)
//
// The uvm_tlm_req_rsp_channel contains a request FIFO of type ~REQ~ and a response
// FIFO of type ~RSP~. These FIFOs can be of any size. This channel is
// particularly useful for dealing with pipelined protocols where the request
// and response are not tightly coupled.
//
// Type parameters:
//
// REQ - Type of the request transactions conveyed by this channel.
// RSP - Type of the reponse transactions conveyed by this channel.
//
//------------------------------------------------------------------------------
class uvm_tlm_req_rsp_channel #(type REQ=int, type RSP=REQ) extends uvm_component;
typedef uvm_tlm_req_rsp_channel #(REQ, RSP) this_type;
const static string type_name = "uvm_tlm_req_rsp_channel #(REQ,RSP)";
// Port: put_request_export
//
// The put_export provides both the blocking and non-blocking put interface
// methods to the request FIFO:
//
//| task put (input T t);
//| function bit can_put ();
//| function bit try_put (input T t);
//
// Any put port variant can connect and send transactions to the request FIFO
// via this export, provided the transaction types match.
uvm_put_export #(REQ) put_request_export;
// Port: get_peek_response_export
//
// The get_peek_response_export provides all the blocking and non-blocking get
// and peek interface methods to the response FIFO:
//
//| task get (output T t);
//| function bit can_get ();
//| function bit try_get (output T t);
//| task peek (output T t);
//| function bit can_peek ();
//| function bit try_peek (output T t);
//
// Any get or peek port variant can connect to and retrieve transactions from
// the response FIFO via this export, provided the transaction types match.
uvm_get_peek_export #(RSP) get_peek_response_export;
// Port: get_peek_request_export
//
// The get_peek_export provides all the blocking and non-blocking get and peek
// interface methods to the response FIFO:
//
//| task get (output T t);
//| function bit can_get ();
//| function bit try_get (output T t);
//| task peek (output T t);
//| function bit can_peek ();
//| function bit try_peek (output T t);
//
// Any get or peek port variant can connect to and retrieve transactions from
// the response FIFO via this export, provided the transaction types match.
uvm_get_peek_export #(REQ) get_peek_request_export;
// Port: put_response_export
//
// The put_export provides both the blocking and non-blocking put interface
// methods to the response FIFO:
//
//| task put (input T t);
//| function bit can_put ();
//| function bit try_put (input T t);
//
// Any put port variant can connect and send transactions to the response FIFO
// via this export, provided the transaction types match.
uvm_put_export #(RSP) put_response_export;
// Port: request_ap
//
// Transactions passed via ~put~ or ~try_put~ (via any port connected to the
// put_request_export) are sent out this port via its write method.
//
//| function void write (T t);
//
// All connected analysis exports and imps will receive these transactions.
uvm_analysis_port #(REQ) request_ap;
// Port: response_ap
//
// Transactions passed via ~put~ or ~try_put~ (via any port connected to the
// put_response_export) are sent out this port via its write method.
//
//| function void write (T t);
//
// All connected analysis exports and imps will receive these transactions.
uvm_analysis_port #(RSP) response_ap;
// Port: master_export
//
// Exports a single interface that allows a master to put requests and get or
// peek responses. It is a combination of the put_request_export and
// get_peek_response_export.
uvm_master_imp #(REQ, RSP, this_type, uvm_tlm_fifo #(REQ), uvm_tlm_fifo #(RSP)) master_export;
// Port: slave_export
//
// Exports a single interface that allows a slave to get or peek requests and
// to put responses. It is a combination of the get_peek_request_export
// and put_response_export.
uvm_slave_imp #(REQ, RSP, this_type, uvm_tlm_fifo #(REQ), uvm_tlm_fifo #(RSP)) slave_export;
// port aliases for backward compatibility
uvm_put_export #(REQ) blocking_put_request_export,
nonblocking_put_request_export;
uvm_get_peek_export #(REQ) get_request_export,
blocking_get_request_export,
nonblocking_get_request_export,
peek_request_export,
blocking_peek_request_export,
nonblocking_peek_request_export,
blocking_get_peek_request_export,
nonblocking_get_peek_request_export;
uvm_put_export #(RSP) blocking_put_response_export,
nonblocking_put_response_export;
uvm_get_peek_export #(RSP) get_response_export,
blocking_get_response_export,
nonblocking_get_response_export,
peek_response_export,
blocking_peek_response_export,
nonblocking_peek_response_export,
blocking_get_peek_response_export,
nonblocking_get_peek_response_export;
uvm_master_imp #(REQ, RSP, this_type, uvm_tlm_fifo #(REQ), uvm_tlm_fifo #(RSP))
blocking_master_export,
nonblocking_master_export;
uvm_slave_imp #(REQ, RSP, this_type, uvm_tlm_fifo #(REQ), uvm_tlm_fifo #(RSP))
blocking_slave_export,
nonblocking_slave_export;
// internal fifos
protected uvm_tlm_fifo #(REQ) m_request_fifo;
protected uvm_tlm_fifo #(RSP) m_response_fifo;
// Function: new
//
// The ~name~ and ~parent~ are the standard <uvm_component> constructor arguments.
// The ~parent~ must be null if this component is defined within a static
// component such as a module, program block, or interface. The last two
// arguments specify the request and response FIFO sizes, which have default
// values of 1.
function new (string name, uvm_component parent=null,
int request_fifo_size=1,
int response_fifo_size=1);
super.new (name, parent);
m_request_fifo = new ("request_fifo", this, request_fifo_size);
m_response_fifo = new ("response_fifo", this, response_fifo_size);
request_ap = new ("request_ap", this);
response_ap = new ("response_ap", this);
put_request_export = new ("put_request_export", this);
get_peek_request_export = new ("get_peek_request_export", this);
put_response_export = new ("put_response_export", this);
get_peek_response_export = new ("get_peek_response_export", this);
master_export = new ("master_export", this, m_request_fifo, m_response_fifo);
slave_export = new ("slave_export", this, m_request_fifo, m_response_fifo);
create_aliased_exports();
set_report_id_action_hier(s_connection_error_id, UVM_NO_ACTION);
endfunction
virtual function void connect_phase(uvm_phase phase);
put_request_export.connect (m_request_fifo.put_export);
get_peek_request_export.connect (m_request_fifo.get_peek_export);
m_request_fifo.put_ap.connect (request_ap);
put_response_export.connect (m_response_fifo.put_export);
get_peek_response_export.connect (m_response_fifo.get_peek_export);
m_response_fifo.put_ap.connect (response_ap);
endfunction
function void create_aliased_exports();
// request
blocking_put_request_export = put_request_export;
nonblocking_put_request_export = put_request_export;
get_request_export = get_peek_request_export;
blocking_get_request_export = get_peek_request_export;
nonblocking_get_request_export = get_peek_request_export;
peek_request_export = get_peek_request_export;
blocking_peek_request_export = get_peek_request_export;
nonblocking_peek_request_export = get_peek_request_export;
blocking_get_peek_request_export = get_peek_request_export;
nonblocking_get_peek_request_export = get_peek_request_export;
// response
blocking_put_response_export = put_response_export;
nonblocking_put_response_export = put_response_export;
get_response_export = get_peek_response_export;
blocking_get_response_export = get_peek_response_export;
nonblocking_get_response_export = get_peek_response_export;
peek_response_export = get_peek_response_export;
blocking_peek_response_export = get_peek_response_export;
nonblocking_peek_response_export = get_peek_response_export;
blocking_get_peek_response_export = get_peek_response_export;
nonblocking_get_peek_response_export = get_peek_response_export;
// master/slave
blocking_master_export = master_export;
nonblocking_master_export = master_export;
blocking_slave_export = slave_export;
nonblocking_slave_export = slave_export;
endfunction
// get_type_name
// -------------
function string get_type_name ();
return type_name;
endfunction
// create
// ------
function uvm_object create (string name="");
this_type v;
v=new(name);
return v;
endfunction
endclass
//------------------------------------------------------------------------------
//
// CLASS: uvm_tlm_transport_channel #(REQ,RSP)
//
// A uvm_tlm_transport_channel is a <uvm_tlm_req_rsp_channel #(REQ,RSP)> that implements
// the transport interface. It is useful when modeling a non-pipelined bus at
// the transaction level. Because the requests and responses have a tightly
// coupled one-to-one relationship, the request and response FIFO sizes are both
// set to one.
//
//------------------------------------------------------------------------------
class uvm_tlm_transport_channel #(type REQ=int, type RSP=REQ)
extends uvm_tlm_req_rsp_channel #(REQ, RSP);
typedef uvm_tlm_transport_channel #(REQ, RSP) this_type;
// Port: transport_export
//
// The put_export provides both the blocking and non-blocking transport
// interface methods to the response FIFO:
//
//| task transport(REQ request, output RSP response);
//| function bit nb_transport(REQ request, output RSP response);
//
// Any transport port variant can connect to and send requests and retrieve
// responses via this export, provided the transaction types match. Upon
// return, the response argument carries the response to the request.
uvm_transport_imp #(REQ, RSP, this_type) transport_export;
// Function: new
//
// The ~name~ and ~parent~ are the standard <uvm_component> constructor
// arguments. The ~parent~ must be null if this component is defined within a
// statically elaborated construct such as a module, program block, or
// interface.
function new (string name, uvm_component parent=null);
super.new(name, parent, 1, 1);
transport_export = new("transport_export", this);
endfunction
task transport (REQ request, output RSP response );
this.m_request_fifo.put( request );
this.m_response_fifo.get( response );
endtask
function bit nb_transport (REQ req, output RSP rsp );
if(this.m_request_fifo.try_put(req))
return this.m_response_fifo.try_get(rsp);
else
return 0;
endfunction
endclass

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//
//----------------------------------------------------------------------
// Copyright 2007-2011 Mentor Graphics Corporation
// Copyright 2007-2011 Cadence Design Systems, Inc.
// Copyright 2010-2011 Synopsys, Inc.
// All Rights Reserved Worldwide
//
// Licensed under the Apache License, Version 2.0 (the
// "License"); you may not use this file except in
// compliance with the License. You may obtain a copy of
// the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in
// writing, software distributed under the License is
// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See
// the License for the specific language governing
// permissions and limitations under the License.
//----------------------------------------------------------------------
`ifndef UVM_MACROS_SVH
`define UVM_MACROS_SVH
//
// Any vendor specific defines go here.
//
`ifdef MODEL_TECH
`ifndef QUESTA
`define QUESTA
`endif
`endif
`ifndef QUESTA
`define uvm_typename(X) $typename(X)
`else
`define uvm_typename(X) $typename(X,39)
`endif
`ifdef VCS
`ifndef UVM_DISABLE_RESOURCE_CONVERTER
//UVM_USE_RESOURCE_CONVERTER enables UVM-1.1d to print resources output to match uvm-1.1c. VCS2012.09-SP1 or later does not need resource_converter object, disbale by using +define+UVM_DISABLE_RESOURCE_CONVERTER
`define UVM_USE_RESOURCE_CONVERTER
`endif
`endif
`ifdef INCA
`define UVM_USE_PROCESS_CONTAINER
`endif
//
// Deprecation Control Macros
//
`ifdef UVM_NO_DEPRECATED
`define UVM_OBJECT_MUST_HAVE_CONSTRUCTOR
`endif
`define uvm_delay(TIME) #(TIME);
`include "macros/uvm_version_defines.svh"
`include "macros/uvm_message_defines.svh"
`include "macros/uvm_phase_defines.svh"
`include "macros/uvm_object_defines.svh"
`include "macros/uvm_printer_defines.svh"
`include "macros/uvm_tlm_defines.svh"
`include "macros/uvm_sequence_defines.svh"
`include "macros/uvm_callback_defines.svh"
`include "macros/uvm_reg_defines.svh"
`include "macros/uvm_deprecated_defines.svh"
`endif

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// Accellera Standard V2.8.1 Open Verification Library (OVL).
// Accellera Copyright (c) 2005-2014. All rights reserved.
OVL V2.0 VHDL Implementation User Guide
--------------------------------------------
Introduction
------------
This is the first release of the VHDL implementation of the OVL and it contains the
top 10 most frequently used checkers from the library. The checkers are the new
ovl_<checker> versions of the components that include the enable and fire ports.
The VHDL components are compatible with the Verilog versions of the components.
The only difference between them is the that VHDL fully implements the fire
outputs and is synthesizable. The VHDL components also have an additional
generic called controls, that allows global configuration of the library.
The VHDL implementation's components support both std_logic/std_logic_vector and
std_ulogic/std_ulogic_vector port types.
Directory Structure
-------------------
The std_ovl directory contains the VHDL entity declarations (ovl_<checker>.vhd),
types/constants package (std_ovl.vhd), procedures package (std_ovl_procs.vhd),
ulogic wrapper components package (std_ovl_u.vhd) and internal gating
components (std_ovl_clock_gating.vhd and std_ovl_reset_gating.vhd). The
std_ovl/vhdl93 directory contains the architecture bodies for the entities
(ovl_<checker>_rtl.vhd). The std_ovl/vhdl93/legacy directory contains the
std_ovl.vhd file. This file was included in the OVL V1.8 release and allowed
VHDL designs to instantiate the Verilog assert_<checker> components
implementations. It is now deprecated and will be removed in the next release.
Tools Supported
---------------
This release has been tested on the following simulators:
Mentor Graphics ModelSim-VHDL
Cadence NC-VHDL
This release has been tested on the following synthesis tools:
Synopsys DesignCompiler
Synplicity SynplifyPro
Compilation Library - accellera_ovl_vhdl
----------------------------------------
Accellera mandates that the VHDL OVL implementation is only analyzed into the
logical library name, accellera_ovl_vhdl. We have standardized this name for
portability reasons. It is also expected that, in the future EDA vendors will provide
optimized versions of the library for their tools that uses this library name.
The library only needs to be compiled once because it can be configured via the
use of the ovl_ctrl_record (see below). The library must be compiled using your
EDA tool's VHDL-93 option.
Usage
-----
The VHDL implementation of the OVL has all the configuration features of the
Verilog implementation that are provided by the macros. For example it is
possible to globally enable or disable X-checking on all checker instances.
This is accomplished via the use of the ovl_ctrl_record (defined in std_ovl.vhd)
value assigned to the controls generic on every checker instance. It is highly
recommended that a ovl_ctrl_record constant is defined in design specific work
package to be used on all checker instances. This allows the configuration of
the components to be controlled in one place. The following is an example of how
to use the ovl_ctrl_record constant:
library accellera_ovl_vhdl;
use accellera_ovl_vhdl.std_ovl.all;
package proj_pkg is
-- OVL configuration
constant ovl_proj_controls : ovl_ctrl_record := (
xcheck_ctrl => OVL_ON,
implicit_xcheck_ctrl => OVL_ON,
init_msg_ctrl => OVL_ON,
init_count_ctrl => OVL_ON,
assert_ctrl => OVL_ON,
cover_ctrl => OVL_OFF,
global_reset_ctrl => OVL_OFF,
finish_ctrl => OVL_ON,
coverage_level_default => OVL_COVER_DEFAULT,
clock_edge_default => OVL_CLOCK_EDGE_DEFAULT,
reset_polarity_default => OVL_RESET_POLARITY_DEFAULT,
gating_type_default => OVL_GATING_TYPE_DEFAULT,
max_report_error => 10,
max_report_cover_point => 15,
runtime_after_fatal => "350 ns "
);
end package proj_pkg;
library accellera_ovl_vhdl;
use accellera_ovl_vhdl.std_ovl.all;
architecture rtl of design is
begin
<rtl code>
ovl_gen : if (ovl_proj_controls.assert_ctrl = OVL_ON) generate
<user ovl signal conditioning code>
ovl_u1 : ovl_next
generic map (
msg => "Check 1",
num_cks => 1,
check_overlapping => OVL_CHK_OVERLAP_OFF,
check_missing_start => OVL_OFF,
coverage_level => OVL_COVER_CORNER,
controls => ovl_proj_controls
)
port map (
clock => clk,
reset => reset_n,
start_event , => start_event_1
test_expr => test_1,
enable => enable_1,
fire => fire_1
);
ovl_u2 : ovl_next
generic map (
msg => "Check 2",
num_cks => 2,
check_overlapping => OVL_CHK_OVERLAP_ON,
check_missing_start => OVL_ON,
coverage_level => OVL_COVER_ALL,
severity_level => OVL_FATAL,
controls => ovl_proj_controls
)
port map (
clock => clk,
reset => reset_n,
start_event => start_event_2,
test_expr => test_2,
enable => enable_2,
fire => fire_2
);
end generate ovl_gen;
end architecture rtl;
The ovl_<checker> component versions use std_logic/std_logic_vector port types
and the ovl_<checker>_u versions of the components use
std_ulogic/std_ulogic_vector port types. The std_ovl_u.vhd file contains the
std_ovl_u package declaration that declares the std_<checker>_u components and
the entity declarations and architecture bodies for them. To use these components
the following is required in the instantiating code:
library accellera_ovl_vhdl;
use accellera_ovl_vhdl.std_ovl.all;
use accellera_ovl_vhdl.std_ovl_u.all; -- optional - not needed if using direct instantiation
The following shows how to print the total number of OVL checkers initialized
in a simulation. The init_msg_ctrl and init_count_ctrl items must both be set
to OVL_ON:
library accellera_ovl_vhdl;
use accellera_ovl_vhdl.std_ovl.all;
use accellera_ovl_vhdl.std_ovl_procs.all;
use work.proj_pkg.all;
entity tb is
end entity tb;
architecture tb of tb is
...
begin
...
test : process
begin
wait for 0 ns;
ovl_print_init_count_proc(ovl_proj_controls);
...
end process test;
end architecture tb;
Synthesis
---------
The VHDL implementation is synthesizable a apart from the path_name attribute
in the architectures and the std_ovl_procs.vhd file. To resolve this the
architecture bodies must be modified to set the path sting constant to "" and
the std_ovl_procs_syn.vhd file in the std_ovl directory must be used. The path
strings can be modified using the following c-shell script:
setenv OVL <ovl install path>/std_ovl
setenv syn_dir `pwd`
cd ${OVL}/vhdl93
foreach checker (ovl_*_rtl.vhd)
sed s/rtl\'path_name/\"\"/ $checker > .${syn_dir}/$checker
end
cd $syn_dir

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===================================================================================
Accellera Standard V2.8.1 Open Verification Library (OVL).
Accellera Copyright (c) 2005-2014. All rights reserved.
===================================================================================
----------------------------------------------------------------------------
CONTENTS (last updated: Monday March 20, 2014)
========
- About this file (release notes for Open Verification Library)
- Version 2
- V2.8.1 (20 Mar 2014)
- V2.8 (02 Dec 2013)
- V2.7 (28 Nov 2013)
- V2.4 (24 Mar 2009)
- V2.3 (06 Jun 2008)
- V2.2 (04 Feb 2008)
- V2.1 (29 Sep 2007)
- V2.0 (01 Jun 2007)
- V2.0-Beta (15 Apr 2007)
- Version 1
- V1.8 (18 Oct 2006)
- V1.7a (01 Aug 2006)
- V1.7 (21 Jul 2006)
- V1.6 (16 Mar 2006)
- V1.5 (13 Dec 2005)
- V1.1b (25 Aug 2005)
- V1.1a (23 Aug 2005)
- V1.1 (27 Jul 2005)
- V1.0 (31 May 2005)
----------------------------------------------------------------------------
===================================================================================
INDEX: About this file (release notes for Open Verification Library)
=====
These notes describe the changes made to the Accellera Standard OVL. Changes
made to the LRM are indicated with change bars in the PDF version. For BUGS FIXED,
see the Mantis bug tracking system (http://www.eda.org/mantis; user: guest
password: guest).
===================================================================================
===================================================================================
INDEX: - V2.8.1 (20 March 2014)
===================================================================================
MAIN CHANGES
~~~~~~~~~~~~
fire_xcheck/fire_2state were not being reset in ovl_zero_one_hot_logic.sv. This
has been fixed.
===================================================================================
INDEX: - V2.8 (02 December 2013)
===================================================================================
MAIN CHANGES
~~~~~~~~~~~~
Pass action blocks were used to reset 'fire' bits which introduced possible race
conditions. We have removed this now. A fire bit is set to '1' in the cycle in
which the violation occurs and reset to '0' in the next cycle by a clocked process.
===================================================================================
INDEX: - V2.7 (28 November 2013)
===================================================================================
MAIN CHANGES
~~~~~~~~~~~~
LRM is updated to clearly document what is synthesizable
ENHANCEMENTS & FIXES
~~~~~~~~~~~~~~~~~~~~
4539 Removed label in "std_ovl/sva05/ovl_bits_logic.sv"
4538 Label changed to logical name in "std_ovl/sva05/assert_next_logic.sv"
4537 Added missing architecture for assert_width_assume entity in "std_ovl/psl05/assert_width_psl_logic.vhd"
4536 Added Missing wrappers in std_ovl/std_ovl_u_components.vhd
4535 Removed redundant file std_ovl/assert_change.vhd
4421 Corrected port mapping In file 'assert_next_psl_logic.vhd' for 'check' signal.
4426 Corrected the cover_test_expr_change cover when there is no reset in previous clock.
4496 Corrected the min/max prameter value for various checkers.
4437 Corrected the use of ovl_change instead of assert_change in vhdl version of PSL checkers.
===================================================================================
INDEX: - V2.4 (24 March 2009)
===================================================================================
MAIN CHANGES
~~~~~~~~~~~~
LRM is updated to clearly document what is synthesizable
ENHANCEMENTS & FIXES
~~~~~~~~~~~~~~~~~~~~
2586 Use of $countones outside property/endproperty
2461 OVL_RUNTIME_AFTER_FATAL is not redefinition friendly
2426 OVL_ARBITER: Problem with always @(*) and the same "for loop" index variable
used in two loops
2407 ovl_req_requires_logic.sv : Bad cycle bound error
2259 ovl_fifo_logic.v: Problem with OVL_FIFO_VALUE_P
2257 ovl_multiport_fifo_logic.sv has both blocking and non-blocking assignments to
the same register
2207 OVL_VALID_ID: lack of cover reporting task for most covers in this checker.
2138 OVL_MUTEX: cover_mutex_bitmap is the only cover which dont have any task
enable in action block.
1662 property_type inconsistent for async OVLs --> doc update and might have some
update in implementation for better error message.
1658 assert_quiescent_state - shift the antecedent by one clock tick
===================================================================================
INDEX: - V2.3 (06 Jun 2008)
===================================================================================
MAIN CHANGES
~~~~~~~~~~~~
The fire output was implemented in 10 SVA checkers.
ENHANCEMENTS & FIXES
~~~~~~~~~~~~~~~~~~~~
2369 VHDL wrappers required for Verilog checkers
2366 never_unknown: incorrectly turned off by OVL_IMPLICIT_XCHECK_OFF
2296 assert_increment: incorrect coverage
2258 ovl_arbiter_logic.sv: Problem with register assignments inside for loop
2174 ovl_arbiter: Problem with always @(*) and for loop index variables
2134 win_unchange: test_expr X-check fixed
2077 ovl_never_unknown: SVA vs PSL cover inconsitency
2076 ovl_no_overflow: Different results for PSL and SVA version of checker
2408: ovl_memory_sync : Need of lower or user selectable auto_bin_max limit
===================================================================================
INDEX: - V2.2 (04 Feb 2008)
===================================================================================
DOC CHANGES
~~~~~~~~~~~
2180 ovl_reg_loaded: Corrected data sheet to use <dest_expr> instead of
<test_expr>.
2104 ovl_code_distance: minor typo in description
2098 ovl_bits: LRM incorrectly states that max=0 to switch off max checking
2084 ovl_quick_ref.pdf is same as assert_quick_ref.pdf in 2.1 release
ENHANCEMENTS & FIXES
~~~~~~~~~~~~~~~~~~~~
2261 ovl_proposition (SVA): Fixed bug introduced during the last fix (2224)
2224 SVA versions of ovl_proposition and ovl_never_unknown_async: Fixed
checkers to properly recognize <property_type>.
2208 ovl_valid_id (SVA): Fixed A_OVL_VALID_ID_XZ_ISSUED_SIG_P message.
2203 ovl_cover_t task: Increased input size to support all OVL messages.
2179 ovl_no_contention (SVA): Fixed cover_quiet_time_equal_to_max_quiet
message.
2177 ovl_no_contention (SVA): Fixed checker bug related to incorrect operator
precedence.
2166 ovl_bits (SVA): Added check for max > min if max > 0.
2079 SVA & PSL versions of ovl_never and ovl_always_on_edge: improved checker
performance.
2078 SVA versions of ovl_delta, ovl_never_unknown, ovl_one_cold, ovl_one_hot,
ovl_range and ovl_zero_one_hot. Fixed checkers to check whether reset in
previous cycle was inactive.
===================================================================================
INDEX: - V2.1 (29 Sep 2007)
===================================================================================
DIRECTORY CHANGES
~~~~~~~~~~~~~~~~~
2040 Two directories were renamed:
- "sva31a" -> "sva05" (as SVA is IEEE 1800 2005)
- "psl11" -> "psl05" (as PSL is IEEE 1850 2005)
DOC CHANGES
~~~~~~~~~~~
1961 Corner case behaviour clarified for RESET_ON_NEW_START
(frame, time, unchange/change)
1960 Timing diagrams fixed for time/unchange, and updated the change-history.
1959 Added pre-Accellera -> V1.0 to release notes
1873 Links in the HTML data sheets fixed
1872 Updated quick-reference guides
1869 win_unchange: fixed waveforms
1774 assert_never_unknown_async: fixed LRM to show coverage is None
ENHANCEMENTS & FIXES
~~~~~~~~~~~~~~~~~~~~
2048 Fixed typo in ovl_multiport_fifo_logic.sv file
2047 Removed unnecessary use of generate block indexing in ovl_abiter.sv
2046 never_unknown_async: Fixed incorrect firing during reset in PSL
2045 assert_even_parity SVA vs PSL vs Verilog inconsistency
2044 legacy/std_ovl.vhd: removed extra port and fixed typo in name
2038 ovl_fifo: localparam -> parameter (Verilog 95)
2001 Added synthesizable VHDL in vhdl93/syn_src
2000 ovl_arbiter label name fixed
1990 SVA performance improvements for always and always_on_edge
1962 frame: fixed Verilog to avoid false trigger immediately after reset.
1953 frame: removed unsupported parameters/mode
1931 Fixed 3 silent bugs in std_ovl_task (FATAL and IGNORE/2STATE = $finish)
1906 Non-synthesizable code removed via OVL_SYNTHESIS
1904 $countones used in ovl_multiport_fifo, and fixed synthesis issue:
(blocking + non-blocking assigments)
1903 Fixed invalid cycle bounds in ovl_hold_value
1902 Enabled log2 function when OVL_SVA defined
1836 Reomved pullup/pulldown from ovl_valid_id
1810 Stopped error_count incrementing if OVL_IGNORE
1803 X-checking fix in assert_implication vlog95 to match ovl_implication
1773 Added reset to sensitivity list of the assert_never_unknown_async OVL
===================================================================================
INDEX: - V2.0 (01 Jun 2007)
===================================================================================
NEW FEATURES
~~~~~~~~~~~~
Since V2.0-Beta:
- OVL_GATING_OFF to ignore the enable input
- More global defaults e.g. OVL_MSG_DEFAULT
- Per-instance disable of X-checking view two new property_type values
(OVL_ASSERT_2STATE, OVL_ASSUME_2STATE)
CHANGES
~~~~~~~
Since V2.0-Beta:
- enable made a single-bit (not a 1-bit vector)
- fire output driven low in all SVA and PSL files
- ten vlog95/ovl_<checker>_logic.v files with fire output implemented
- removed OVL_EVERYTHING_OFF (now use older OVL_SHARED_CODE)
DOC CHANGES
~~~~~~~~~~~
1778 Timing diagrams document fixed for assert_next overlap check case
1781 Fixed default value of the necessary_condition in the parameters section
of the assert_cycle_sequence.
1782 Fixed various errors in the assert_cycle_sequence checker. The last
timing diagram was not correct. The second error will not be generated.
The descriptions of the values for necessary_condition were improved as
suggested.
ENHANCEMENTS & FIXES
~~~~~~~~~~~~~~~~~~~~
1779 VHDL. ovl_next incorrectly performs overlap check
1790 std_ovl_reset.h: Fixed reset_n so that it's always defined
1795 Fire output driven low in 18 new SVA checkers. Code kept in logic file,
with bugs fixed, but excluded via "ifdef OVL_REVISIT".
1796 Renamed `OVL_SYNTHESIS_OFF to `OVL_SYNTHESIS to avoid confusion.
1798 X-check logic calculated without OVL_ASSERT_ON defined.
Generic fix in std_ovl_defines.h
1811 VHDL: Removed two delta cycle delay from clock
1822 assert_always_logic.sv: aAdded X-filter to the 2state check, so that an
X on test_expr only causes one failure (causes two failures in V1.8)
1839 VHDL. enable port in wrong position
1840 VHDL. Change names of ovl_*_u std_ulogic wrappers to standard ovl_*
1841 VHDL. Added constants to select fire output bits from array
1843 assert_next.vlib, ovl_next.v
Added sanity check when check_overlapping=0 redundant due to num_cks=1
===================================================================================
INDEX: - V2.0-Beta (15 Apr 2007)
===================================================================================
NEW FEATURES
~~~~~~~~~~~~
1. New ovl_<checker> modules for existing 33 assert_<checker> moduless, but with
additional features:
- New input: enable
- New output: fire (tied low in this beta version)
- New param: clock_edge
- New param: reset_polarity
- New param: gating_type
Note that the parameter order in ovl_fifo_index differs to that in the original
assert_fifo_index.
2. VHDL implementation of top 10 of the existing checkers. For details see:
- std_ovl/docs/readme_vhdl.txt
Note that the old std_ovl.vhd file has been replaced, but a copy of the old version
still exists at:
std_ovl/vhdl93/legacy/std_ovl.vhd
3. 18 new ovl_<checker> modules from the 20 new checkers donated by Synopsys
e.g. ovl_mutex.
4. New macros: OVL_FINISH_OFF and OVL_EVERYTHING_OFF
ENHANCEMENTS & FIXES
~~~~~~~~~~~~~~~~~~~~
1663 assert_handshake
Fixed mismatch in SVA and PSL versions of the checker.
1692 assert_cycle_sequence, assert_decrement, assert_delta,
assert_frame, assert_increment
Moved definition of assert_name parameter to the .vlib level.
1694 assert_implication
X/Z check no longer fails when antecedent is X but consequent is 1.
1705 Added `OVL_FINISH_OFF to std_ovl_task.h. Problem was that if a fatal
assertion failure occurs, a subsequent failure goes undetected.
Adding +define+OVL_FINISH_OFF gets simulation to complete
(including the point where the assertion fails).
DOC CHANGES
~~~~~~~~~~~
1670 OVL_COVER_DEFAULT fixed to OVL_COVER_ALL
1691 Discrepancy fixed in the use of check_overlapping in assert_next.
1718 Fixed description of assert_quiescent_state
===================================================================================
INDEX:
INDEX: Version 1
===================================================================================
===================================================================================
INDEX: - V1.8 (18 Oct 2006)
===================================================================================
DOC CHANGES
~~~~~~~~~~~
1661 Updated Chapter 5 (OVL Backward Compatability) to include missing new
functionality descriptions for V1.1, V1.5 and V1.6.
1592 Fixed typo in assert_one_hot cover points description. The
cover_all_one_hots_checked now has the cover point type CORNER (not BASIC).
ENHANCEMENTS & FIXES
~~~~~~~~~~~~~~~~~~~~
1656, assert_frame, assert_handshake, assert_width
1616, Fixed problem with elaboration errors on some simulators related to
1617 badly defined ranges when certain parameters were 0. (SVA)
1640 assert_fifo_index, assert_frame
Made the modeling verilog code in PSL version same as that in SVA version.
1639 assert_time, assert_transition
Fixed typo in property instance name and also fixed typos where some
assume properties were instantiated as asserts. (PSL)
1636 assert_handshake
Removed reporting of X values on req/ack during reset. (Verilog)
1634 assert_decrement, assert_delta, assert_frame, assert_handshake,
assert_increment, assert_one_cold, assert_range, assert_width,
assert_zero_one_hot
Added reset logic to cover functionality for compatibility with formal
tools. (Verilog)
1633 assert_always_on_edge, assert_decrement, assert_increment
Fixed problem with improper assignment of reset. (Verilog)
1630 assert_fifo_index
Fixed problem that caused the library to fail compilation when only
+define+OVL_COVER_ON was specified. (Verilog)
1629 assert_change, assert_frame, assert_time, assert_unchange (Verilog)
assert_fifo_index (Verilog, SVA)
Fixed to use OVL_RESET_SIGNAL.
1622 SVA and PSL. Made the coding structure of 'ifdefs' uniform.
1587 assert_frame. Fixed code to make the checker synthesizable.
1586 assert_handshake (SVA)
Split the property ASSERT_HANDSHAKE_ACK_WITHOUT_REQ_P into two properties:
ASSERT_HANDSHAKE_ACK_WITHOUT_REQ_FIRST_REQ_P
ASSERT_HANDSHAKE_ACK_WITHOUT_REQ_SUBSEQUENT_REQ_P
1578 Named all unnamed blocks inside generates. (SVA)
1577 assert_always_on_edge, assert_handshake, assert_cycle_sequence. (SVA)
Fixed typos where some assume properties were instantiated as asserts.
1569 Fixed uninitialized registers for compatibility with formal/static tools
and linters. (Verilog)
1358 assert_window, assert_win_change, assert_win_unchange. (PSL, SVA)
Modified properties to handle liveness for compatibility with formal tools
1373 Fixed re-surfaced bug again. Modified the checkers to compile without
errors when neither OVL_ASSERT_ON nor OVL_COVER_ON are defined. (SVA)
===================================================================================
INDEX: - V1.7a (01 Aug 2006)
===================================================================================
Fixed typos in assert_one_cold_psl_logic.v, assert_transition_psl_logic.v and
assert_win_change_psl_logic.v
===================================================================================
INDEX: - V1.7 (21 Jul 2006)
===================================================================================
NEW FEATURES
~~~~~~~~~~~~
Implicit X/Z checks Added X/Z checks to most checkers. Changed explicit X/Z checks
to implicit, except for assert_never_-unknown and assert_never_unknown_async.
Added `OVL_IMPLICIT_XCHECK_OFF switch.
Cover point types. Implemented cover point types for checker's cover points:
SANITY, BASIC and CORNER. STATISTIC is reserved for future use. Changed
coverage_level parameter to support bitwise-OR of cover point types:
`OVL_COVER_SANITY, `OVL_COVER_BASIC and `OVL_COVER_CORNER.
DOC CHANGES
~~~~~~~~~~~
1536 Updated "Backwards Compatibility" section and moved the section to a
chapter level to improve visibility.
1535 Fixed waveform for assert_win_unchange example. Added window_open signal
to waveforms for examples in assert_win_change description.
1463 Fixed typo in assert_change description.
1394 Added `OVL_IGNORE to property_type description.
ENHANCEMENTS & FIXES
~~~~~~~~~~~~~~~~~~~~
1525 assert_no_overflow, assert_window, assert_width, assert_quiescent_state
Recoded to correct inconsistencies between SVA and PSL versions.
(PSL and SVA).
1491 Added OVL instance name to error messages for illegal property_type and
severity_level.
1461 assert_handshake
Fixed bug that doesn't reset the max ack counter after a handshake
transaction. (Verilog)
1455 assert_fifo_index, std_ovl_defines.h
Moved the log(n) function from the std_ovl_defines.h file to the PSL
logic file. (PSL)
1454 assert_delta
Fixed bug that misses violations for large values of delta. (Verilog)
1449 assert_never, assert_never_unknown, assert_one_hot, assert_one_cold,
assert_zero_one_hot
Recoded to use onehot, onehot0 and isunknown built-in functions. (PSL)
1423 `OVL_IGNORE: Added support. (Verilog)
1409 assert_next: Fixed false violation.
1408 `OVL_RUNTIME_AFTER_FATAL: Added global variable to set the delay (in time
units) from a fatal error to the end of simulation. Default: 100.
===================================================================================
INDEX: - V1.6 (16 Mar 2006)
===================================================================================
DOC CHANGES
~~~~~~~~~~~
1300 assert_never_unknown_async added.
1365 OVL_COVER_ALL/OVL_COVER_NONE descriptions fixed (reversed).
ENHANCEMENTS & FIXES
~~~~~~~~~~~~~~~~~~~~
1314 vlog95/assert_handshake_logic.v, assert_cycle_sequence.vlib
assert_frame.vlib, assert_handshake.vlib
Changed files from DOS to UNIX format.
1359 assert_transition: Fixed typo in block name. (SVA)
1372 assert_handshake: Modified ack max cycle check to fail properly when
req_drop is 1. (SVA & PSL)
1373 Modified the checkers to compile without errors when neither
OVL_ASSERT_ON nor OVL_COVER_ON are defined. (SVA)
1374 assert_no_transition
Modified checker to work properly with bit vectors (PSL)
1375 assert_always_on_edge
Modified checker to check test_expr properly for edge types OVL_NEGEDGE
and OVL_ANYEDGE. (PSL)
1376 assert_never: Fixed typo in assert_never_assume_vunit. (PSL)
===================================================================================
INDEX: - V1.5 (13 Dec 2005)
===================================================================================
NEW FEATURES
~~~~~~~~~~~~
PSL support Added PSL support (OVL_PSL define).
OVL_IGNORE New property type.
DOC CHANGES
~~~~~~~~~~~
0947 Prepended "cover_" to the cover point names.
ENHANCEMENTS & FIXES
~~~~~~~~~~~~~~~~~~~~
0896 assert_always_on_edge: Checker functionality fixed. (Verilog and SVA)
1081 std_ovl_defines.h: Fixed header file to display correct OVL version.
1082 std_ovl_task.h: Fixed the task ovl_init_msg_t to display the OVL
version as part of OVL note.
1093 assert_fifo_index: Modified checker to make it consistent with Verilog
implementation. (SVA)
1094 assert_never_unknown
Added qualifier input to the cover point test_expr_change. (Verilog & SVA)
1095 assert_cycle_sequence
Fixed record of sequence started by cover point sequence_trigger for
the OVL_TRIGGER_ON_MOST_PIPE condition. (Verilog)
1096 assert_fifo_index
Fixed the checker so that both overflow and underflow checks can never
fire on the same clock edge at any time. (Verilog)
1097 assert_one_hot, assert_one_cold
Fixed the bugs in the cover properties all_one_hots_checked and
all_one_colds_checked. (SVA)
1098 assert_handshake
Added missing check for acknowledge without request condition. (SVA)
1099 assert_handshake
Check for request signal deassert violation is fixed. (Verilog and SVA)
1100 assert_handshake
State machine is corrected to return the checker to the monitoring state
after a violation when acknowledge signal is low. (Verilog)
NOTES
~~~~~
1) PSL Implementation
The PSL properties are implemented inside PSL vunits with Verilog flavor. For
each `OVL-PSL checker type, the following file:
<std_ovl>/psl11/vunits/<checker_type>.psl
contains three vunits: for assert, assume, and cover (one vunit per checker
type). To use a PSL version of a checker type, add the corresponding PSL
file to the compilation file list. In addition, add the 'OVL_PSL' compiler
directive to select the PSL version of the library. For example, to compile
a design using the assert_next checker do the following:
<verilog_compiler> -y <path_to_std_ovl>
+libext+.v +libext+.vlib <testbench_and_design_source_files>
+define+OVL_ASSERT_ON +define+OVL_COVER_ON +define+OVL_PSL
+incdir+<path_to_std_ovl>
-pslfile <path_to_std_ovl>/psl11/vunits/assert_next.psl
2) OVL_INIT_COUNT
An experimental feature in V1.5, is to display a single OVL initialization
count message (rather than one per OVL instance). To enable this:
a) Define the existing initialization macro (OVL_INIT_MSG) and a new one
(OVL_INIT_COUNT); point to the location of the standard OVL:
+define+OVL_INIT_MSG
+define+OVL_INIT_COUNT=<testbench_module_name>.ovl_init_count
+incdir+<path_to_std_ovl>
b) Add the following to your testbench (to instantiate ovl_init_count):
`include "std_ovl_count.h"
===================================================================================
INDEX: - V1.1b (25 Aug 2005)
===================================================================================
DOC CHANGES
~~~~~~~~~~~
Some typos were fixed in the LRM.
===================================================================================
INDEX: - V1.1a (23 Aug 2005)
===================================================================================
ENHANCEMENTS & FIXES
~~~~~~~~~~~~~~~~~~~~
0863 assert_width: Verilog functionality fixed.
DOC CHANGES
~~~~~~~~~~~
assert_next Waveforms were fixed (817).
assert_no_transition Description improved.
assert_width Waveform fixed (862).
===================================================================================
INDEX: - V1.1 (27 Jul 2005)
===================================================================================
NEW FEATURES
~~~~~~~~~~~~
assert_never_unknown
New assertion checker type. Ensures that the value of a specified expression
contains only 0 and 1 bits when a qualifying expression is TRUE.
$STD_OVL_DIR/docs/pdf
New documentation directory. Contains the PDF versions of the LRM.
$STD_OVL_DIR/docs/html
New documentation directory. Contains HTML versions of the assertions data sheets.
NON-COMPATIBLE CHANGES
~~~~~~~~~~~~~~~~~~~~~~
assert_implication The typo in a port name was fixed
(<antecendent_expr> => <antecedent_expr>).
ENHANCEMENTS & FIXES
~~~~~~~~~~~~~~~~~~~~
0768 assert_frame: SVA property was fixed.
0769 Conditional generates without labels. Labels were added to conditional
generates.
0772 assert_never_unknown: Dedicated checker was added to improve unknown
check support.
0792 assert_next: add labels to improve debug. Labels were added.
DOC CHANGES
~~~~~~~~~~~
Typos were corrected.
Many examples were simplified and every example now has a sample waveform.
<action_on_new_start> Checkers with <action_on_new_start> parameters had their
descriptions corrected.
Clarifications. Some paragraphs were unclear and were rewritten.
0761 Examples for OVL_IGNORE_NEW_START, OVL_RESET_ON_NEW_START,
OVL_ERROR_ON_NEW_START were added to assert_change, assert_unchange,
assert_time and assert_frame data sheets.
===================================================================================
INDEX: - V1.0 (31 May 2005)
===================================================================================
SEMNATIC CHANGES SINCE PRE-ACCELLERA OVL (April 2003)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
assert_change: Window can no longer finish before num_cks-1 cycles, even if
test_expr changes earlier.
assert_fifo_index: Functionality no longer depends on property_type parameter.
assert_time: RESET_ON_NEW_START no longer fires if test_expr changes
simultaneously with a new start_event
assert_unchange: RESET_ON_NEW_START no longer fires if test_expr changes
simultaneously with a new start_event
Other changes are documented in the face-to-face meeting minutes of 17/18 May 2005

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@ -0,0 +1,60 @@
`define IVL_UVM_OVL
`define OVL_VERILOG
`define OVL_ASSERT_ON
`define OVL_INIT_MSG
`include "ovl_always.v"
`include "ovl_always_on_edge.v"
`include "ovl_arbiter.v"
`include "ovl_bits.v"
`include "ovl_change.v"
`include "ovl_code_distance.v"
`include "ovl_coverage.v"
`include "ovl_crc.v"
`include "ovl_cycle_sequence.v"
`include "ovl_decrement.v"
`include "ovl_delta.v"
`include "ovl_even_parity.v"
`include "ovl_fifo.v"
`include "ovl_fifo_index.v"
`include "ovl_frame.v"
`include "ovl_handshake.v"
`include "ovl_hold_value.v"
`include "ovl_implication.v"
`include "ovl_increment.v"
`include "ovl_memory_async.v"
`include "ovl_memory_sync.v"
`include "ovl_multiport_fifo.v"
`include "ovl_mutex.v"
`include "ovl_never.v"
`include "ovl_never_unknown.v"
`include "ovl_never_unknown_async.v"
`include "ovl_next.v"
`include "ovl_next_state.v"
`include "ovl_no_contention.v"
`include "ovl_no_overflow.v"
`include "ovl_no_transition.v"
`include "ovl_no_underflow.v"
`include "ovl_odd_parity.v"
`include "ovl_one_cold.v"
`include "ovl_one_hot.v"
`include "ovl_proposition.v"
`include "ovl_quiescent_state.v"
`include "ovl_range.v"
`include "ovl_reg_loaded.v"
`include "ovl_req_ack_unique.v"
`include "ovl_req_requires.v"
`include "ovl_stack.v"
`include "ovl_time.v"
`include "ovl_transition.v"
`include "ovl_unchange.v"
`include "ovl_valid_id.v"
`include "ovl_value.v"
`include "ovl_value_coverage.v"
`include "ovl_width.v"
`include "ovl_win_change.v"
`include "ovl_win_unchange.v"
`include "ovl_window.v"
`include "ovl_xproduct_bit_coverage.v"
`include "ovl_xproduct_value_coverage.v"
`include "ovl_zero_one_hot.v"

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// Accellera Standard V2.8.1 Open Verification Library (OVL).
// Accellera Copyright (c) 2005-2014. All rights reserved.
`include "std_ovl_defines.h"
`module ovl_always (clock, reset, enable, test_expr, fire);
parameter severity_level = `OVL_SEVERITY_DEFAULT;
parameter property_type = `OVL_PROPERTY_DEFAULT;
parameter msg = `OVL_MSG_DEFAULT;
parameter coverage_level = `OVL_COVER_DEFAULT;
parameter clock_edge = `OVL_CLOCK_EDGE_DEFAULT;
parameter reset_polarity = `OVL_RESET_POLARITY_DEFAULT;
parameter gating_type = `OVL_GATING_TYPE_DEFAULT;
input clock, reset, enable;
input test_expr;
output [`OVL_FIRE_WIDTH-1:0] fire;
// Parameters that should not be edited
parameter assert_name = "OVL_ALWAYS";
`include "std_ovl_reset.h"
`include "std_ovl_clock.h"
`include "std_ovl_cover.h"
`include "std_ovl_task.h"
`include "std_ovl_init.h"
`ifdef OVL_VERILOG
`include "./vlog95/ovl_always_logic.v"
`endif
`ifdef OVL_SVA
`include "./sva05/ovl_always_logic.sv"
`endif
`ifdef OVL_PSL
`include "./psl05/assert_always_psl_logic.v"
`else
assign fire = {fire_cover, fire_xcheck, fire_2state};
`endmodule // ovl_always
`endif

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// Accellera Standard V2.8.1 Open Verification Library (OVL).
// Accellera Copyright (c) 2005-2014. All rights reserved.
`include "std_ovl_defines.h"
`module ovl_always_on_edge (clock, reset, enable, sampling_event, test_expr, fire);
parameter severity_level = `OVL_SEVERITY_DEFAULT;
parameter edge_type = `OVL_NOEDGE;
parameter property_type = `OVL_PROPERTY_DEFAULT;
parameter msg = `OVL_MSG_DEFAULT;
parameter coverage_level = `OVL_COVER_DEFAULT;
parameter clock_edge = `OVL_CLOCK_EDGE_DEFAULT;
parameter reset_polarity = `OVL_RESET_POLARITY_DEFAULT;
parameter gating_type = `OVL_GATING_TYPE_DEFAULT;
input clock, reset, enable;
input sampling_event, test_expr;
output [`OVL_FIRE_WIDTH-1:0] fire;
// Parameters that should not be edited
parameter assert_name = "OVL_ALWAYS_ON_EDGE";
`include "std_ovl_reset.h"
`include "std_ovl_clock.h"
`include "std_ovl_cover.h"
`include "std_ovl_task.h"
`include "std_ovl_init.h"
`ifdef OVL_VERILOG
`include "./vlog95/assert_always_on_edge_logic.v"
assign fire = {`OVL_FIRE_WIDTH{1'b0}}; // Tied low in V2.3
`endif
`ifdef OVL_SVA
`include "./sva05/assert_always_on_edge_logic.sv"
assign fire = {`OVL_FIRE_WIDTH{1'b0}}; // Tied low in V2.3
`endif
`ifdef OVL_PSL
assign fire = {`OVL_FIRE_WIDTH{1'b0}}; // Tied low in V2.3
`include "./psl05/assert_always_on_edge_psl_logic.v"
`else
`endmodule // ovl_always_on_edge
`endif

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// Accellera Standard V2.8.1 Open Verification Library (OVL).
// Accellera Copyright (c) 2005-2014. All rights reserved.
`include "std_ovl_defines.h"
`module ovl_arbiter (clock, reset, enable, reqs, priorities, gnts, fire);
parameter severity_level = `OVL_SEVERITY_DEFAULT;
parameter width = 2;
parameter priority_width = 1;
parameter min_cks = 1;
parameter max_cks = 0;
parameter one_cycle_gnt_check = 1;
parameter priority_check = 0;
parameter arbitration_rule = 0;
parameter property_type = `OVL_PROPERTY_DEFAULT;
parameter msg = `OVL_MSG_DEFAULT;
parameter coverage_level = `OVL_COVER_DEFAULT;
parameter clock_edge = `OVL_CLOCK_EDGE_DEFAULT;
parameter reset_polarity = `OVL_RESET_POLARITY_DEFAULT;
parameter gating_type = `OVL_GATING_TYPE_DEFAULT;
input clock, reset, enable;
input [width-1 : 0] reqs;
input [width-1 : 0] gnts;
input [(width*priority_width)-1 : 0] priorities;
output [`OVL_FIRE_WIDTH-1 : 0] fire;
// Parameters that should not be edited
parameter assert_name = "OVL_ARBITER";
`include "std_ovl_reset.h"
`include "std_ovl_clock.h"
`include "std_ovl_cover.h"
`include "std_ovl_task.h"
`include "std_ovl_init.h"
`ifdef OVL_SVA
`include "./sva05/ovl_arbiter_logic.sv"
assign fire = {`OVL_FIRE_WIDTH{1'b0}}; // Tied low in V2.3
`endif
`endmodule // ovl_arbiter

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// Accellera Standard V2.8.1 Open Verification Library (OVL).
// Accellera Copyright (c) 2005-2014. All rights reserved.
`include "std_ovl_defines.h"
`module ovl_bits (clock, reset, enable, test_expr, fire);
parameter severity_level = `OVL_SEVERITY_DEFAULT;
parameter min = 1;
parameter max = 1;
parameter width = 1;
parameter asserted = 1;
parameter property_type = `OVL_PROPERTY_DEFAULT;
parameter msg = `OVL_MSG_DEFAULT;
parameter coverage_level = `OVL_COVER_DEFAULT;
parameter clock_edge = `OVL_CLOCK_EDGE_DEFAULT;
parameter reset_polarity = `OVL_RESET_POLARITY_DEFAULT;
parameter gating_type = `OVL_GATING_TYPE_DEFAULT;
input clock, reset, enable;
input [width-1:0] test_expr;
output [`OVL_FIRE_WIDTH-1 : 0] fire;
// Parameters that should not be edited
parameter assert_name = "OVL_BITS";
`include "std_ovl_reset.h"
`include "std_ovl_clock.h"
`include "std_ovl_cover.h"
`include "std_ovl_task.h"
`include "std_ovl_init.h"
`ifdef OVL_SYNTHESIS
`else
// Sanity Checks
initial begin
if ((max > 0) && (min > max)) begin
ovl_error_t(`OVL_FIRE_2STATE,"Illegal parameter values set where min > max");
end
end
`endif
`ifdef OVL_SVA
`include "./sva05/ovl_bits_logic.sv"
assign fire = {`OVL_FIRE_WIDTH{1'b0}}; // Tied low in V2.3
`endif
`endmodule // ovl_bits

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