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Rewrite the cprop functor to use the functor_t interface.

This commit is contained in:
steve 1999-12-17 06:18:15 +00:00
parent 65ae92859c
commit 4de8ba489d
5 changed files with 144 additions and 117 deletions
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211
cprop.cc
View File

@ -17,12 +17,52 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT)
#ident "$Id: cprop.cc,v 1.3 1999/12/17 03:38:46 steve Exp $"
#ident "$Id: cprop.cc,v 1.4 1999/12/17 06:18:15 steve Exp $"
#endif
# include "netlist.h"
# include "functor.h"
# include <assert.h>
/*
* This local function returns true if all the the possible drivers of
* this link are constant. It will also return true if there are no
* drivers at all.
*/
static bool all_drivers_constant(const NetObj::Link&lnk)
{
for (const NetObj::Link*cur = lnk.next_link()
; *cur != lnk ; cur = cur->next_link()) {
if (cur->get_dir() == NetObj::Link::INPUT)
continue;
if (cur->get_dir() == NetObj::Link::PASSIVE)
continue;
if (! dynamic_cast<const NetConst*>(cur->get_obj()))
return false;
}
return true;
}
/*
* This function returns the value of the constant driving this link,
* or Vz if there is no constant. The results of this function are
* only meaningful if all_drivers_constant(lnk) == true.
*/
static verinum::V driven_value(const NetObj::Link&lnk)
{
for (const NetObj::Link*cur = lnk.next_link()
; *cur != lnk ; cur = cur->next_link()) {
const NetConst*obj;
if (obj = dynamic_cast<const NetConst*>(cur->get_obj()))
return obj->value(cur->get_pin());
}
return verinum::Vz;
}
/*
* The cprop function below invokes constant propogation where
* possible. The elaboration generates NetConst objects. I can remove
@ -30,124 +70,69 @@
* may even be able to replace nets with a new constant.
*/
static bool is_a_const_node(const NetNode*obj)
struct cprop_functor : public functor_t {
virtual void lpm_logic(Design*des, NetLogic*obj);
};
void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
{
return dynamic_cast<const NetConst*>(obj);
}
switch (obj->type()) {
static bool const_into_xnor(Design*des, verinum::V cval,
NetLogic*log, unsigned pin)
{
assert(pin > 0);
/* if this is the last input pin of the XNOR device, then
the device is simply buffering the constant value. */
if (log->pin_count() == 2) {
cerr << "cprop: delete gate " << log->name() <<
" and propogate " << cval << "." << endl;
assert(pin == 1);
connect(log->pin(0), log->pin(1));
delete log;
return true;
}
/* If this is a constant 0, then replace the gate with one
1-pin smaller. Skip this pin. */
if (cval == verinum::V0) {
cerr << "cprop: disconnect pin " << pin << " from gate "
<< log->name() << "." << endl;
NetLogic*tmp = new NetLogic(log->name(),
log->pin_count()-1,
NetLogic::XNOR);
connect(log->pin(0), tmp->pin(0));
unsigned idx, jdx;
for (idx = 1, jdx = 1 ; idx < log->pin_count() ; idx += 1) {
if (idx == pin) continue;
connect(log->pin(idx), tmp->pin(jdx));
jdx += 1;
case NetLogic::AND:
// If there is one zero input to an AND gate, we know
// the resulting output is going to be zero and can
// elininate the gate.
for (unsigned idx = 1 ; idx < obj->pin_count() ; idx += 1) {
if (! all_drivers_constant(obj->pin(idx)))
continue;
if (driven_value(obj->pin(idx)) == verinum::V0) {
connect(obj->pin(0), obj->pin(idx));
delete obj;
return;
}
}
delete log;
des->add_node(tmp);
return true;
}
/* If this is a constant 1, then replace the gate with an XOR
that is 1-pin smaller. Removing the constant 1 causes the
sense of the output to change. */
if (cval == verinum::V1) {
cerr << "cprop: disconnect pin " << pin << " from gate "
<< log->name() << "." << endl;
NetLogic*tmp = new NetLogic(log->name(),
log->pin_count()-1,
NetLogic::XOR);
connect(log->pin(0), tmp->pin(0));
unsigned idx, jdx;
for (idx = 1, jdx = 1 ; idx < log->pin_count() ; idx += 1) {
if (idx == pin) continue;
connect(log->pin(idx), tmp->pin(jdx));
jdx += 1;
// There are no zero constant drivers. If there are any
// non-constant drivers, give up.
for (unsigned idx = 1 ; idx < obj->pin_count() ; idx += 1) {
if (! all_drivers_constant(obj->pin(idx)))
return;
}
delete log;
des->add_node(tmp);
return true;
}
/* If this is a constant X or Z, then the gate is certain to
generate an X. Replace the gate with a constant X. This may
cause other signals all over to become dangling. */
if ((cval == verinum::Vx) || (cval == verinum::Vz)) {
cerr << "cprop: replace gate " << log->name() << " with "
"a constant X." << endl;
NetConst*tmp = new NetConst(log->name(), verinum::Vx);
connect(log->pin(0), tmp->pin(0));
delete log;
des->add_node(tmp);
return true;
}
return false;
}
static void look_for_core_logic(Design*des, NetConst*obj, unsigned cpin)
{
NetObj*cur = obj;
unsigned pin = 0;
for (obj->pin(cpin).next_link(cur, pin)
; cur != obj
; cur->pin(pin).next_link(cur, pin)) {
NetLogic*log = dynamic_cast<NetLogic*>(cur);
if (log == 0)
continue;
bool flag = false;
switch (log->type()) {
case NetLogic::XNOR:
flag = const_into_xnor(des, obj->value(cpin), log, pin);
break;
default:
break;
// If there are any non-1 values (Vx or Vz) then the
// result is Vx.
for (unsigned idx = 1 ; idx < obj->pin_count() ; idx += 1) {
if (driven_value(obj->pin(idx)) != verinum::V1) {
connect(obj->pin(0), obj->pin(idx));
delete obj;
return;
}
}
/* If the optimization test tells me that a link was
deleted, restart the scan. */
if (flag) obj->pin(0).next_link(cur, pin);
// What's left? The inputs are all 1's, return the first
// input as the output value and remove the gate.
connect(obj->pin(0), obj->pin(1));
delete obj;
return;
default:
break;
}
}
/*
* This function looks to see if the constant is connected to nothing
* This functor looks to see if the constant is connected to nothing
* but signals. If that is the case, delete the dangling constant and
* the now useless signals.
* the now useless signals. This functor is applied after the regular
* functor to clean up dangling constants that might be left behind.
*/
static void dangling_const(Design*des, NetConst*obj)
struct cprop_dc_functor : public functor_t {
virtual void lpm_const(Design*des, NetConst*obj);
};
void cprop_dc_functor::lpm_const(Design*des, NetConst*obj)
{
// If there are any links that take input, abort this
// operation.
@ -175,21 +160,21 @@ static void dangling_const(Design*des, NetConst*obj)
delete obj;
}
void cprop(Design*des)
{
des->clear_node_marks();
while (NetNode*obj = des->find_node(&is_a_const_node)) {
NetConst*cur = dynamic_cast<NetConst*>(obj);
for (unsigned idx = 0 ; idx < cur->pin_count() ; idx += 1)
look_for_core_logic(des, cur, idx);
cur->set_mark();
dangling_const(des, cur);
}
cprop_functor prop;
des->functor(&prop);
cprop_dc_functor dc;
des->functor(&dc);
}
/*
* $Log: cprop.cc,v $
* Revision 1.4 1999/12/17 06:18:15 steve
* Rewrite the cprop functor to use the functor_t interface.
*
* Revision 1.3 1999/12/17 03:38:46 steve
* NetConst can now hold wide constants.
*

9
expr_synth.cc
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT)
#ident "$Id: expr_synth.cc,v 1.7 1999/12/17 03:38:46 steve Exp $"
#ident "$Id: expr_synth.cc,v 1.8 1999/12/17 06:18:15 steve Exp $"
#endif
# include "netlist.h"
@ -83,6 +83,7 @@ NetNet* NetEBBits::synthesize(Design*des)
assert(lsig->pin_count() == rsig->pin_count());
NetNet*osig = new NetNet(0, path, NetNet::IMPLICIT, lsig->pin_count());
osig->local_flag(true);
for (unsigned idx = 0 ; idx < osig->pin_count() ; idx += 1) {
string oname = des->local_symbol(path);
@ -125,6 +126,7 @@ NetNet* NetEConst::synthesize(Design*des)
unsigned width=expr_width();
NetNet*osig = new NetNet(0, path, NetNet::IMPLICIT, width);
osig->local_flag(true);
NetConst*con = new NetConst(des->local_symbol(path), value());
for (unsigned idx = 0 ; idx < width; idx += 1)
connect(osig->pin(idx), con->pin(idx));
@ -144,6 +146,7 @@ NetNet* NetEUBits::synthesize(Design*des)
NetNet*isig = expr_->synthesize(des);
NetNet*osig = new NetNet(0, path, NetNet::IMPLICIT, isig->pin_count());
osig->local_flag(true);
for (unsigned idx = 0 ; idx < osig->pin_count() ; idx += 1) {
string oname = des->local_symbol(path);
@ -178,6 +181,7 @@ NetNet* NetETernary::synthesize(Design *des)
assert(tsig->pin_count() == fsig->pin_count());
unsigned width=tsig->pin_count();
NetNet*osig = new NetNet(0, path, NetNet::IMPLICIT, width);
osig->local_flag(true);
string oname = des->local_symbol(path);
NetMux *mux = new NetMux(oname, width, 2, 1);
@ -199,6 +203,9 @@ NetNet* NetESignal::synthesize(Design*des)
/*
* $Log: expr_synth.cc,v $
* Revision 1.8 1999/12/17 06:18:15 steve
* Rewrite the cprop functor to use the functor_t interface.
*
* Revision 1.7 1999/12/17 03:38:46 steve
* NetConst can now hold wide constants.
*

23
functor.cc
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT)
#ident "$Id: functor.cc,v 1.6 1999/12/05 02:24:08 steve Exp $"
#ident "$Id: functor.cc,v 1.7 1999/12/17 06:18:16 steve Exp $"
#endif
# include "functor.h"
@ -35,10 +35,18 @@ void functor_t::process(class Design*, class NetProcTop*)
{
}
void functor_t::lpm_const(class Design*, class NetConst*)
{
}
void functor_t::lpm_ff(class Design*, class NetFF*)
{
}
void functor_t::lpm_logic(class Design*, class NetLogic*)
{
}
void Design::functor(functor_t*fun)
{
// apply to signals
@ -75,11 +83,21 @@ void NetNode::functor_node(Design*, functor_t*)
{
}
void NetConst::functor_node(Design*des, functor_t*fun)
{
fun->lpm_const(des, this);
}
void NetFF::functor_node(Design*des, functor_t*fun)
{
fun->lpm_ff(des, this);
}
void NetLogic::functor_node(Design*des, functor_t*fun)
{
fun->lpm_logic(des, this);
}
proc_match_t::~proc_match_t()
{
}
@ -131,6 +149,9 @@ int NetPEvent::match_proc(proc_match_t*that)
/*
* $Log: functor.cc,v $
* Revision 1.7 1999/12/17 06:18:16 steve
* Rewrite the cprop functor to use the functor_t interface.
*
* Revision 1.6 1999/12/05 02:24:08 steve
* Synthesize LPM_RAM_DQ for writes into memories.
*

11
functor.h
View File

@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT)
#ident "$Id: functor.h,v 1.4 1999/12/05 02:24:08 steve Exp $"
#ident "$Id: functor.h,v 1.5 1999/12/17 06:18:16 steve Exp $"
#endif
/*
@ -42,8 +42,14 @@ struct functor_t {
/* This method is called for each process in the design. */
virtual void process(class Design*des, class NetProcTop*);
/* This method is called for each structural constant. */
virtual void lpm_const(class Design*des, class NetConst*);
/* This method is called for each FF in the design. */
virtual void lpm_ff(class Design*des, class NetFF*);
/* Handle LPM combinational logic devices. */
virtual void lpm_logic(class Design*des, class NetLogic*);
};
struct proc_match_t {
@ -58,6 +64,9 @@ struct proc_match_t {
/*
* $Log: functor.h,v $
* Revision 1.5 1999/12/17 06:18:16 steve
* Rewrite the cprop functor to use the functor_t interface.
*
* Revision 1.4 1999/12/05 02:24:08 steve
* Synthesize LPM_RAM_DQ for writes into memories.
*

7
netlist.h
View File

@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT)
#ident "$Id: netlist.h,v 1.103 1999/12/17 03:38:46 steve Exp $"
#ident "$Id: netlist.h,v 1.104 1999/12/17 06:18:16 steve Exp $"
#endif
/*
@ -725,6 +725,7 @@ class NetConst : public NetNode {
verinum::V value(unsigned idx) const;
virtual void emit_node(ostream&, struct target_t*) const;
virtual void functor_node(Design*, functor_t*);
virtual void dump_node(ostream&, unsigned ind) const;
private:
@ -747,6 +748,7 @@ class NetLogic : public NetNode {
virtual void dump_node(ostream&, unsigned ind) const;
virtual void emit_node(ostream&, struct target_t*) const;
virtual void functor_node(Design*, functor_t*);
private:
const TYPE type_;
@ -2078,6 +2080,9 @@ extern ostream& operator << (ostream&, NetNet::Type);
/*
* $Log: netlist.h,v $
* Revision 1.104 1999/12/17 06:18:16 steve
* Rewrite the cprop functor to use the functor_t interface.
*
* Revision 1.103 1999/12/17 03:38:46 steve
* NetConst can now hold wide constants.
*