Improve some assert messages
Replace some assert functions with ivl_assert.
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parent
1872652019
commit
4d4a693248
14
elaborate.cc
14
elaborate.cc
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@ -1092,7 +1092,7 @@ void PGModule::elaborate_mod_(Design*des, Module*rmod, NetScope*scope) const
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// No named bindings, just use the positional list I
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// No named bindings, just use the positional list I
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// already have.
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// already have.
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assert(pin_count() == rmod->port_count());
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ivl_assert(*this, pin_count() == rmod->port_count());
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pins = get_pins();
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pins = get_pins();
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}
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}
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@ -1136,7 +1136,7 @@ void PGModule::elaborate_mod_(Design*des, Module*rmod, NetScope*scope) const
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perm_string pname = peek_tail_name(mport[0]->path());
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perm_string pname = peek_tail_name(mport[0]->path());
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NetNet*tmp = instance[0]->find_signal(pname);
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NetNet*tmp = instance[0]->find_signal(pname);
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assert(tmp);
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ivl_assert(*this, tmp);
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if (tmp->port_type() == NetNet::PINPUT) {
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if (tmp->port_type() == NetNet::PINPUT) {
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// If we have an unconnected input convert it
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// If we have an unconnected input convert it
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@ -1202,13 +1202,13 @@ void PGModule::elaborate_mod_(Design*des, Module*rmod, NetScope*scope) const
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for (unsigned ldx = 0 ; ldx < mport.size() ; ldx += 1) {
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for (unsigned ldx = 0 ; ldx < mport.size() ; ldx += 1) {
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unsigned lbase = inst * mport.size();
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unsigned lbase = inst * mport.size();
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PEIdent*pport = mport[ldx];
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PEIdent*pport = mport[ldx];
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assert(pport);
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ivl_assert(*this, pport);
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prts[lbase + ldx]
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prts[lbase + ldx]
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= pport->elaborate_port(des, inst_scope);
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= pport->elaborate_port(des, inst_scope);
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if (prts[lbase + ldx] == 0)
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if (prts[lbase + ldx] == 0)
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continue;
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continue;
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assert(prts[lbase + ldx]);
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ivl_assert(*this, prts[lbase + ldx]);
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prts_vector_width += prts[lbase + ldx]->vector_width();
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prts_vector_width += prts[lbase + ldx]->vector_width();
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}
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}
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}
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}
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@ -1223,7 +1223,7 @@ void PGModule::elaborate_mod_(Design*des, Module*rmod, NetScope*scope) const
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// We know by design that each instance has the same
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// We know by design that each instance has the same
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// width port. Therefore, the prts_pin_count must be an
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// width port. Therefore, the prts_pin_count must be an
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// even multiple of the instance count.
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// even multiple of the instance count.
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assert(prts_vector_width % instance.size() == 0);
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ivl_assert(*this, prts_vector_width % instance.size() == 0);
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unsigned desired_vector_width = prts_vector_width;
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unsigned desired_vector_width = prts_vector_width;
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if (instance.size() != 1)
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if (instance.size() != 1)
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@ -1340,12 +1340,12 @@ void PGModule::elaborate_mod_(Design*des, Module*rmod, NetScope*scope) const
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}
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}
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assert(sig);
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ivl_assert(*this, sig);
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#ifndef NDEBUG
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#ifndef NDEBUG
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if ((prts.size() >= 1)
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if ((prts.size() >= 1)
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&& (prts[0]->port_type() != NetNet::PINPUT)) {
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&& (prts[0]->port_type() != NetNet::PINPUT)) {
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assert(sig->type() != NetNet::REG);
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ivl_assert(*this, sig->type() != NetNet::REG);
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}
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}
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#endif
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#endif
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