Coerse input to inout when assigned to.

This commit is contained in:
steve 2001-11-10 02:08:49 +00:00
parent 0c7335a77d
commit 4d0b840c26
4 changed files with 32 additions and 9 deletions

View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/ */
#if !defined(WINNT) && !defined(macintosh) #if !defined(WINNT) && !defined(macintosh)
#ident "$Id: elab_net.cc,v 1.80 2001/11/08 05:15:50 steve Exp $" #ident "$Id: elab_net.cc,v 1.81 2001/11/10 02:08:49 steve Exp $"
#endif #endif
# include "config.h" # include "config.h"
@ -1250,6 +1250,15 @@ NetNet* PEIdent::elaborate_lnet(Design*des, NetScope*scope) const
return 0; return 0;
} }
if (sig->port_type() == NetNet::PINPUT) {
cerr << get_line() << ": warning: assign l-value ``"
<< sig->name() << "'' is also an input to "
<< sig->scope()->name() << "." << endl;
cerr << sig->get_line() << ": warning: input ``"
<< sig->name() << "'' is coerced to inout." << endl;
sig->port_type(NetNet::PINOUT);
}
if (msb_ && lsb_) { if (msb_ && lsb_) {
/* Detect a part select. Evaluate the bits and elaborate /* Detect a part select. Evaluate the bits and elaborate
the l-value by creating a sub-net that links to just the l-value by creating a sub-net that links to just
@ -1869,6 +1878,9 @@ NetNet* PEUnary::elaborate_net(Design*des, NetScope*scope,
/* /*
* $Log: elab_net.cc,v $ * $Log: elab_net.cc,v $
* Revision 1.81 2001/11/10 02:08:49 steve
* Coerse input to inout when assigned to.
*
* Revision 1.80 2001/11/08 05:15:50 steve * Revision 1.80 2001/11/08 05:15:50 steve
* Remove string paths from PExpr elaboration. * Remove string paths from PExpr elaboration.
* *

View File

@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/ */
#if !defined(WINNT) && !defined(macintosh) #if !defined(WINNT) && !defined(macintosh)
#ident "$Id: parse.y,v 1.135 2001/11/06 02:52:19 steve Exp $" #ident "$Id: parse.y,v 1.136 2001/11/10 02:08:49 steve Exp $"
#endif #endif
# include "config.h" # include "config.h"
@ -1195,7 +1195,7 @@ module_item
} }
| port_type range_opt list_of_variables ';' | port_type range_opt list_of_variables ';'
{ pform_set_port_type($3, $2, $1); { pform_set_port_type(@1, $3, $2, $1);
} }
| port_type range_opt error ';' | port_type range_opt error ';'
{ yyerror(@3, "error: Invalid variable list" { yyerror(@3, "error: Invalid variable list"

View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/ */
#if !defined(WINNT) && !defined(macintosh) #if !defined(WINNT) && !defined(macintosh)
#ident "$Id: pform.cc,v 1.83 2001/10/31 03:11:15 steve Exp $" #ident "$Id: pform.cc,v 1.84 2001/11/10 02:08:49 steve Exp $"
#endif #endif
# include "config.h" # include "config.h"
@ -772,12 +772,15 @@ void pform_makewire(const vlltype&li,
delete range; delete range;
} }
void pform_set_port_type(const string&nm, NetNet::PortType pt) void pform_set_port_type(const char*nm, NetNet::PortType pt,
const char*file, unsigned lineno)
{ {
const string name = scoped_name(nm); const string name = scoped_name(nm);
PWire*cur = pform_cur_module->get_wire(name); PWire*cur = pform_cur_module->get_wire(name);
if (cur == 0) { if (cur == 0) {
cur = new PWire(name, NetNet::IMPLICIT, pt); cur = new PWire(name, NetNet::IMPLICIT, pt);
cur->set_file(file);
cur->set_lineno(lineno);
pform_cur_module->add_wire(cur); pform_cur_module->add_wire(cur);
} }
@ -955,7 +958,8 @@ void pform_set_defparam(const string&name, PExpr*expr)
pform_cur_module->defparms[name] = expr; pform_cur_module->defparms[name] = expr;
} }
void pform_set_port_type(list<char*>*names, void pform_set_port_type(const struct vlltype&li,
list<char*>*names,
svector<PExpr*>*range, svector<PExpr*>*range,
NetNet::PortType pt) NetNet::PortType pt)
{ {
@ -963,7 +967,7 @@ void pform_set_port_type(list<char*>*names,
; cur != names->end() ; cur != names->end()
; cur ++ ) { ; cur ++ ) {
char*txt = *cur; char*txt = *cur;
pform_set_port_type(txt, pt); pform_set_port_type(txt, pt, li.text, li.first_line);
if (range) if (range)
pform_set_net_range(txt, range, false); pform_set_net_range(txt, range, false);
free(txt); free(txt);
@ -1102,6 +1106,9 @@ int pform_parse(const char*path, FILE*file)
/* /*
* $Log: pform.cc,v $ * $Log: pform.cc,v $
* Revision 1.84 2001/11/10 02:08:49 steve
* Coerse input to inout when assigned to.
*
* Revision 1.83 2001/10/31 03:11:15 steve * Revision 1.83 2001/10/31 03:11:15 steve
* detect module ports not declared within the module. * detect module ports not declared within the module.
* *

View File

@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/ */
#if !defined(WINNT) && !defined(macintosh) #if !defined(WINNT) && !defined(macintosh)
#ident "$Id: pform.h,v 1.50 2001/10/31 03:11:15 steve Exp $" #ident "$Id: pform.h,v 1.51 2001/11/10 02:08:49 steve Exp $"
#endif #endif
# include "netlist.h" # include "netlist.h"
@ -137,7 +137,8 @@ extern void pform_makewire(const struct vlltype&li,
NetNet::Type type); NetNet::Type type);
extern void pform_make_reginit(const struct vlltype&li, extern void pform_make_reginit(const struct vlltype&li,
const string&name, PExpr*expr); const string&name, PExpr*expr);
extern void pform_set_port_type(list<char*>*names, svector<PExpr*>*, extern void pform_set_port_type(const struct vlltype&li,
list<char*>*names, svector<PExpr*>*,
NetNet::PortType); NetNet::PortType);
extern void pform_set_net_range(list<char*>*names, svector<PExpr*>*, bool); extern void pform_set_net_range(list<char*>*names, svector<PExpr*>*, bool);
extern void pform_set_reg_idx(const string&name, PExpr*l, PExpr*r); extern void pform_set_reg_idx(const string&name, PExpr*l, PExpr*r);
@ -202,6 +203,9 @@ extern void pform_dump(ostream&out, Module*mod);
/* /*
* $Log: pform.h,v $ * $Log: pform.h,v $
* Revision 1.51 2001/11/10 02:08:49 steve
* Coerse input to inout when assigned to.
*
* Revision 1.50 2001/10/31 03:11:15 steve * Revision 1.50 2001/10/31 03:11:15 steve
* detect module ports not declared within the module. * detect module ports not declared within the module.
* *