Add regression tests for non-ANSI integer module ports
Check that it is possible to declare the type separately from the direction for non-ANSI integer, time and atom2 ports. Check that it is possible to both declare the type before and after the direction. For integer, time and atom2 types the range specification on the port direction declaration should be empty, rather than the implicit packed dimension of the integer type. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
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// Check that it is possible to declare the data type for an atom2 type module
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// port separately from the direction for non-ANSI style port declarations.
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// declarations.
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module test(x, y, z, w);
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output x;
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output y;
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output z;
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output w;
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byte x;
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shortint y;
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int z;
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longint w;
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initial begin
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if ($bits(x) == 8 && $bits(y) == 16 &&
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$bits(z) == 32 && $bits(w) == 64) begin
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$display("PASSED");
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end else begin
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$display("FAILED");
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end
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end
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endmodule
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@ -0,0 +1,23 @@
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// Check that it is possible to declare the data type for an atom2 type module
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// port before the direction for non-ANSI style port declarations.
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module test(x, y, z, w);
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byte x;
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shortint y;
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int z;
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longint w;
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output x;
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output y;
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output z;
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output w;
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initial begin
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if ($bits(x) == 8 && $bits(y) == 16 &&
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$bits(z) == 32 && $bits(w) == 64) begin
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$display("PASSED");
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end else begin
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$display("FAILED");
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end
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end
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endmodule
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@ -0,0 +1,17 @@
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// Check that it is possible to declare the data type for an integer type module
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// port separately from the direction for non-ANSI style port declarations.
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// declarations.
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module test(x);
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output x;
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integer x;
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initial begin
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if ($bits(x) == $bits(integer)) begin
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$display("PASSED");
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end else begin
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$display("FAILED");
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end
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end
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endmodule
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@ -0,0 +1,16 @@
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// Check that it is possible to declare the data type for an integer type module
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// port before the direction for non-ANSI style port declarations.
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module test(x);
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integer x;
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output x;
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initial begin
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if ($bits(x) == $bits(integer)) begin
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$display("PASSED");
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end else begin
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$display("FAILED");
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end
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end
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endmodule
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@ -0,0 +1,17 @@
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// Check that it is possible to declare the data type for a time type module
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// port separately from the direction for non-ANSI style port declarations.
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// declarations.
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module test(x);
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output x;
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time x;
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initial begin
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if ($bits(x) == 64) begin
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$display("PASSED");
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end else begin
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$display("FAILED");
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end
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end
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endmodule
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@ -0,0 +1,16 @@
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// Check that it is possible to declare the data type for a time type module
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// port before the direction for non-ANSI style port declarations.
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module test(x);
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time x;
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output x;
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initial begin
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if ($bits(x) == 64) begin
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$display("PASSED");
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end else begin
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$display("FAILED");
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end
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end
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endmodule
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@ -338,6 +338,8 @@ logp2 normal,-g2005-sv ivltests
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mod_inst_pkg normal,-g2009 ivltests
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module_nonansi_enum1 normal,-g2005-sv ivltests
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module_nonansi_enum2 normal,-g2005-sv ivltests
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module_nonansi_int1 normal,-g2005-sv ivltests
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module_nonansi_int2 normal,-g2005-sv ivltests
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module_nonansi_parray1 normal,-g2005-sv ivltests
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module_nonansi_parray2 normal,-g2005-sv ivltests
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module_nonansi_real1 normal,-g2005-sv ivltests
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@ -650,6 +650,10 @@ module3.12A normal ivltests main
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module3.12B normal ivltests
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module_inout_port_type CE ivltests
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module_input_port_type CE ivltests
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module_nonansi_integer1 normal ivltests
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module_nonansi_integer2 normal ivltests
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module_nonansi_time1 normal ivltests
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module_nonansi_time2 normal ivltests
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module_nonansi_vec1 normal ivltests
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module_nonansi_vec2 normal ivltests
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module_output_port_var1 normal ivltests
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@ -796,6 +796,8 @@ iuint1 normal,-g2009,-pallowsigned=1 ivltests
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logp2 normal,-g2009,-pallowsigned=1 ivltests
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mixed_width_case normal,-pallowsigned=1 ivltests
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mod_inst_pkg normal,-g2009,-pallowsigned=1 ivltests
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module_nonansi_int1 normal,-g2005-sv,-pallowsigned=1 ivltests
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module_nonansi_int2 normal,-g2005-sv,-pallowsigned=1 ivltests
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module_output_port_sv_var1 normal,-g2005-sv,-pallowsigned=1 ivltests
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module_output_port_sv_var2 normal,-g2005-sv,-pallowsigned=1 ivltests
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module_output_port_var1 normal,-pallowsigned=1 ivltests
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