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https://github.com/steveicarus/iverilog.git
synced 2026-08-28 16:53:45 +02:00
vvp: concat: Avoid using individual bit access
The concat functors use individual bit access to initialize and copy values. For initialization pass the initial bit value to the constructor and for coping use set_vec() instead. Both can be a fair bit faster since data is copied word by word rather than bit by bit. Signed-off-by: Lars-Peter Clausen <[email protected]>
This commit is contained in:
+7
-28
@@ -27,15 +27,12 @@ using namespace std;
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vvp_fun_concat::vvp_fun_concat(unsigned w0, unsigned w1,
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unsigned w2, unsigned w3)
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: val_(w0+w1+w2+w3)
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: val_(w0+w1+w2+w3, BIT4_Z)
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{
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wid_[0] = w0;
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wid_[1] = w1;
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wid_[2] = w2;
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wid_[3] = w3;
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for (unsigned idx = 0 ; idx < val_.size() ; idx += 1)
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val_.set_bit(idx, BIT4_Z);
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}
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vvp_fun_concat::~vvp_fun_concat()
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@@ -52,7 +49,6 @@ void vvp_fun_concat::recv_vec4_pv(vvp_net_ptr_t port, const vvp_vector4_t&bit,
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unsigned base, unsigned vwid, vvp_context_t)
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{
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unsigned pdx = port.port();
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unsigned wid = bit.size();
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if (vwid != wid_[pdx]) {
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cerr << "internal error: port " << pdx
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@@ -61,17 +57,12 @@ void vvp_fun_concat::recv_vec4_pv(vvp_net_ptr_t port, const vvp_vector4_t&bit,
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assert(0);
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}
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unsigned off = 0;
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unsigned off = base;
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for (unsigned idx = 0 ; idx < pdx ; idx += 1)
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off += wid_[idx];
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unsigned limit = off + wid_[pdx];
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off += base;
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for (unsigned idx = 0 ; idx < wid ; idx += 1) {
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if (off+idx >= limit) break;
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val_.set_bit(off+idx, bit.value(idx));
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}
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if (!val_.set_vec(off, bit))
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return;
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port.ptr()->send_vec4(val_, 0);
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}
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@@ -101,9 +92,6 @@ vvp_fun_concat8::vvp_fun_concat8(unsigned w0, unsigned w1,
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wid_[1] = w1;
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wid_[2] = w2;
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wid_[3] = w3;
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for (unsigned idx = 0 ; idx < val_.size() ; idx += 1)
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val_.set_bit(idx, vvp_scalar_t(BIT4_Z, 0, 0));
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}
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vvp_fun_concat8::~vvp_fun_concat8()
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@@ -133,7 +121,6 @@ void vvp_fun_concat8::recv_vec8_pv(vvp_net_ptr_t port, const vvp_vector8_t&bit,
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unsigned base, unsigned vwid)
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{
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unsigned pdx = port.port();
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unsigned wid = bit.size();
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if (vwid != wid_[pdx]) {
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cerr << "internal error: port " << pdx
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@@ -142,17 +129,11 @@ void vvp_fun_concat8::recv_vec8_pv(vvp_net_ptr_t port, const vvp_vector8_t&bit,
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assert(0);
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}
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unsigned off = 0;
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unsigned off = base;
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for (unsigned idx = 0 ; idx < pdx ; idx += 1)
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off += wid_[idx];
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unsigned limit = off + wid_[pdx];
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off += base;
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for (unsigned idx = 0 ; idx < wid ; idx += 1) {
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if (off+idx >= limit) break;
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val_.set_bit(off+idx, bit.value(idx));
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}
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val_.set_vec(off, bit);
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port.ptr()->send_vec8(val_);
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}
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@@ -192,9 +173,7 @@ void vvp_fun_repeat::recv_vec4(vvp_net_ptr_t port, const vvp_vector4_t&bit,
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for (unsigned rdx = 0 ; rdx < rep_ ; rdx += 1) {
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unsigned off = rdx * bit.size();
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for (unsigned idx = 0 ; idx < bit.size() ; idx += 1)
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val.set_bit(off+idx, bit.value(idx));
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val.set_vec(off, bit);
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}
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port.ptr()->send_vec4(val, 0);
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