Add verilog<suffix> to MinGW iverilog-vpi tool
When changing where the include files were located the MinGW iverilog-vpi tool was missed.
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6f1887bf1c
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@ -511,20 +511,16 @@ static void setup_ivl_environment()
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}
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}
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/* Build up the CFLAGS option string */
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/* Build up the CFLAGS option string */
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assign(&gstr.pCFLAGS,IVERILOG_VPI_CFLAGS);
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assign(&gstr.pCFLAGS,IVERILOG_VPI_CFLAGS " -I");
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append(&gstr.pCFLAGS," -I");
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append(&gstr.pCFLAGS,gstr.pIVL);
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append(&gstr.pCFLAGS,gstr.pIVL);
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appendBackSlash(&gstr.pCFLAGS);
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appendBackSlash(&gstr.pCFLAGS);
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append(&gstr.pCFLAGS, "\\");
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append(&gstr.pCFLAGS,"\\include\\\\verilog" IVERILOG_SUFFIX);
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append(&gstr.pCFLAGS,"include" IVERILOG_SUFFIX);
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/* Build up the LDFLAGS option string */
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/* Build up the LDFLAGS option string */
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assign(&gstr.pLDLIBS,"-L");
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assign(&gstr.pLDLIBS,"-L");
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append(&gstr.pLDLIBS,gstr.pIVL);
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append(&gstr.pLDLIBS,gstr.pIVL);
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appendBackSlash(&gstr.pLDLIBS);
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appendBackSlash(&gstr.pLDLIBS);
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append(&gstr.pLDLIBS, "\\");
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append(&gstr.pLDLIBS,"\\lib " IVERILOG_VPI_LDLIBS);
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append(&gstr.pLDLIBS,"lib ");
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append(&gstr.pLDLIBS,IVERILOG_VPI_LDLIBS);
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}
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}
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/* compile source modules */
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/* compile source modules */
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