More spelling, comments only

dosify.c

@@ -19,7 +19,7 @@
 
 /*
  * This is a simple program to make a dosified copy of the
- * original. That is, it converts unix style line ends to DOS
+ * original. That is, it converts Unix style line ends to DOS
  * style. This is useful for installing text files.
  *
  * The exact substitution is to replace \n with \r\n. If the line

t-dll-expr.cc

@@ -68,7 +68,7 @@ void dll_target::sub_off_from_expr_(long off)
 	    off >>= 1;
       }
 
-	/* Now make the subtractor (x-4 in the above example)
+	/* Now make the subtracter (x-4 in the above example)
 	   that has as input A the index expression and input B
 	   the constant to subtract. */
       ivl_expr_t tmps = (ivl_expr_t)calloc(1, sizeof(struct ivl_expr_s));
@@ -104,7 +104,7 @@ void dll_target::mul_expr_by_const_(long val)
 	    val >>= 1;
       }
 
-	/* Now make the subtractor (x-4 in the above example)
+	/* Now make the subtracter (x-4 in the above example)
 	   that has as input A the index expression and input B
 	   the constant to subtract. */
       ivl_expr_t tmps = (ivl_expr_t)calloc(1, sizeof(struct ivl_expr_s));

vhdlpp/architec.h

@@ -270,7 +270,7 @@ class StatementList : public Architecture::Statement {
       std::list<SequentialStmt*> statements_;
 };
 
-// There is no direct VHDL countepart to SV 'initial' statement,
+// There is no direct VHDL counterpart to SV 'initial' statement,
 // but we can still use it during the translation process.
 class InitialStatement : public StatementList {
     public:
@@ -281,7 +281,7 @@ class InitialStatement : public StatementList {
       void dump(ostream&out, int indent =0) const;
 };
 
-// There is no direct VHDL countepart to SV 'final' statement,
+// There is no direct VHDL counterpart to SV 'final' statement,
 // but we can still use it during the translation process.
 class FinalStatement : public StatementList {
     public:

vhdlpp/architec_elaborate.cc

@@ -247,7 +247,7 @@ int CondSignalAssignment::elaborate(Entity*ent, Architecture*arc)
 {
       int errors = 0;
 
-        // Visitor to extract signal names occuring in the conditional
+        // Visitor to extract signal names occurring in the conditional
         // statements to create the sensitivity list
       struct name_extractor_t : public ExprVisitor {
           name_extractor_t(list<const ExpName*>& name_list)

vhdlpp/compiler.h

@@ -36,7 +36,7 @@ extern StringHeapLex lex_strings;
 // Stores file names
 extern StringHeapLex filename_strings;
 
-// Stores generated strigns (e.g. scope names)
+// Stores generated strings (e.g. scope names)
 extern StringHeapLex gen_strings;
 
 #endif /* IVL_compiler_H */

vvp/vpi_priv.h

@@ -445,7 +445,7 @@ struct __vpiModPathSrc : public __vpiHandle {
 
 /*
  *
- * The vpiMoaPath vpiHandle will define
+ * The vpiModPath vpiHandle will define
  * a vpiModPath of record .modpath as defined
  * in the IEEE 1364
  *

vvp/vthread.cc

@@ -5061,7 +5061,7 @@ bool of_RET_VEC4(vthread_t thr, vvp_code_t cp)
 	    return true;
       }
 
-	// IF the index is below the vector, then only assign the high
+	// If the index is below the vector, then only assign the high
 	// bits that overlap with the target
       if (off < 0) {
 	    int use_off = -off;
@@ -5071,7 +5071,7 @@ bool of_RET_VEC4(vthread_t thr, vvp_code_t cp)
 	    off = 0;
       }
 
-	// If the value is partly above the taret, then only assign
+	// If the value is partly above the target, then only assign
 	// the bits that overlap
       if ((off+wid) > sig_value_size) {
 	    wid = sig_value_size - off;