Evaluate shift index after shift operand because
the chift operand may use the index register itself.
This commit is contained in:
steve
parent
6fbfdd8f3f
commit
42b34c2ce6
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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*/
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#ifdef HAVE_CVS_IDENT
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: eval_expr.c,v 1.87 2002/12/19 23:11:29 steve Exp $"
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#ident "$Id: eval_expr.c,v 1.88 2002/12/20 01:11:14 steve Exp $"
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#endif
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#endif
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# include "vvp_priv.h"
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# include "vvp_priv.h"
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@ -618,9 +618,62 @@ static struct vector_info draw_binary_expr_lrs(ivl_expr_t exp, unsigned wid)
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{
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{
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ivl_expr_t le = ivl_expr_oper1(exp);
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ivl_expr_t le = ivl_expr_oper1(exp);
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ivl_expr_t re = ivl_expr_oper2(exp);
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ivl_expr_t re = ivl_expr_oper2(exp);
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const char*opcode = "?";
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struct vector_info lv;
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struct vector_info lv;
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/* Evaluate the expression that is to be shifted. */
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switch (ivl_expr_opcode(exp)) {
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case 'l': /* << (left shift) */
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lv = draw_eval_expr_wid(le, wid, 0);
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/* shifting 0 gets 0. */
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if (lv.base == 0)
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break;
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if (lv.base < 4) {
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struct vector_info tmp;
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tmp.base = allocate_vector(lv.wid);
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tmp.wid = lv.wid;
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fprintf(vvp_out, " %%mov %u, %u, %u;\n",
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tmp.base, lv.base, lv.wid);
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lv = tmp;
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}
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opcode = "%shiftl";
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break;
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case 'r': /* >> (unsigned right shift) */
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/* with the right shift, there may be high bits that are
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shifted into the desired width of the expression, so
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we let the expression size itself, if it is bigger
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then what is requested of us. */
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if (wid > ivl_expr_width(le)) {
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lv = draw_eval_expr_wid(le, wid, 0);
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} else {
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lv = draw_eval_expr_wid(le, ivl_expr_width(le), 0);
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}
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/* shifting 0 gets 0. */
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if (lv.base == 0)
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break;
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if (lv.base < 4) {
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struct vector_info tmp;
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tmp.base = allocate_vector(lv.wid);
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tmp.wid = lv.wid;
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fprintf(vvp_out, " %%mov %u, %u, %u;\n",
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tmp.base, lv.base, lv.wid);
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lv = tmp;
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}
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opcode = "%shiftr";
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break;
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default:
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assert(0);
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}
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/* Figure out the shift amount and load that into the index
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/* Figure out the shift amount and load that into the index
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register. The value may be a constant, or may need to be
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register. The value may be a constant, or may need to be
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evaluated at run time. */
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evaluated at run time. */
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@ -662,56 +715,10 @@ static struct vector_info draw_binary_expr_lrs(ivl_expr_t exp, unsigned wid)
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}
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}
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switch (ivl_expr_opcode(exp)) {
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fprintf(vvp_out, " %s/i0 %u, %u;\n", opcode, lv.base, lv.wid);
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case 'l': /* << (left shift) */
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if (lv.base >= 8)
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lv = draw_eval_expr_wid(le, wid, 0);
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save_expression_lookaside(lv.base, exp, lv.wid);
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/* shifting 0 gets 0. */
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if (lv.base == 0)
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break;
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if (lv.base < 4) {
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struct vector_info tmp;
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tmp.base = allocate_vector(lv.wid);
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tmp.wid = lv.wid;
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fprintf(vvp_out, " %%mov %u, %u, %u;\n",
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tmp.base, lv.base, lv.wid);
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lv = tmp;
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}
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fprintf(vvp_out, " %%shiftl/i0 %u, %u;\n", lv.base, lv.wid);
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break;
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case 'r': /* >> (unsigned right shift) */
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/* with the right shift, there may be high bits that are
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shifted into the desired width of the expression, so
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we let the expression size itself, if it is bigger
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then what is requested of us. */
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if (wid > ivl_expr_width(le)) {
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lv = draw_eval_expr_wid(le, wid, 0);
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} else {
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lv = draw_eval_expr_wid(le, ivl_expr_width(le), 0);
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}
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/* shifting 0 gets 0. */
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if (lv.base == 0)
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break;
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if (lv.base < 4) {
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struct vector_info tmp;
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tmp.base = allocate_vector(lv.wid);
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tmp.wid = lv.wid;
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fprintf(vvp_out, " %%mov %u, %u, %u;\n",
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tmp.base, lv.base, lv.wid);
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lv = tmp;
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}
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fprintf(vvp_out, " %%shiftr/i0 %u, %u;\n", lv.base, lv.wid);
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break;
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default:
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assert(0);
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}
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return lv;
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return lv;
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}
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}
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@ -1963,6 +1970,10 @@ struct vector_info draw_eval_expr(ivl_expr_t exp, int stuff_ok_flag)
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/*
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/*
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* $Log: eval_expr.c,v $
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* $Log: eval_expr.c,v $
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* Revision 1.88 2002/12/20 01:11:14 steve
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* Evaluate shift index after shift operand because
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* the chift operand may use the index register itself.
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*
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* Revision 1.87 2002/12/19 23:11:29 steve
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* Revision 1.87 2002/12/19 23:11:29 steve
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* Keep bit select subexpression width if it is constant.
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* Keep bit select subexpression width if it is constant.
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*
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*
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