Support multi-dimensional packed vectors as class properties
Currently multi-dimensional packed vector class properties will cause an assert and only single dimensional or scalar vectors will pass. But just as for regular vectors there is nothing special about class property multi-dimensional vectors as they will be represented in vector form in vvp. Removing the asserts allows multi-dimensional packed vectors to be used for class properties. Indexed access to these properties is not supported yet; that requires follow-up work to elaborate packed property selects and to support partial stores to vector class properties. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2012 Stephen Williams (steve@icarus.com)
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* Copyright (c) 2012-2026 Stephen Williams (steve@icarus.com)
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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@ -28,7 +28,6 @@ static void show_prop_type_vector(ivl_type_t ptype)
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{
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ivl_variable_type_t data_type = ivl_type_base(ptype);
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unsigned packed_dimensions = ivl_type_packed_dimensions(ptype);
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assert(packed_dimensions < 2);
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const char*signed_flag = ivl_type_signed(ptype)? "s" : "";
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char code = data_type==IVL_VT_BOOL? 'b' : 'L';
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@ -37,12 +36,8 @@ static void show_prop_type_vector(ivl_type_t ptype)
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fprintf(vvp_out, "\"%s%c1\"", signed_flag, code);
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} else {
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assert(packed_dimensions == 1);
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assert(ivl_type_packed_lsb(ptype,0) == 0);
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assert(ivl_type_packed_msb(ptype,0) >= 0);
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fprintf(vvp_out, "\"%s%c%d\"", signed_flag, code,
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ivl_type_packed_msb(ptype,0)+1);
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ivl_type_packed_width(ptype));
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}
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}
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2011-2025 Stephen Williams (steve@icarus.com)
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* Copyright (c) 2011-2026 Stephen Williams (steve@icarus.com)
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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@ -1319,10 +1319,6 @@ static int show_stmt_assign_sig_cobject(ivl_statement_t net)
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if (ivl_type_base(prop_type) == IVL_VT_BOOL ||
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ivl_type_base(prop_type) == IVL_VT_LOGIC) {
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assert(ivl_type_packed_dimensions(prop_type) == 0 ||
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(ivl_type_packed_dimensions(prop_type) == 1 &&
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ivl_type_packed_msb(prop_type,0) >= ivl_type_packed_lsb(prop_type, 0)));
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if (ivl_stmt_opcode(net) != 0) {
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fprintf(vvp_out, " %%prop/v %d;\n", prop_idx);
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}
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