Merge branch 'master' into vvp-net-out-rework

Conflicts:
	vvp/vpi_signal.cc
This commit is contained in:
Stephen Williams
2009-09-13 12:31:17 -07:00
18 changed files with 123 additions and 28 deletions
+8 -7
View File
@@ -238,7 +238,7 @@ vvp_fun_part_var::~vvp_fun_part_var()
}
bool vvp_fun_part_var::recv_vec4_(vvp_net_ptr_t port, const vvp_vector4_t&bit,
long&base, vvp_vector4_t&source,
int&base, vvp_vector4_t&source,
vvp_vector4_t&ref)
{
long tmp;
@@ -247,12 +247,13 @@ bool vvp_fun_part_var::recv_vec4_(vvp_net_ptr_t port, const vvp_vector4_t&bit,
source = bit;
break;
case 1:
// LONG_MIN is before the vector and is used to
// INT_MIN is before the vector and is used to
// represent a 'bx value on the select input.
tmp = LONG_MIN;
// We need a new &PV<> that knows if the index is signed.
tmp = INT_MIN;
// We need a new .part/v that knows if the index is signed.
// For now this will work for a normal integer value.
vector4_to_value(bit, tmp, false);
if (tmp == base) return false;
if ((int)tmp == base) return false;
base = tmp;
break;
default:
@@ -264,7 +265,7 @@ bool vvp_fun_part_var::recv_vec4_(vvp_net_ptr_t port, const vvp_vector4_t&bit,
vvp_vector4_t res (wid_);
for (unsigned idx = 0 ; idx < wid_ ; idx += 1) {
long adr = base+idx;
int adr = base+idx;
if (adr < 0) continue;
if ((unsigned)adr >= source.size()) break;
@@ -313,7 +314,7 @@ void vvp_fun_part_var_sa::recv_vec4_pv(vvp_net_ptr_t port, const vvp_vector4_t&b
struct vvp_fun_part_var_state_s {
vvp_fun_part_var_state_s() : base(0) { }
long base;
int base;
vvp_vector4_t source;
vvp_vector4_t ref;
};