Spelling fixes in .txt files
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@ -95,7 +95,7 @@ keys, with their corresponding values, are:
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This is exactly the same as the "-Dname=<value>" described above.
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This is exactly the same as the "-Dname=<value>" described above.
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I:<dir>
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I:<dir>
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This is exctly the same as "-I<dir>".
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This is exactly the same as "-I<dir>".
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relative include:<flag>
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relative include:<flag>
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The <flag> can be "true" or "false". This enables "relative
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The <flag> can be "true" or "false". This enables "relative
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@ -3,7 +3,7 @@ THE VVP TARGET
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SYMBOL NAME CONVENTIONS
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SYMBOL NAME CONVENTIONS
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There are some naming conventions that the vp target uses for
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There are some naming conventions that the vvp target uses for
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generating symbol names.
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generating symbol names.
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* wires and regs
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* wires and regs
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@ -218,8 +218,8 @@ only.
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The function of a UDP is defined via a table. The rows of the table
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The function of a UDP is defined via a table. The rows of the table
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are strings which describe input states or edges, and the new output
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are strings which describe input states or edges, and the new output
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state. Combinatorial UDPs require one character for each input, and
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state. Combinatorial UDPs require one character for each input, and
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one character at the end for the output state. Sequential UDPs need
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one character at the end for the output state. Sequential UDPs need
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an additional char for the current state, which is the first char of
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an additional char for the current state, which is the first char of
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the row.
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the row.
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@ -227,7 +227,7 @@ Any input transition or the new state must match at most one row (or
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all matches must provide the same output state). If no row matches,
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all matches must provide the same output state). If no row matches,
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the output becomes 1'bx.
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the output becomes 1'bx.
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The output state can be specified as "0", "1", or "x". Sequential
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The output state can be specified as "0", "1", or "x". Sequential
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UDPs may also have "-": no change.
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UDPs may also have "-": no change.
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An input or current output state can be
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An input or current output state can be
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@ -256,7 +256,7 @@ A combinatorial UDP is defined like this:
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<type> .udp/comb "<name>", <number>, "<row0>", "<row1>", ... ;
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<type> .udp/comb "<name>", <number>, "<row0>", "<row1>", ... ;
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<type> is a label that identifies the UDP. <number> is the number of
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<type> is a label that identifies the UDP. <number> is the number of
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inputs. "<name>" is there for public identification. Sequential UDPs
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inputs. "<name>" is there for public identification. Sequential UDPs
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need an additional initialization value:
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need an additional initialization value:
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<type> .udp/sequ "<name>", <number>, <init>, "<row0>", "<row1>", ... ;
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<type> .udp/sequ "<name>", <number>, <init>, "<row0>", "<row1>", ... ;
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@ -535,8 +535,8 @@ implicit from these numbers. The <symbol> is then the input source.
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SUBSTITUTION STATEMENTS:
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SUBSTITUTION STATEMENTS:
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The substition statement doesn't have a direct analog in Verilog, it
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The substitution statement doesn't have a direct analog in Verilog, it
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only turns up in synthesis. It is a sorthand for forms like this:
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only turns up in synthesis. It is a shorthand for forms like this:
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foo = <a>;
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foo = <a>;
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foo[n] = <s>;
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foo[n] = <s>;
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@ -118,7 +118,7 @@ event control registers to determine when to perform the assign.
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%evctl is used to set the event control information.
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%evctl is used to set the event control information.
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* %assign/v0 <var-label>, <delay>, <bit> (XXXX Old description)
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* %assign/v0 <var-label>, <delay>, <bit> (XXXX Old description)
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* %assign/v0/d <var-label>, <delayx>, <bit> (XXXX Old description
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* %assign/v0/d <var-label>, <delayx>, <bit> (XXXX Old description)
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* %assign/v0/e <var-label>, <bit> (XXXX Old description)
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* %assign/v0/e <var-label>, <bit> (XXXX Old description)
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The %assign/v0 instruction is a vector version of non-blocking
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The %assign/v0 instruction is a vector version of non-blocking
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@ -142,8 +142,8 @@ assignments. For blocking assignments, see %set/v.
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* %assign/vec4/d <var-label>, <delayx>
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* %assign/vec4/d <var-label>, <delayx>
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* %assign/vec4/e <var-label>
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* %assign/vec4/e <var-label>
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The %assign/vec4 instruction if a vec4 version of non-blocking
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The %assign/vec4 instruction is a vec4 version of non-blocking
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assignment, The <delay> is the number lf clock ticks in the future
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assignment. The <delay> is the number of clock ticks in the future
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where the assignment should schedule, and the value to assign is
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where the assignment should schedule, and the value to assign is
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pulled from the vec4 stack.
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pulled from the vec4 stack.
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@ -536,7 +536,7 @@ part comes from the width of the popped value, and the <off> is an
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index register that contains the canonical offset where the value
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index register that contains the canonical offset where the value
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sets written.
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sets written.
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The %foce/vec4/off instruction will test the value if flags[4], and if
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The %force/vec4/off instruction will test the value of flags[4], and if
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it is 1, will suppress the actual assignment. This is intended to help
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it is 1, will suppress the actual assignment. This is intended to help
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with detection of invalid index expressions.
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with detection of invalid index expressions.
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