Remove dead instructsion %set/qb and %set/qf / Kill some warnings.
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725ed869ba
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2acc9fbdee
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@ -186,8 +186,6 @@ extern bool of_RELEASE_REG(vthread_t thr, vvp_code_t code);
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extern bool of_RELEASE_WR(vthread_t thr, vvp_code_t code);
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extern bool of_RELEASE_WR(vthread_t thr, vvp_code_t code);
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extern bool of_REPLICATE(vthread_t thr, vvp_code_t code);
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extern bool of_REPLICATE(vthread_t thr, vvp_code_t code);
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extern bool of_SCOPY(vthread_t thr, vvp_code_t code);
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extern bool of_SCOPY(vthread_t thr, vvp_code_t code);
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extern bool of_SET_QB(vthread_t thr, vvp_code_t code);
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extern bool of_SET_QF(vthread_t thr, vvp_code_t code);
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extern bool of_SET_DAR_OBJ_REAL(vthread_t thr, vvp_code_t code);
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extern bool of_SET_DAR_OBJ_REAL(vthread_t thr, vvp_code_t code);
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extern bool of_SET_DAR_OBJ_STR(vthread_t thr, vvp_code_t code);
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extern bool of_SET_DAR_OBJ_STR(vthread_t thr, vvp_code_t code);
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extern bool of_SET_DAR_OBJ_VEC4(vthread_t thr, vvp_code_t code);
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extern bool of_SET_DAR_OBJ_VEC4(vthread_t thr, vvp_code_t code);
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@ -237,8 +237,6 @@ static const struct opcode_table_s opcode_table[] = {
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{ "%set/dar/obj/real",of_SET_DAR_OBJ_REAL,1,{OA_NUMBER,OA_NONE,OA_NONE} },
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{ "%set/dar/obj/real",of_SET_DAR_OBJ_REAL,1,{OA_NUMBER,OA_NONE,OA_NONE} },
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{ "%set/dar/obj/str", of_SET_DAR_OBJ_STR, 1,{OA_NUMBER,OA_NONE,OA_NONE} },
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{ "%set/dar/obj/str", of_SET_DAR_OBJ_STR, 1,{OA_NUMBER,OA_NONE,OA_NONE} },
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{ "%set/dar/obj/vec4",of_SET_DAR_OBJ_VEC4,1,{OA_NUMBER,OA_NONE,OA_NONE} },
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{ "%set/dar/obj/vec4",of_SET_DAR_OBJ_VEC4,1,{OA_NUMBER,OA_NONE,OA_NONE} },
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{ "%set/qb", of_SET_QB, 3, {OA_FUNC_PTR, OA_BIT1, OA_BIT2} },
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{ "%set/qf", of_SET_QF, 3, {OA_FUNC_PTR, OA_BIT1, OA_BIT2} },
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{ "%shiftl", of_SHIFTL, 1, {OA_NUMBER, OA_NONE, OA_NONE} },
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{ "%shiftl", of_SHIFTL, 1, {OA_NUMBER, OA_NONE, OA_NONE} },
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{ "%shiftr", of_SHIFTR, 1, {OA_NUMBER, OA_NONE, OA_NONE} },
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{ "%shiftr", of_SHIFTR, 1, {OA_NUMBER, OA_NONE, OA_NONE} },
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{ "%shiftr/s", of_SHIFTR_S, 1, {OA_NUMBER, OA_NONE, OA_NONE} },
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{ "%shiftr/s", of_SHIFTR_S, 1, {OA_NUMBER, OA_NONE, OA_NONE} },
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@ -531,48 +529,23 @@ bool vpi_handle_resolv_list_s::resolve(bool mes)
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{
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{
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symbol_value_t val = sym_get_value(sym_vpi, label());
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symbol_value_t val = sym_get_value(sym_vpi, label());
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if (!val.ptr) {
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if (!val.ptr) {
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// check for thread vector T<base,wid>
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// check for thread access symbols
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unsigned base, wid;
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unsigned base, wid;
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int n = 0;
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size_t n = 0;
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char ss[32];
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char ss[32];
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if (2 == sscanf(label(), "W<%u,%[r]>%n", &base, ss, &n)
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if (2 == sscanf(label(), "W<%u,%[r]>%zn", &base, ss, &n)
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&& n == strlen(label())) {
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&& n == strlen(label())) {
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val.ptr = vpip_make_vthr_word(base, ss);
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val.ptr = vpip_make_vthr_word(base, ss);
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sym_set_value(sym_vpi, label(), val);
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sym_set_value(sym_vpi, label(), val);
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#if 0
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// The T<...> forms are obsolete.
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} else if (2 <= sscanf(label(), "T<%u,%u>%n", &base, &wid, &n)
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&& n == strlen(label())) {
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val.ptr = vpip_make_vthr_vector(base, wid, false);
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sym_set_value(sym_vpi, label(), val);
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} else if (3 <= sscanf(label(), "T<%u,%u,%[su]>%n", &base,
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} else if (1 == sscanf(label(), "S<%u,str>%zn", &base, &n)
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&wid, ss, &n)
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&& n == (int)strlen(label())) {
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bool signed_flag = false;
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for (char*fp = ss ; *fp ; fp += 1) switch (*fp) {
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case 's':
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signed_flag = true;
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break;
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case 'u':
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signed_flag = false;
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break;
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default:
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break;
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}
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val.ptr = vpip_make_vthr_vector(base, wid, signed_flag);
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sym_set_value(sym_vpi, label(), val);
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#endif
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} else if (1 == sscanf(label(), "S<%u,str>%n", &base, &n)
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&& n == strlen(label())) {
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&& n == strlen(label())) {
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val.ptr = vpip_make_vthr_str_stack(base);
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val.ptr = vpip_make_vthr_str_stack(base);
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sym_set_value(sym_vpi, label(), val);
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sym_set_value(sym_vpi, label(), val);
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} else if (3 == sscanf(label(), "S<%u,vec4,%[su]%u>%n", &base, ss, &wid, &n)
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} else if (3 == sscanf(label(), "S<%u,vec4,%[su]%u>%zn", &base, ss, &wid, &n)
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&& n == strlen(label())) {
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&& n == strlen(label())) {
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bool signed_flag = false;
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bool signed_flag = false;
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118
vvp/vthread.cc
118
vvp/vthread.cc
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@ -308,11 +308,6 @@ struct __vpiScope* vthread_scope(struct vthread_s*thr)
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struct vthread_s*running_thread = 0;
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struct vthread_s*running_thread = 0;
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#if 0
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// this table maps the thread special index bit addresses to
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// vvp_bit4_t bit values.
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static vvp_bit4_t thr_index_to_bit4[4] = { BIT4_0, BIT4_1, BIT4_X, BIT4_Z };
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#endif
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void vthread_push_vec4(struct vthread_s*thr, const vvp_vector4_t&val)
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void vthread_push_vec4(struct vthread_s*thr, const vvp_vector4_t&val)
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{
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{
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@ -394,55 +389,6 @@ template <class T> T coerce_to_width(const T&that, unsigned width)
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/* Explicitly define the vvp_vector4_t version of coerce_to_width(). */
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/* Explicitly define the vvp_vector4_t version of coerce_to_width(). */
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template vvp_vector4_t coerce_to_width(const vvp_vector4_t&that,
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template vvp_vector4_t coerce_to_width(const vvp_vector4_t&that,
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unsigned width);
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unsigned width);
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#if 0
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static unsigned long* vector_to_array(struct vthread_s*thr,
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unsigned addr, unsigned wid)
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{
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if (addr == 0) {
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unsigned awid = (wid + CPU_WORD_BITS - 1) / (CPU_WORD_BITS);
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unsigned long*val = new unsigned long[awid];
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for (unsigned idx = 0 ; idx < awid ; idx += 1)
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val[idx] = 0;
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return val;
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}
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if (addr == 1) {
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unsigned awid = (wid + CPU_WORD_BITS - 1) / (CPU_WORD_BITS);
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unsigned long*val = new unsigned long[awid];
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for (unsigned idx = 0 ; idx < awid ; idx += 1)
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val[idx] = -1UL;
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wid -= (awid-1) * CPU_WORD_BITS;
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if (wid < CPU_WORD_BITS)
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val[awid-1] &= (-1UL) >> (CPU_WORD_BITS-wid);
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return val;
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}
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if (addr < 4)
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return 0;
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return thr->bits4.subarray(addr, wid);
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}
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#endif
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#if 0
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/*
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* This function gets from the thread a vector of bits starting from
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* the addressed location and for the specified width.
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*/
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static vvp_vector4_t vthread_bits_to_vector(struct vthread_s*thr,
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unsigned bit, unsigned wid)
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{
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/* Make a vector of the desired width. */
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if (bit >= 4) {
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return vvp_vector4_t(thr->bits4, bit, wid);
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} else {
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return vvp_vector4_t(wid, thr_index_to_bit4[bit]);
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}
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}
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#endif
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/*
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/*
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* Some of the instructions do wide addition to arrays of long. They
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* Some of the instructions do wide addition to arrays of long. They
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@ -4762,70 +4708,6 @@ bool of_SET_DAR_OBJ_VEC4(vthread_t thr, vvp_code_t cp)
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return true;
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return true;
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}
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}
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/*
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* %set/qb <var-label> <bit>, <wid>
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*/
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bool of_SET_QB(vthread_t /*thr*/, vvp_code_t /*cp*/)
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{
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#if 0
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unsigned bit = cp->bit_idx[0];
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unsigned wid = cp->bit_idx[1];
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/* Make a vector of the desired width. */
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vvp_vector4_t value = vthread_bits_to_vector(thr, bit, wid);
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vvp_net_t*net = cp->net;
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vvp_fun_signal_object*obj = dynamic_cast<vvp_fun_signal_object*> (net->fun);
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assert(obj);
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vvp_queue*dqueue = obj->get_object().peek<vvp_queue>();
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if (dqueue == 0) {
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assert(obj->get_object().test_nil());
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dqueue = new vvp_queue_vec4;
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vvp_object_t val (dqueue);
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vvp_net_ptr_t ptr (cp->net, 0);
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vvp_send_object(ptr, val, thr->wt_context);
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}
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assert(dqueue);
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dqueue->push_back(value);
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#else
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fprintf(stderr, "XXXX FORGOT TO IMPLEMENT %%set/qb\n");
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#endif
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return true;
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}
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/*
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* %set/qf <var-label> <bit>, <wid>
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*/
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bool of_SET_QF(vthread_t /*thr*/, vvp_code_t /*cp*/)
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{
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#if 0
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unsigned bit = cp->bit_idx[0];
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unsigned wid = cp->bit_idx[1];
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/* Make a vector of the desired width. */
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vvp_vector4_t value = vthread_bits_to_vector(thr, bit, wid);
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vvp_net_t*net = cp->net;
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vvp_fun_signal_object*obj = dynamic_cast<vvp_fun_signal_object*> (net->fun);
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assert(obj);
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vvp_queue*dqueue = obj->get_object().peek<vvp_queue>();
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if (dqueue == 0) {
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assert(obj->get_object().test_nil());
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dqueue = new vvp_queue_vec4;
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vvp_object_t val (dqueue);
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vvp_net_ptr_t ptr (cp->net, 0);
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vvp_send_object(ptr, val, thr->wt_context);
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}
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assert(dqueue);
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dqueue->push_front(value);
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#else
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fprintf(stderr, "XXXX FORGOT TO IMPLEMENT %%set/qf\n");
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#endif
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return true;
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}
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/*
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/*
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* %set/dar/obj/str <index>
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* %set/dar/obj/str <index>
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*/
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*/
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