Add complete list of VHDL reserved words

make_safe_name now makes sure a VHDL signal is never given a
name that conflicts with any reserved words. If it does, we
just prepend VL_.

(This code was already present, but the full list of reserved
words wasn't.)

tgt-vhdl/scope.cc

@@ -276,11 +276,24 @@ static string make_safe_name(ivl_signal_t sig)
    if (base[0] == '_')
       return string("VL") + base;
 
+   // This is the complete list of VHDL reserved words
    const char *vhdl_reserved[] = {
-      "in", "out", "entity", "architecture", "inout", "array",
-      "is", "not", "and", "or", "bus", "bit", "line", // Etc...
+      "abs", "access", "after", "alias", "all", "and", "architecture",
+      "array", "assert", "attribute", "begin", "block", "body", "buffer",
+      "bus", "case", "component", "configuration", "constant", "disconnect",
+      "downto", "else", "elsif", "end", "entity", "exit", "file", "for",
+      "function", "generate", "generic", "group", "guarded", "if", "impure",
+      "in", "inertial", "inout", "is", "label", "library", "linkage",
+      "literal", "loop", "map", "mod", "nand", "new", "next", "nor", "not",
+      "null", "of", "on", "open", "or", "others", "out", "package", "port",
+      "postponed", "procedure", "process", "pure", "range", "record", "register",
+      "reject", "rem", "report", "return", "rol", "ror", "select", "severity",
+      "signal", "shared", "sla", "sll", "sra", "srl", "subtype", "then", "to",
+      "transport", "type", "unaffected", "units", "until", "use", "variable",
+      "wait", "when", "while", "with", "xnor", "xor",
       NULL
    };
+
    for (const char **p = vhdl_reserved; *p != NULL; p++) {
       if (strcasecmp(*p, base) == 0) {
          return string("VL_") + base;