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Merge branch 'master' into verilog-ams
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@@ -2327,7 +2327,7 @@ NetNet* PEIdent::elaborate_net_array_(Design*des, NetScope*scope,
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} while (0);
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#else
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if (name_tail.index.size() > sig->array_dimensions())
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tmp = process_select_(des, scope, sig);
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tmp = process_select_(des, scope, tmp);
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#endif
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return tmp;
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