Cleanup the force SystemVerilog tests

This commit is contained in:
Cary R 2022-12-27 16:28:23 -08:00
parent 8a0f395c76
commit 18f8e00f9f
2 changed files with 71 additions and 67 deletions

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@ -0,0 +1,5 @@
warning: Found both default and explicit timescale based delays. Use
: -Wtimescale to find the design element(s) with no explicit
: timescale.
The time in w_time is: 1.000000e-09
The time in wo_time is: 1.000000e+00

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@ -68,7 +68,6 @@
# #
# Some constructs/usage are not errors in SystemVerilog # Some constructs/usage are not errors in SystemVerilog
br1015a normal ivltests
br1027a normal ivltests gold=br1027a-fsv.gold br1027a normal ivltests gold=br1027a-fsv.gold
br1027c normal ivltests gold=br1027c-fsv.gold br1027c normal ivltests gold=br1027c-fsv.gold
br1027e normal ivltests gold=br1027e-fsv.gold br1027e normal ivltests gold=br1027e-fsv.gold
@ -78,7 +77,7 @@ br_gh567 normal ivltests
check_constant_3 normal ivltests check_constant_3 normal ivltests
function4 normal ivltests function4 normal ivltests
module_inout_port_type normal ivltests module_inout_port_type normal ivltests
module_input_port_list_def normal,-g2005-sv ivltests module_input_port_list_def normal ivltests
module_input_port_type normal ivltests module_input_port_type normal ivltests
parameter_in_generate1 normal ivltests parameter_in_generate1 normal ivltests
parameter_no_default normal ivltests parameter_no_default normal ivltests
@ -111,32 +110,32 @@ memsynth7 normal ivltests
memsynth9 normal ivltests memsynth9 normal ivltests
mix_reset normal ivltests mix_reset normal ivltests
# These use $abstime() and will actually run correctly with -g2012 (different # These use $abstime() and produce different results when run
# results), but since this file is loaded in sv-tests mark them as NI instead # using SytemVerilog
# of creating the correct gold file pr2590274a normal ivltests gold=pr2590274-fsv.gold
pr2590274a NI ivltests pr2590274b normal ivltests gold=pr2590274-fsv.gold
pr2590274b NI ivltests pr2590274c normal,-gspecify ivltests gold=pr2590274-fsv.gold
pr2590274c NI ivltests
# These are not supported in Icarus, but are valid SystemVerilog # These are not supported in Icarus, but are valid SystemVerilog
array_lval_select3a normal ivltests array_lval_select3a NI ivltests
br605a normal ivltests br605a NI ivltests
br605b normal ivltests br605b NI ivltests
br971 normal ivltests br971 NI ivltests
br1005 normal ivltests br1005 NI ivltests
br1015b normal ivltests br1015a NI ivltests
br_ml20150315b normal ivltests br1015b NI ivltests
sv_darray_nest1 normal ivltests br_ml20150315b NI ivltests
sv_darray_nest2 normal ivltests sv_darray_nest1 NI ivltests
sv_darray_nest3 normal ivltests sv_darray_nest2 NI ivltests
sv_darray_nest4 normal ivltests sv_darray_nest3 NI ivltests
sv_darray_oob_vec2 normal ivltests sv_darray_nest4 NI ivltests
sv_deferred_assert1 normal ivltests sv_darray_oob_vec2 NI ivltests
sv_deferred_assert2 normal ivltests sv_deferred_assert1 NI ivltests
sv_deferred_assume1 normal ivltests sv_deferred_assert2 NI ivltests
sv_deferred_assume2 normal ivltests sv_deferred_assume1 NI ivltests
sv_queue_nest1 normal ivltests sv_deferred_assume2 NI ivltests
sv_queue_nest2 normal ivltests sv_queue_nest1 NI ivltests
sv_queue_nest3 normal ivltests sv_queue_nest2 NI ivltests
sv_queue_nest4 normal ivltests sv_queue_nest3 NI ivltests
sv_queue_oob_vec2 normal ivltests sv_queue_nest4 NI ivltests
sv_queue_oob_vec2 NI ivltests