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Merge branch 'master' into work2 

Conflicts:
	elab_scope.cc
	net_nex_input.cc
	t-dll-api.cc
	vvp/parse.y
This commit is contained in:
Stephen Williams 2010-11-28 08:38:40 -08:00
parent 8aa2ba8339 13b8dcc0b1
commit 16e1570737
123 changed files with 1482 additions and 1031 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
HName.h
View File

@ -1,7 +1,7 @@
#ifndef __HName_H
#define __HName_H
/*
* Copyright (c) 2001-2008 Stephen Williams (steve@icarus.com)
* Copyright (c) 2001-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@ -94,10 +94,10 @@ inline ostream& operator<< (ostream&out, const list<hname_t>&ll)
{
list<hname_t>::const_iterator cur = ll.begin();
out << *cur;
cur ++;
++ cur;
while (cur != ll.end()) {
out << "." << *cur;
cur ++;
++ cur;
}
return out;
}

11
Makefile.in
View File

@ -83,7 +83,8 @@ INCLUDE_PATH = -I. -I$(srcdir)
endif
CPPFLAGS = @DEFS@ $(INCLUDE_PATH) @CPPFLAGS@
CXXFLAGS = @WARNING_FLAGS@ @CXXFLAGS@
CFLAGS = @WARNING_FLAGS@ @CFLAGS@
CXXFLAGS = @WARNING_FLAGS@ @WARNING_FLAGS_CXX@ @CXXFLAGS@
PICFLAGS = @PICFLAG@
LDFLAGS = @rdynamic@ @LDFLAGS@
@ -157,12 +158,13 @@ endif
rm -rf autom4te.cache
cppcheck: $(O:.o=.cc) $(srcdir)/dosify.c $(srcdir)/version.c
cppcheck --enable=all -f $(INCLUDE_PATH) $^
cppcheck --enable=all -f --suppressions $(srcdir)/cppcheck.sup \
$(INCLUDE_PATH) $^
cppcheck-all:
$(foreach dir,$(SUBDIRS),$(MAKE) -C $(dir) cppcheck && ) true
$(foreach dir,$(NOTUSED),$(MAKE) -C $(dir) cppcheck && ) true
cppcheck
$(MAKE) cppcheck
Makefile: $(srcdir)/Makefile.in config.status
./config.status --file=$@
@ -210,7 +212,8 @@ iverilog-vpi: $(srcdir)/iverilog-vpi.sh Makefile
-e 's;@SUFFIX@;$(suffix);' \
-e 's;@IVCC@;$(CC);' \
-e 's;@IVCXX@;$(CXX);' \
-e 's;@IVCFLAGS@;$(CXXFLAGS);' \
-e 's;@IVCFLAGS@;$(CFLAGS);' \
-e 's;@IVCXXFLAGS@;$(CXXFLAGS);' \
-e 's;@INCLUDEDIR@;$(includedir);' \
-e 's;@LIBDIR@;@libdir@;' $< > $@
chmod +x $@

3
Module.cc
View File

@ -93,8 +93,7 @@ unsigned Module::find_port(const char*name) const
PGate* Module::get_gate(perm_string name)
{
for (list<PGate*>::iterator cur = gates_.begin()
; cur != gates_.end()
; cur ++ ) {
; cur != gates_.end() ; ++ cur ) {
if ((*cur)->get_name() == name)
return *cur;

11
PExpr.cc
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 1998-2008,2010 Stephen Williams <steve@icarus.com>
* Copyright (c) 1998-2010 Stephen Williams <steve@icarus.com>
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@ -39,7 +39,7 @@ PExpr::~PExpr()
{
}
void PExpr::declare_implicit_nets(LexicalScope*scope, NetNet::Type type)
void PExpr::declare_implicit_nets(LexicalScope*, NetNet::Type)
{
}
@ -53,14 +53,15 @@ bool PExpr::is_the_same(const PExpr*that) const
return typeid(this) == typeid(that);
}
NetNet* PExpr::elaborate_lnet(Design*des, NetScope*) const
NetNet* PExpr::elaborate_lnet(Design*, NetScope*) const
{
cerr << get_fileline() << ": error: expression not valid in assign l-value: "
cerr << get_fileline() << ": error: "
<< "expression not valid in assign l-value: "
<< *this << endl;
return 0;
}
NetNet* PExpr::elaborate_bi_net(Design*des, NetScope*) const
NetNet* PExpr::elaborate_bi_net(Design*, NetScope*) const
{
cerr << get_fileline() << ": error: "
<< "expression not valid as argument to inout port: "

3
PGate.h
View File

@ -241,7 +241,10 @@ class PGModule : public PGate {
void elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const;
void elaborate_scope_mod_instances_(Design*des, Module*mod, NetScope*sc) const;
bool elaborate_sig_mod_(Design*des, NetScope*scope, Module*mod) const;
// Not currently used.
#if 0
bool elaborate_sig_udp_(Design*des, NetScope*scope, PUdp*udp) const;
#endif
NetNet*resize_net_to_port_(Design*des, NetScope*scope,
NetNet*sig, unsigned port_wid,

2
StringHeap.cc
View File

@ -18,10 +18,10 @@
*/
# include "StringHeap.h"
# include "ivl_alloc.h"
# include <cstdlib>
# include <cstring>
# include <cassert>
# include "ivl_alloc.h"
#ifdef CHECK_WITH_VALGRIND
static char **string_pool = NULL;

2
cadpli/cadpli.c
View File

@ -17,7 +17,6 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
# include "ivl_alloc.h"
# include <vpi_user.h>
# include <veriuser.h>
# include <stdlib.h>
@ -25,6 +24,7 @@
# include <assert.h>
# include "config.h"
# include "ivl_dlfcn.h"
# include "ivl_alloc.h"
typedef void* (*funcvp)(void);

11
configure.in
View File

@ -69,9 +69,18 @@ AC_SUBST(DEPENDENCY_FLAG, [-xMMD])
AC_SUBST(WARNING_FLAGS, [""])
AC_SUBST(WARNING_FLAGS_CXX, [""])
else
# Check to see if -Wextra is supported.
iverilog_temp_cflags="$CFLAGS"
CFLAGS="-Wextra $CFLAGS"
AC_MSG_CHECKING(if gcc supports -Wextra)
AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[]], [[]])],
[[iverilog_wextra_flag="-Wextra";] AC_MSG_RESULT(yes)],
[[iverilog_wextra_flag="-W";] AC_MSG_RESULT(no)])
CFLAGS="$iverilog_temp_cflags"
AC_SUBST(DEPENDENCY_FLAG, [-MD])
AC_SUBST(WARNING_FLAGS, ["-Wall -Wshadow"])
AC_SUBST(WARNING_FLAGS_CXX, ["-Wextra"])
AC_SUBST(WARNING_FLAGS_CXX, ["$iverilog_wextra_flag"])
fi
AC_LANG(C++)

3
cppcheck.sup Normal file
View File

@ -0,0 +1,3 @@
// These are correct and are used to find the base (zero) pin.
thisSubtraction:netlist.h:4119
thisSubtraction:netlist.h:4128

14
cprop.cc
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 1998-2009 Stephen Williams (steve@icarus.com)
* Copyright (c) 1998-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@ -48,11 +48,11 @@ struct cprop_functor : public functor_t {
virtual void lpm_mux(Design*des, NetMux*obj);
};
void cprop_functor::signal(Design*des, NetNet*obj)
void cprop_functor::signal(Design*, NetNet*)
{
}
void cprop_functor::lpm_add_sub(Design*des, NetAddSub*obj)
void cprop_functor::lpm_add_sub(Design*, NetAddSub*)
{
}
@ -70,11 +70,11 @@ void cprop_functor::lpm_compare(Design*des, NetCompare*obj)
}
}
void cprop_functor::lpm_compare_eq_(Design*des, NetCompare*obj)
void cprop_functor::lpm_compare_eq_(Design*, NetCompare*)
{
}
void cprop_functor::lpm_ff(Design*des, NetFF*obj)
void cprop_functor::lpm_ff(Design*, NetFF*obj)
{
// Look for and count unlinked FF outputs. Note that if the
// Data and Q pins are connected together, they can be removed
@ -91,7 +91,7 @@ void cprop_functor::lpm_ff(Design*des, NetFF*obj)
}
}
void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
void cprop_functor::lpm_logic(Design*, NetLogic*)
{
}
@ -167,7 +167,7 @@ struct nexus_info_s {
unsigned out;
};
void cprop_dc_functor::lpm_const(Design*des, NetConst*obj)
void cprop_dc_functor::lpm_const(Design*, NetConst*obj)
{
// 'bz constant values drive high impedance to whatever is
// connected to it. In other words, it is a noop. But that is

23
design_dump.cc
View File

@ -1115,7 +1115,7 @@ void NetScope::dump(ostream&o) const
{
map<perm_string,param_expr_t>::const_iterator pp;
for (pp = parameters.begin()
; pp != parameters.end() ; pp ++) {
; pp != parameters.end() ; ++ pp ) {
o << " parameter ";
o << pp->second.type << " ";
@ -1165,7 +1165,7 @@ void NetScope::dump(ostream&o) const
}
for (pp = localparams.begin()
; pp != localparams.end() ; pp ++) {
; pp != localparams.end() ; ++ pp ) {
o << " localparam " << (*pp).first << " = " <<
*(*pp).second.expr << ";" << endl;
}
@ -1175,7 +1175,7 @@ void NetScope::dump(ostream&o) const
{
list<pair<pform_name_t,NetExpr*> >::const_iterator pp;
for (pp = defparams.begin()
; pp != defparams.end() ; pp ++ ) {
; pp != defparams.end() ; ++ pp ) {
o << " defparam " << (*pp).first << " = " <<
*(*pp).second << ";" << endl;
}
@ -1184,7 +1184,7 @@ void NetScope::dump(ostream&o) const
{
list<pair<list<hname_t>,NetExpr*> >::const_iterator pp;
for (pp = defparams_later.begin()
; pp != defparams_later.end() ; pp ++ ) {
; pp != defparams_later.end() ; ++ pp ) {
o << " defparam(later) " << pp->first << " = " <<
*(pp->second) << ";" << endl;
}
@ -1223,7 +1223,7 @@ void NetScope::dump(ostream&o) const
// Dump specparams
typedef map<perm_string,spec_val_t>::const_iterator specparam_it_t;
for (specparam_it_t cur = specparams.begin()
; cur != specparams.end() ; cur ++ ) {
; cur != specparams.end() ; ++ cur ) {
o << " specparam " << (*cur).first
<< " = ";
spec_val_t value = (*cur).second;
@ -1260,7 +1260,7 @@ void NetScope::dump(ostream&o) const
/* Dump any sub-scopes. */
for (map<hname_t,NetScope*>::const_iterator cur = children_.begin()
; cur != children_.end() ; cur ++)
; cur != children_.end() ; ++ cur )
cur->second->dump(o);
}
@ -1345,6 +1345,9 @@ void NetEBinary::dump(ostream&o) const
case 'a':
o << "&&";
break;
case 'A':
o << "~&";
break;
case 'E':
o << "===";
break;
@ -1530,12 +1533,18 @@ void NetEUFunc::dump(ostream&o) const
void NetEUnary::dump(ostream&o) const
{
switch (op_) {
case 'A':
o << "~&";
break;
case 'm':
o << "abs";
break;
case 'N':
o << "~|";
break;
case 'X':
o << "~^";
break;
default:
o << op_;
break;
@ -1550,7 +1559,7 @@ void Design::dump(ostream&o) const
o << "DESIGN TIME PRECISION: 10e" << get_precision() << endl;
o << "SCOPES:" << endl;
for (list<NetScope*>::const_iterator scope = root_scopes_.begin();
scope != root_scopes_.end(); scope++)
scope != root_scopes_.end(); ++ scope )
(*scope)->dump(o);
o << "ELABORATED NODES:" << endl;

11
driver/main.c
View File

@ -50,7 +50,6 @@ const char HELP[] =
#define MAXSIZE 4096
#include "ivl_alloc.h"
#include <stdio.h>
#include <unistd.h>
#include <stdlib.h>
@ -64,11 +63,13 @@ const char HELP[] =
#endif
#ifdef __MINGW32__
#include <windows.h>
# include <windows.h>
# include <io.h>
#ifdef HAVE_LIBIBERTY_H
#include <libiberty.h>
# include <libiberty.h>
#endif
#endif
#include <fcntl.h>
#if HAVE_GETOPT_H
#include <getopt.h>
@ -94,6 +95,7 @@ extern const char*optarg;
# include "globals.h"
#include "cfparse_misc.h" /* cfparse() */
#include "ivl_alloc.h"
#ifdef __MINGW32__
const char sep = '\\';
@ -211,8 +213,6 @@ char *get_cmd_file()
}
#ifdef __MINGW32__
# include <io.h>
# include <fcntl.h>
static FILE*fopen_safe(const char*path)
{
FILE*file = 0;
@ -225,7 +225,6 @@ static FILE*fopen_safe(const char*path)
return file;
}
#else
# include <fcntl.h>
static FILE*fopen_safe(const char*path)
{
FILE*file = 0;

2
driver/substit.c
View File

@ -17,10 +17,10 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
# include "ivl_alloc.h"
# include <string.h>
# include <stdlib.h>
# include <stdio.h>
# include "ivl_alloc.h"
char* substitutions(const char*str)

79
elab_expr.cc
View File

@ -129,8 +129,8 @@ NetExpr* elaborate_rval_expr(Design*des, NetScope*scope,
* The default behavior for the test_width method is to just return the
* minimum width that is passed in.
*/
unsigned PExpr::test_width(Design*des, NetScope*scope,
unsigned min, unsigned lval,
unsigned PExpr::test_width(Design*, NetScope*,
unsigned min, unsigned,
ivl_variable_type_t&, bool&)
{
if (debug_elaborate) {
@ -228,9 +228,12 @@ unsigned PEBinary::test_width(Design*des, NetScope*scope,
break;
}
if (type_is_vectorable(expr_type_))
if (type_is_vectorable(expr_type_)) {
// We don't use (need?) lval so make sure the minimum width
// is greater than or equal to the the L-value width.
assert(min >= lval);
expr_width_ = min;
else
} else
expr_width_ = 1;
expr_type__ = expr_type_;
@ -449,7 +452,7 @@ NetExpr* PEBinary::elaborate_expr_base_bits_(Design*des,
NetExpr* PEBinary::elaborate_expr_base_div_(Design*des,
NetExpr*lp, NetExpr*rp,
int expr_wid, bool is_pexpr) const
int expr_wid, bool) const
{
/* The % operator does not support real arguments in
baseline Verilog. But we allow it in our extended
@ -739,7 +742,7 @@ NetExpr* PEBinary::elaborate_expr_base_rshift_(Design*des,
return tmp;
}
NetExpr* PEBinary::elaborate_expr_base_mult_(Design*des,
NetExpr* PEBinary::elaborate_expr_base_mult_(Design*,
NetExpr*lp, NetExpr*rp,
int expr_wid, bool is_pexpr) const
{
@ -802,7 +805,7 @@ NetExpr* PEBinary::elaborate_expr_base_mult_(Design*des,
return tmp;
}
NetExpr* PEBinary::elaborate_expr_base_add_(Design*des,
NetExpr* PEBinary::elaborate_expr_base_add_(Design*,
NetExpr*lp, NetExpr*rp,
int expr_wid, bool is_pexpr) const
{
@ -890,7 +893,7 @@ unsigned PEBComp::test_width(Design*des, NetScope*scope, unsigned, unsigned,
}
NetExpr* PEBComp::elaborate_expr(Design*des, NetScope*scope,
int expr_width_dummy, bool sys_task_arg) const
int, bool) const
{
assert(left_);
assert(right_);
@ -945,10 +948,10 @@ NetExpr* PEBComp::elaborate_expr(Design*des, NetScope*scope,
return tmp;
}
unsigned PEBLogic::test_width(Design*des, NetScope*scope,
unsigned min, unsigned lval,
unsigned PEBLogic::test_width(Design*, NetScope*,
unsigned, unsigned,
ivl_variable_type_t&expr_type_out,
bool&unsized_flag)
bool&)
{
expr_type_ = IVL_VT_LOGIC;
expr_width_ = 1;
@ -957,7 +960,7 @@ unsigned PEBLogic::test_width(Design*des, NetScope*scope,
}
NetExpr*PEBLogic::elaborate_expr(Design*des, NetScope*scope,
int expr_width_dummp, bool sys_task_arg) const
int, bool) const
{
assert(left_);
assert(right_);
@ -1040,7 +1043,7 @@ unsigned PEBLeftWidth::test_width(Design*des, NetScope*scope,
}
NetExpr*PEBLeftWidth::elaborate_expr(Design*des, NetScope*scope,
int expr_wid, bool sys_task_arg) const
int expr_wid, bool) const
{
assert(left_);
assert(right_);
@ -1067,7 +1070,7 @@ NetExpr*PEBLeftWidth::elaborate_expr(Design*des, NetScope*scope,
return elaborate_expr_leaf(des, lp, rp, expr_wid);
}
NetExpr*PEBPower::elaborate_expr_leaf(Design*des, NetExpr*lp, NetExpr*rp,
NetExpr*PEBPower::elaborate_expr_leaf(Design*, NetExpr*lp, NetExpr*rp,
int expr_wid) const
{
if (debug_elaborate) {
@ -1131,6 +1134,9 @@ unsigned PECallFunction::test_width_sfunc_(Design*des, NetScope*scope,
<< " argument width = " << expr_width_
<< ", result width = " << min << "." << endl;
// We don't use (need?) lval so make sure the minimum width
// is greater than or equal to the the L-value width.
assert(min >= lval);
return min;
}
@ -1612,7 +1618,7 @@ NetExpr* PECallFunction::elaborate_expr(Design*des, NetScope*scope,
}
unsigned PEConcat::test_width(Design*des, NetScope*scope,
unsigned min, unsigned lval,
unsigned, unsigned,
ivl_variable_type_t&expr_type__,
bool&unsized_flag)
{
@ -1809,8 +1815,8 @@ NetExpr* PEConcat::elaborate_expr(Design*des, NetScope*scope,
*
* Absent any better idea, we call all real valued results a width of 1.
*/
unsigned PEFNumber::test_width(Design*des, NetScope*scope,
unsigned min, unsigned lval,
unsigned PEFNumber::test_width(Design*, NetScope*,
unsigned, unsigned,
ivl_variable_type_t&expr_type__,
bool&unsized_flag)
{
@ -1822,7 +1828,7 @@ unsigned PEFNumber::test_width(Design*des, NetScope*scope,
return 1;
}
NetExpr* PEFNumber::elaborate_expr(Design*des, NetScope*scope, int, bool) const
NetExpr* PEFNumber::elaborate_expr(Design*, NetScope*, int, bool) const
{
NetECReal*tmp = new NetECReal(*value_);
tmp->set_line(*this);
@ -1955,7 +1961,7 @@ NetExpr* PEIdent::calculate_up_do_base_(Design*des, NetScope*scope) const
return tmp;
}
bool PEIdent::calculate_param_range_(Design*des, NetScope*scope,
bool PEIdent::calculate_param_range_(Design*, NetScope*,
const NetExpr*par_msb, long&par_msv,
const NetExpr*par_lsb, long&par_lsv,
long length) const
@ -1986,7 +1992,7 @@ static void probe_index_expr_width(Design*des, NetScope*scope,
const name_component_t&name)
{
for (list<index_component_t>::const_iterator cur = name.index.begin()
; cur != name.index.end() ; cur ++) {
; cur != name.index.end() ; ++ cur ) {
if (cur->msb)
probe_expr_width(des, scope, cur->msb);
@ -2107,7 +2113,7 @@ unsigned PEIdent::test_width(Design*des, NetScope*scope,
// This is a parameter. If it is sized (meaning it was
// declared with range expressions) then the range
// expressions would have been caught above. So if we
// got there there we know this is an unsized constant.
// got here then we know this is an unsized constant.
expr_width_ = par->expr_width();
unsized_flag = true;
return expr_width_;
@ -2118,6 +2124,10 @@ unsigned PEIdent::test_width(Design*des, NetScope*scope,
expr_type_ = IVL_VT_NO_TYPE;
expr_width_ = min;
// We don't use (need?) lval so make sure the minimum width
// is greater than or equal to the the L-value width.
assert(min >= lval);
expr_type__ = expr_type_;
return min;
}
@ -2387,7 +2397,7 @@ static verinum param_part_select_bits(const verinum&par_val, long wid,
NetExpr* PEIdent::elaborate_expr_param_part_(Design*des, NetScope*scope,
const NetExpr*par,
NetScope*found_in,
NetScope*,
const NetExpr*par_msb,
const NetExpr*par_lsb) const
{
@ -2511,7 +2521,7 @@ static void warn_param_ob(long par_msv, long par_lsv, bool defined,
NetExpr* PEIdent::elaborate_expr_param_idx_up_(Design*des, NetScope*scope,
const NetExpr*par,
NetScope*found_in,
NetScope*,
const NetExpr*par_msb,
const NetExpr*par_lsb) const
{
@ -2590,7 +2600,7 @@ NetExpr* PEIdent::elaborate_expr_param_idx_up_(Design*des, NetScope*scope,
NetExpr* PEIdent::elaborate_expr_param_idx_do_(Design*des, NetScope*scope,
const NetExpr*par,
NetScope*found_in,
NetScope*,
const NetExpr*par_msb,
const NetExpr*par_lsb) const
{
@ -2994,7 +3004,7 @@ NetExpr* PEIdent::elaborate_expr_net_word_(Design*des, NetScope*scope,
* Handle part selects of NetNet identifiers.
*/
NetExpr* PEIdent::elaborate_expr_net_part_(Design*des, NetScope*scope,
NetESignal*net, NetScope*found_in) const
NetESignal*net, NetScope*) const
{
long msv, lsv;
bool parts_defined_flag;
@ -3099,7 +3109,7 @@ NetExpr* PEIdent::elaborate_expr_net_part_(Design*des, NetScope*scope,
* Part select indexed up, i.e. net[<m> +: <l>]
*/
NetExpr* PEIdent::elaborate_expr_net_idx_up_(Design*des, NetScope*scope,
NetESignal*net, NetScope*found_in) const
NetESignal*net, NetScope*) const
{
NetExpr*base = calculate_up_do_base_(des, scope);
@ -3187,7 +3197,7 @@ NetExpr* PEIdent::elaborate_expr_net_idx_up_(Design*des, NetScope*scope,
* Part select indexed down, i.e. net[<m> -: <l>]
*/
NetExpr* PEIdent::elaborate_expr_net_idx_do_(Design*des, NetScope*scope,
NetESignal*net, NetScope*found_in)const
NetESignal*net, NetScope*)const
{
NetExpr*base = calculate_up_do_base_(des, scope);
@ -3271,7 +3281,7 @@ NetExpr* PEIdent::elaborate_expr_net_idx_do_(Design*des, NetScope*scope,
}
NetExpr* PEIdent::elaborate_expr_net_bit_(Design*des, NetScope*scope,
NetESignal*net, NetScope*found_in) const
NetESignal*net, NetScope*) const
{
const name_component_t&name_tail = path_.back();
ivl_assert(*this, !name_tail.index.empty());
@ -3439,7 +3449,7 @@ unsigned PENumber::test_width(Design*, NetScope*,
return use_wid;
}
NetEConst* PENumber::elaborate_expr(Design*des, NetScope*,
NetEConst* PENumber::elaborate_expr(Design*, NetScope*,
int expr_width__, bool) const
{
assert(value_);
@ -3463,10 +3473,10 @@ NetEConst* PENumber::elaborate_expr(Design*des, NetScope*,
return tmp;
}
unsigned PEString::test_width(Design*des, NetScope*scope,
unsigned PEString::test_width(Design*, NetScope*,
unsigned min, unsigned lval,
ivl_variable_type_t&expr_type__,
bool&unsized_flag)
bool&)
{
expr_type_ = IVL_VT_BOOL;
expr_width_ = text_? 8*strlen(text_) : 0;
@ -3474,11 +3484,14 @@ unsigned PEString::test_width(Design*des, NetScope*scope,
expr_width_ = min;
expr_type__ = expr_type_;
// We don't use (need?) lval so make sure the minimum width
// is greater than or equal to the the L-value width.
assert(expr_width_ >= lval);
return expr_width_;
}
NetEConst* PEString::elaborate_expr(Design*des, NetScope*,
int expr_width_dummy, bool) const
NetEConst* PEString::elaborate_expr(Design*, NetScope*,
int, bool) const
{
NetEConst*tmp = new NetEConst(value());
tmp->set_line(*this);

4
elab_lval.cc
View File

@ -66,9 +66,7 @@
* is to try to make a net elaboration, and see if the result is
* suitable for assignment.
*/
NetAssign_* PExpr::elaborate_lval(Design*des,
NetScope*scope,
bool is_force) const
NetAssign_* PExpr::elaborate_lval(Design*, NetScope*, bool) const
{
NetNet*ll = 0;
if (ll == 0) {

3
elab_pexpr.cc
View File

@ -28,7 +28,7 @@
# include <iostream>
# include "ivl_assert.h"
NetExpr*PExpr::elaborate_pexpr(Design*des, NetScope*sc) const
NetExpr*PExpr::elaborate_pexpr(Design*des, NetScope*) const
{
cerr << get_fileline() << ": error: invalid parameter expression: "
<< *this << endl;
@ -220,6 +220,7 @@ NetExpr*PEIdent::elaborate_pexpr(Design*des, NetScope*scope) const
list<hname_t> tmp = eval_scope_path(des, scope, oldpath);
pscope = des->find_scope(scope, tmp);
}
ivl_assert(*this, pscope);
const NetExpr*ex_msb;
const NetExpr*ex_lsb;

52
elab_scope.cc
View File

@ -54,7 +54,7 @@ static void collect_scope_parameters_(NetScope*scope,
const map<perm_string,LexicalScope::param_expr_t>&parameters)
{
for (mparm_it_t cur = parameters.begin()
; cur != parameters.end() ; cur ++) {
; cur != parameters.end() ; ++ cur ) {
NetEParam*tmp = new NetEParam;
tmp->set_line(*((*cur).second.expr));
@ -69,7 +69,7 @@ static void collect_scope_localparams_(NetScope*scope,
const map<perm_string,LexicalScope::param_expr_t>&localparams)
{
for (mparm_it_t cur = localparams.begin()
; cur != localparams.end() ; cur ++) {
; cur != localparams.end() ; ++ cur ) {
NetEParam*tmp = new NetEParam;
tmp->set_line(*((*cur).second.expr));
@ -173,7 +173,7 @@ static void elaborate_scope_parameters_(Design*des, NetScope*scope,
const map<perm_string,LexicalScope::param_expr_t>&parameters)
{
for (mparm_it_t cur = parameters.begin()
; cur != parameters.end() ; cur ++) {
; cur != parameters.end() ; ++ cur ) {
// A parameter can not have the same name as a genvar.
if (scope->find_genvar((*cur).first)) {
@ -192,7 +192,7 @@ static void elaborate_scope_localparams_(Design*des, NetScope*scope,
const map<perm_string,LexicalScope::param_expr_t>&localparams)
{
for (mparm_it_t cur = localparams.begin()
; cur != localparams.end() ; cur ++) {
; cur != localparams.end() ; ++ cur ) {
// A localparam can not have the same name as a genvar.
if (scope->find_genvar((*cur).first)) {
@ -293,7 +293,7 @@ static void replace_scope_parameters_(NetScope*scope, const LineInfo&loc,
const Module::replace_t&replacements)
{
for (Module::replace_t::const_iterator cur = replacements.begin()
; cur != replacements.end() ; cur ++) {
; cur != replacements.end() ; ++ cur ) {
NetExpr*val = (*cur).second;
if (val == 0) {
@ -323,20 +323,19 @@ static void elaborate_scope_events_(Design*des, NetScope*scope,
const map<perm_string,PEvent*>&events)
{
for (map<perm_string,PEvent*>::const_iterator et = events.begin()
; et != events.end() ; et ++ ) {
; et != events.end() ; ++ et ) {
(*et).second->elaborate_scope(des, scope);
}
}
static void elaborate_scope_tasks(Design*des, NetScope*scope,
const LineInfo&loc,
const map<perm_string,PTask*>&tasks)
{
typedef map<perm_string,PTask*>::const_iterator tasks_it_t;
for (tasks_it_t cur = tasks.begin()
; cur != tasks.end() ; cur ++ ) {
; cur != tasks.end() ; ++ cur ) {
hname_t use_name( (*cur).first );
// A task can not have the same name as another scope object.
@ -385,13 +384,12 @@ static void elaborate_scope_tasks(Design*des, NetScope*scope,
}
static void elaborate_scope_funcs(Design*des, NetScope*scope,
const LineInfo&loc,
const map<perm_string,PFunction*>&funcs)
{
typedef map<perm_string,PFunction*>::const_iterator funcs_it_t;
for (funcs_it_t cur = funcs.begin()
; cur != funcs.end() ; cur ++ ) {
; cur != funcs.end() ; ++ cur ) {
hname_t use_name( (*cur).first );
// A function can not have the same name as another scope object.
@ -459,7 +457,7 @@ class generate_schemes_work_item_t : public elaborator_work_item_t {
// elaboration.
typedef list<PGenerate*>::const_iterator generate_it_t;
for (generate_it_t cur = mod_->generate_schemes.begin()
; cur != mod_->generate_schemes.end() ; cur ++ ) {
; cur != mod_->generate_schemes.end() ; ++ cur ) {
(*cur) -> generate_scope(des, scope_);
}
}
@ -482,7 +480,7 @@ bool Module::elaborate_scope(Design*des, NetScope*scope,
// Add the genvars to the scope.
typedef map<perm_string,LineInfo*>::const_iterator genvar_it_t;
for (genvar_it_t cur = genvars.begin(); cur != genvars.end(); cur++ ) {
for (genvar_it_t cur = genvars.begin(); cur != genvars.end(); ++ cur ) {
scope->add_genvar((*cur).first, (*cur).second);
}
@ -531,7 +529,7 @@ bool Module::elaborate_scope(Design*des, NetScope*scope,
typedef list<Module::named_expr_t>::const_iterator defparms_iter_t;
for (defparms_iter_t cur = defparms.begin()
; cur != defparms.end() ; cur ++) {
; cur != defparms.end() ; ++ cur ) {
PExpr*ex = cur->second;
assert(ex);
@ -567,21 +565,21 @@ bool Module::elaborate_scope(Design*des, NetScope*scope,
// elaborate_scope method of the PTask for detailed
// processing.
elaborate_scope_tasks(des, scope, *this, tasks);
elaborate_scope_tasks(des, scope, tasks);
// Functions are very similar to tasks, at least from the
// perspective of scopes. So handle them exactly the same
// way.
elaborate_scope_funcs(des, scope, *this, funcs);
elaborate_scope_funcs(des, scope, funcs);
// Gates include modules, which might introduce new scopes, so
// scan all of them to create those scopes.
typedef list<PGate*>::const_iterator gates_it_t;
for (gates_it_t cur = gates_.begin()
; cur != gates_.end() ; cur ++ ) {
; cur != gates_.end() ; ++ cur ) {
(*cur) -> elaborate_scope(des, scope);
}
@ -594,7 +592,7 @@ bool Module::elaborate_scope(Design*des, NetScope*scope,
typedef list<PProcess*>::const_iterator proc_it_t;
for (proc_it_t cur = behaviors.begin()
; cur != behaviors.end() ; cur ++ ) {
; cur != behaviors.end() ; ++ cur ) {
(*cur) -> statement() -> elaborate_scope(des, scope);
}
@ -934,7 +932,7 @@ bool PGenerate::generate_scope_case_(Design*des, NetScope*container)
// Detect that the item is a default.
if (item->item_test.size() == 0) {
default_item = item;
cur ++;
++ cur;
continue;
}
@ -966,7 +964,7 @@ bool PGenerate::generate_scope_case_(Design*des, NetScope*container)
if (match_flag)
break;
cur ++;
++ cur;
}
delete case_value_co;
@ -1102,7 +1100,7 @@ void PGenerate::elaborate_subscope_direct_(Design*des, NetScope*scope)
{
typedef list<PGenerate*>::const_iterator generate_it_t;
for (generate_it_t cur = generate_schemes.begin()
; cur != generate_schemes.end() ; cur ++ ) {
; cur != generate_schemes.end() ; ++ cur ) {
(*cur) -> generate_scope(des, scope);
}
}
@ -1111,7 +1109,7 @@ void PGenerate::elaborate_subscope_(Design*des, NetScope*scope)
{
// Add the genvars to this scope.
typedef map<perm_string,LineInfo*>::const_iterator genvar_it_t;
for (genvar_it_t cur = genvars.begin(); cur != genvars.end(); cur++ ) {
for (genvar_it_t cur = genvars.begin(); cur != genvars.end(); ++ cur ) {
scope->add_genvar((*cur).first, (*cur).second);
}
@ -1121,7 +1119,7 @@ void PGenerate::elaborate_subscope_(Design*des, NetScope*scope)
typedef list<PGenerate*>::const_iterator generate_it_t;
for (generate_it_t cur = generate_schemes.begin()
; cur != generate_schemes.end() ; cur ++ ) {
; cur != generate_schemes.end() ; ++ cur ) {
(*cur) -> generate_scope(des, scope);
}
@ -1135,20 +1133,20 @@ void PGenerate::elaborate_subscope_(Design*des, NetScope*scope)
// Scan through all the task and function declarations in this
// scope.
elaborate_scope_tasks(des, scope, *this, tasks);
elaborate_scope_funcs(des, scope, *this, funcs);
elaborate_scope_tasks(des, scope, tasks);
elaborate_scope_funcs(des, scope, funcs);
// Scan the generated scope for gates that may create
// their own scopes.
typedef list<PGate*>::const_iterator pgate_list_it_t;
for (pgate_list_it_t cur = gates.begin()
; cur != gates.end() ; cur ++) {
; cur != gates.end() ; ++ cur ) {
(*cur) ->elaborate_scope(des, scope);
}
typedef list<PProcess*>::const_iterator proc_it_t;
for (proc_it_t cur = behaviors.begin()
; cur != behaviors.end() ; cur ++ ) {
; cur != behaviors.end() ; ++ cur ) {
(*cur) -> statement() -> elaborate_scope(des, scope);
}
@ -1437,7 +1435,7 @@ void PGModule::elaborate_scope_mod_instances_(Design*des, Module*mod, NetScope*s
// parameter value with the new expression.
for (mparm_local_it_t cur = replace.begin()
; cur != replace.end() ; cur ++ ) {
; cur != replace.end() ; ++ cur ) {
PExpr*tmp = (*cur).second;
// No expression means that the parameter is not

55
elab_sig.cc
View File

@ -78,7 +78,7 @@ static bool get_const_argument(NetExpr*exp, long&res)
return true;
}
void Statement::elaborate_sig(Design*des, NetScope*scope) const
void Statement::elaborate_sig(Design*, NetScope*) const
{
}
@ -87,7 +87,7 @@ bool PScope::elaborate_sig_wires_(Design*des, NetScope*scope) const
bool flag = true;
for (map<perm_string,PWire*>::const_iterator wt = wires.begin()
; wt != wires.end() ; wt ++ ) {
; wt != wires.end() ; ++ wt ) {
PWire*cur = (*wt).second;
NetNet*sig = cur->elaborate_sig(des, scope);
@ -143,7 +143,7 @@ static void elaborate_sig_funcs(Design*des, NetScope*scope,
typedef map<perm_string,PFunction*>::const_iterator mfunc_it_t;
for (mfunc_it_t cur = funcs.begin()
; cur != funcs.end() ; cur ++) {
; cur != funcs.end() ; ++ cur ) {
hname_t use_name ( (*cur).first );
NetScope*fscope = scope->child(use_name);
@ -165,7 +165,7 @@ static void elaborate_sig_tasks(Design*des, NetScope*scope,
typedef map<perm_string,PTask*>::const_iterator mtask_it_t;
for (mtask_it_t cur = tasks.begin()
; cur != tasks.end() ; cur ++) {
; cur != tasks.end() ; ++ cur ) {
NetScope*tscope = scope->child( hname_t((*cur).first) );
assert(tscope);
(*cur).second->elaborate_sig(des, tscope);
@ -229,7 +229,7 @@ bool Module::elaborate_sig(Design*des, NetScope*scope) const
// scope in.
typedef list<PGenerate*>::const_iterator generate_it_t;
for (generate_it_t cur = generate_schemes.begin()
; cur != generate_schemes.end() ; cur ++ ) {
; cur != generate_schemes.end() ; ++ cur ) {
(*cur) -> elaborate_sig(des, scope);
}
@ -241,8 +241,7 @@ bool Module::elaborate_sig(Design*des, NetScope*scope) const
const list<PGate*>&gl = get_gates();
for (list<PGate*>::const_iterator gt = gl.begin()
; gt != gl.end()
; gt ++ ) {
; gt != gl.end() ; ++ gt ) {
flag &= (*gt)->elaborate_sig(des, scope);
}
@ -261,7 +260,7 @@ bool Module::elaborate_sig(Design*des, NetScope*scope) const
typedef list<PProcess*>::const_iterator proc_it_t;
for (proc_it_t cur = behaviors.begin()
; cur != behaviors.end() ; cur ++ ) {
; cur != behaviors.end() ; ++ cur ) {
(*cur) -> statement() -> elaborate_sig(des, scope);
}
@ -269,17 +268,17 @@ bool Module::elaborate_sig(Design*des, NetScope*scope) const
return flag;
}
bool PGate::elaborate_sig(Design*des, NetScope*scope) const
bool PGate::elaborate_sig(Design*, NetScope*) const
{
return true;
}
bool PGBuiltin::elaborate_sig(Design*des, NetScope*scope) const
bool PGBuiltin::elaborate_sig(Design*, NetScope*) const
{
return true;
}
bool PGAssign::elaborate_sig(Design*des, NetScope*scope) const
bool PGAssign::elaborate_sig(Design*, NetScope*) const
{
return true;
}
@ -314,10 +313,13 @@ bool PGModule::elaborate_sig_mod_(Design*des, NetScope*scope,
return flag;
}
// Not currently used.
#if 0
bool PGModule::elaborate_sig_udp_(Design*des, NetScope*scope, PUdp*udp) const
{
return true;
}
#endif
bool PGenerate::elaborate_sig(Design*des, NetScope*container) const
{
@ -338,7 +340,7 @@ bool PGenerate::elaborate_sig(Design*des, NetScope*container) const
typedef list<PGenerate*>::const_iterator generate_it_t;
for (generate_it_t cur = generate_schemes.begin()
; cur != generate_schemes.end() ; cur ++) {
; cur != generate_schemes.end() ; ++ cur ) {
PGenerate*item = *cur;
if (item->direct_nested_ || !item->scope_list_.empty()) {
flag &= item->elaborate_sig(des, container);
@ -349,7 +351,7 @@ bool PGenerate::elaborate_sig(Design*des, NetScope*container) const
typedef list<NetScope*>::const_iterator scope_list_it_t;
for (scope_list_it_t cur = scope_list_.begin()
; cur != scope_list_.end() ; cur ++ ) {
; cur != scope_list_.end() ; ++ cur ) {
NetScope*scope = *cur;
@ -382,7 +384,7 @@ bool PGenerate::elaborate_sig_direct_(Design*des, NetScope*container) const
bool flag = true;
typedef list<PGenerate*>::const_iterator generate_it_t;
for (generate_it_t cur = generate_schemes.begin()
; cur != generate_schemes.end() ; cur ++) {
; cur != generate_schemes.end() ; ++ cur ) {
PGenerate*item = *cur;
if (item->direct_nested_ || !item->scope_list_.empty()) {
// Found the item, and it is direct nested.
@ -398,7 +400,7 @@ bool PGenerate::elaborate_sig_(Design*des, NetScope*scope) const
// in the current scope.
typedef map<perm_string,PWire*>::const_iterator wires_it_t;
for (wires_it_t wt = wires.begin()
; wt != wires.end() ; wt ++ ) {
; wt != wires.end() ; ++ wt ) {
PWire*cur = (*wt).second;
@ -414,19 +416,19 @@ bool PGenerate::elaborate_sig_(Design*des, NetScope*scope) const
typedef list<PGenerate*>::const_iterator generate_it_t;
for (generate_it_t cur = generate_schemes.begin()
; cur != generate_schemes.end() ; cur ++ ) {
; cur != generate_schemes.end() ; ++ cur ) {
(*cur) -> elaborate_sig(des, scope);
}
typedef list<PGate*>::const_iterator pgate_list_it_t;
for (pgate_list_it_t cur = gates.begin()
; cur != gates.end() ; cur ++) {
; cur != gates.end() ; ++ cur ) {
(*cur) ->elaborate_sig(des, scope);
}
typedef list<PProcess*>::const_iterator proc_it_t;
for (proc_it_t cur = behaviors.begin()
; cur != behaviors.end() ; cur ++ ) {
; cur != behaviors.end() ; ++ cur ) {
(*cur) -> statement() -> elaborate_sig(des, scope);
}
@ -1047,6 +1049,17 @@ NetNet* PWire::elaborate_sig(Design*des, NetScope*scope) const
array_dimensions = 1;
}
if (data_type_ == IVL_VT_REAL && (msb != 0 || lsb != 0)) {
cerr << get_fileline() << ": error: real ";
if (wtype == NetNet::REG) cerr << "variable";
else cerr << "net";
cerr << " '" << name_
<< "' cannot be declared as a vector, found a range ["
<< msb << ":" << lsb << "]." << endl;
des->errors += 1;
return 0;
}
/* If the net type is supply0 or supply1, replace it
with a simple wire with a pulldown/pullup with supply
strength. In other words, transform:
@ -1076,8 +1089,10 @@ NetNet* PWire::elaborate_sig(Design*des, NetScope*scope) const
if (debug_elaborate) {
cerr << get_fileline() << ": debug: "
<< "Generate a SUPPLY pulldown for the "
<< "supply0 net." << endl;
<< "Generate a SUPPLY pull for the ";
if (wtype == NetNet::SUPPLY0) cerr << "supply0";
else cerr << "supply1";
cerr << " net." << endl;
}
}

46
elaborate.cc
View File

@ -42,7 +42,7 @@
# include "ivl_assert.h"
void PGate::elaborate(Design*des, NetScope*scope) const
void PGate::elaborate(Design*, NetScope*) const
{
cerr << "internal error: what kind of gate? " <<
typeid(*this).name() << endl;
@ -1903,9 +1903,13 @@ bool PGModule::elaborate_sig(Design*des, NetScope*scope) const
if (mod != pform_modules.end())
return elaborate_sig_mod_(des, scope, (*mod).second);
// elaborate_sig_udp_ currently always returns true so skip all this
// for now.
#if 0
map<perm_string,PUdp*>::const_iterator udp = pform_primitives.find(type_);
if (udp != pform_primitives.end())
return elaborate_sig_udp_(des, scope, (*udp).second);
#endif
return true;
}
@ -4077,7 +4081,7 @@ void PSpecPath::elaborate(Design*des, NetScope*scope) const
/* Create all the various paths from the path specifier. */
typedef std::vector<perm_string>::const_iterator str_vector_iter;
for (str_vector_iter cur = dst.begin()
; cur != dst.end() ; cur ++) {
; cur != dst.end() ; ++ cur ) {
if (debug_elaborate) {
cerr << get_fileline() << ": debug: Path to " << (*cur);
@ -4145,7 +4149,7 @@ void PSpecPath::elaborate(Design*des, NetScope*scope) const
unsigned idx = 0;
for (str_vector_iter cur_src = src.begin()
; cur_src != src.end() ; cur_src ++) {
; cur_src != src.end() ; ++ cur_src ) {
NetNet*src_sig = scope->find_signal(*cur_src);
assert(src_sig);
@ -4183,7 +4187,7 @@ static void elaborate_functions(Design*des, NetScope*scope,
{
typedef map<perm_string,PFunction*>::const_iterator mfunc_it_t;
for (mfunc_it_t cur = funcs.begin()
; cur != funcs.end() ; cur ++) {
; cur != funcs.end() ; ++ cur ) {
hname_t use_name ( (*cur).first );
NetScope*fscope = scope->child(use_name);
@ -4197,7 +4201,7 @@ static void elaborate_tasks(Design*des, NetScope*scope,
{
typedef map<perm_string,PTask*>::const_iterator mtask_it_t;
for (mtask_it_t cur = tasks.begin()
; cur != tasks.end() ; cur ++) {
; cur != tasks.end() ; ++ cur ) {
hname_t use_name ( (*cur).first );
NetScope*tscope = scope->child(use_name);
@ -4218,7 +4222,7 @@ bool Module::elaborate(Design*des, NetScope*scope) const
// Elaborate specparams
typedef map<perm_string,PExpr*>::const_iterator specparam_it_t;
for (specparam_it_t cur = specparams.begin()
; cur != specparams.end() ; cur ++ ) {
; cur != specparams.end() ; ++ cur ) {
probe_expr_width(des, scope, (*cur).second);
need_constant_expr = true;
@ -4263,7 +4267,7 @@ bool Module::elaborate(Design*des, NetScope*scope) const
// Elaborate within the generate blocks.
typedef list<PGenerate*>::const_iterator generate_it_t;
for (generate_it_t cur = generate_schemes.begin()
; cur != generate_schemes.end() ; cur ++ ) {
; cur != generate_schemes.end() ; ++ cur ) {
(*cur)->elaborate(des, scope);
}
@ -4281,8 +4285,7 @@ bool Module::elaborate(Design*des, NetScope*scope) const
const list<PGate*>&gl = get_gates();
for (list<PGate*>::const_iterator gt = gl.begin()
; gt != gl.end()
; gt ++ ) {
; gt != gl.end() ; ++ gt ) {
(*gt)->elaborate(des, scope);
}
@ -4295,7 +4298,7 @@ bool Module::elaborate(Design*des, NetScope*scope) const
// Elaborate the specify paths of the module.
for (list<PSpecPath*>::const_iterator sp = specify_paths.begin()
; sp != specify_paths.end() ; sp ++) {
; sp != specify_paths.end() ; ++ sp ) {
(*sp)->elaborate(des, scope);
}
@ -4322,7 +4325,7 @@ bool PGenerate::elaborate(Design*des, NetScope*container) const
typedef list<PGenerate*>::const_iterator generate_it_t;
for (generate_it_t cur = generate_schemes.begin()
; cur != generate_schemes.end() ; cur ++) {
; cur != generate_schemes.end() ; ++ cur ) {
PGenerate*item = *cur;
if (item->direct_nested_ || !item->scope_list_.empty()) {
flag &= item->elaborate(des, container);
@ -4333,7 +4336,7 @@ bool PGenerate::elaborate(Design*des, NetScope*container) const
typedef list<NetScope*>::const_iterator scope_list_it_t;
for (scope_list_it_t cur = scope_list_.begin()
; cur != scope_list_.end() ; cur ++ ) {
; cur != scope_list_.end() ; ++ cur ) {
NetScope*scope = *cur;
// Check that this scope is one that is contained in the
@ -4376,7 +4379,7 @@ bool PGenerate::elaborate_direct_(Design*des, NetScope*container) const
bool flag = true;
typedef list<PGenerate*>::const_iterator generate_it_t;
for (generate_it_t cur = generate_schemes.begin()
; cur != generate_schemes.end() ; cur ++) {
; cur != generate_schemes.end() ; ++ cur ) {
PGenerate*item = *cur;
if (item->direct_nested_ || !item->scope_list_.empty()) {
// Found the item, and it is direct nested.
@ -4392,16 +4395,16 @@ bool PGenerate::elaborate_(Design*des, NetScope*scope) const
elaborate_tasks(des, scope, tasks);
typedef list<PGate*>::const_iterator gates_it_t;
for (gates_it_t cur = gates.begin() ; cur != gates.end() ; cur ++ )
for (gates_it_t cur = gates.begin() ; cur != gates.end() ; ++ cur )
(*cur)->elaborate(des, scope);
typedef list<PProcess*>::const_iterator proc_it_t;
for (proc_it_t cur = behaviors.begin(); cur != behaviors.end(); cur++)
for (proc_it_t cur = behaviors.begin(); cur != behaviors.end(); ++ cur )
(*cur)->elaborate(des, scope);
typedef list<PGenerate*>::const_iterator generate_it_t;
for (generate_it_t cur = generate_schemes.begin()
; cur != generate_schemes.end() ; cur ++ ) {
; cur != generate_schemes.end() ; ++ cur ) {
(*cur)->elaborate(des, scope);
}
@ -4416,13 +4419,13 @@ bool PScope::elaborate_behaviors_(Design*des, NetScope*scope) const
// involves scanning the PProcess* list, creating a NetProcTop
// for each process.
for (list<PProcess*>::const_iterator st = behaviors.begin()
; st != behaviors.end() ; st ++ ) {
; st != behaviors.end() ; ++ st ) {
result_flag &= (*st)->elaborate(des, scope);
}
for (list<AProcess*>::const_iterator st = analog_behaviors.begin()
; st != analog_behaviors.end() ; st ++ ) {
; st != analog_behaviors.end() ; ++ st ) {
result_flag &= (*st)->elaborate(des, scope);
}
@ -4447,7 +4450,7 @@ class elaborate_root_scope_t : public elaborator_work_item_t {
{
Module::replace_t root_repl;
for (list<Module::named_expr_t>::iterator cur = Module::user_defparms.begin()
; cur != Module::user_defparms.end() ; cur++) {
; cur != Module::user_defparms.end() ; ++ cur ) {
pform_name_t tmp_name = cur->first;
if (peek_head_name(tmp_name) != scope_->basename())
@ -4506,7 +4509,7 @@ class later_defparams : public elaborator_work_item_t {
{
list<NetScope*>tmp_list;
for (set<NetScope*>::iterator cur = des->defparams_later.begin()
; cur != des->defparams_later.end() ; cur ++ )
; cur != des->defparams_later.end() ; ++ cur )
tmp_list.push_back(*cur);
des->defparams_later.clear();
@ -4569,8 +4572,7 @@ Design* elaborate(list<perm_string>roots)
// Scan the root modules by name, and elaborate their scopes.
for (list<perm_string>::const_iterator root = roots.begin()
; root != roots.end()
; root++) {
; root != roots.end() ; ++ root ) {
// Look for the root module in the list.
map<perm_string,Module*>::const_iterator mod = pform_modules.find(*root);

20
emit.cc
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 1998-2008 Stephen Williams (steve@icarus.com)
* Copyright (c) 1998-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@ -31,7 +31,7 @@
# include <cassert>
# include <cstring>
bool NetNode::emit_node(struct target_t*tgt) const
bool NetNode::emit_node(struct target_t*) const
{
cerr << "EMIT: Gate type? " << typeid(*this).name() << endl;
return false;
@ -200,7 +200,7 @@ bool NetAnalogTop::emit(struct target_t*tgt) const
return tgt->process(this);
}
bool NetProc::emit_proc(struct target_t*tgt) const
bool NetProc::emit_proc(struct target_t*) const
{
cerr << "EMIT: Proc type? " << typeid(*this).name() << endl;
return false;
@ -390,11 +390,11 @@ void NetScope::emit_scope(struct target_t*tgt) const
tgt->enumeration(this, *cur);
for (map<hname_t,NetScope*>::const_iterator cur = children_.begin()
; cur != children_.end() ; cur ++)
; cur != children_.end() ; ++ cur )
cur->second->emit_scope(tgt);
for (signals_map_iter_t cur = signals_map_.begin()
; cur != signals_map_.end() ; cur ++) {
; cur != signals_map_.end() ; ++ cur ) {
tgt->signal(cur->second);
}
@ -418,7 +418,7 @@ bool NetScope::emit_defs(struct target_t*tgt) const
switch (type_) {
case MODULE:
for (map<hname_t,NetScope*>::const_iterator cur = children_.begin()
; cur != children_.end() ; cur ++)
; cur != children_.end() ; ++ cur )
flag &= cur->second->emit_defs(tgt);
break;
@ -430,7 +430,7 @@ bool NetScope::emit_defs(struct target_t*tgt) const
break;
default: /* BEGIN_END and FORK_JOIN, GENERATE... */
for (map<hname_t,NetScope*>::const_iterator cur = children_.begin()
; cur != children_.end() ; cur ++)
; cur != children_.end() ; ++ cur )
flag &= cur->second->emit_defs(tgt);
break;
}
@ -452,7 +452,7 @@ int Design::emit(struct target_t*tgt) const
// enumerate the scopes
for (list<NetScope*>::const_iterator scope = root_scopes_.begin();
scope != root_scopes_.end(); scope++)
scope != root_scopes_.end(); ++ scope )
(*scope)->emit_scope(tgt);
@ -475,7 +475,7 @@ int Design::emit(struct target_t*tgt) const
// emit task and function definitions
bool tasks_rc = true;
for (list<NetScope*>::const_iterator scope = root_scopes_.begin();
scope != root_scopes_.end(); scope++)
scope != root_scopes_.end(); ++ scope )
tasks_rc &= (*scope)->emit_defs(tgt);
@ -540,7 +540,7 @@ void NetECRealParam::expr_scan(struct expr_scan_t*tgt) const
tgt->expr_rparam(this);
}
void NetEParam::expr_scan(struct expr_scan_t*tgt) const
void NetEParam::expr_scan(struct expr_scan_t*) const
{
cerr << get_fileline() << ":internal error: unexpected NetEParam."
<< endl;

2
eval_attrib.cc
View File

@ -43,7 +43,7 @@ attrib_list_t* evaluate_attributes(const map<perm_string,PExpr*>&att,
unsigned idx = 0;
typedef map<perm_string,PExpr*>::const_iterator iter_t;
for (iter_t cur = att.begin() ; cur != att.end() ; cur ++, idx++) {
for (iter_t cur = att.begin() ; cur != att.end() ; ++ cur , idx += 1) {
table[idx].key = (*cur).first;
PExpr*exp = (*cur).second;

901
eval_tree.cc
View File

File diff suppressed because it is too large Load Diff

15
expr_synth.cc
View File

@ -39,8 +39,7 @@ static NetNet* convert_to_real_const(Design*des, NetScope*scope, NetEConst*expr)
/* Note that lsig, rsig and real_args are references. */
static bool process_binary_args(Design*des, NetScope*scope, NetExpr*root,
NetExpr*left, NetExpr*right,
NetNet*&lsig, NetNet*&rsig, bool&real_args,
NetExpr*obj)
NetNet*&lsig, NetNet*&rsig, bool&real_args)
{
if (left->expr_type() == IVL_VT_REAL ||
right->expr_type() == IVL_VT_REAL) {
@ -77,7 +76,7 @@ static bool process_binary_args(Design*des, NetScope*scope, NetExpr*root,
else return false;
}
NetNet* NetExpr::synthesize(Design*des, NetScope*scope, NetExpr*root)
NetNet* NetExpr::synthesize(Design*des, NetScope*, NetExpr*)
{
cerr << get_fileline() << ": internal error: cannot synthesize expression: "
<< *this << endl;
@ -95,7 +94,7 @@ NetNet* NetEBAdd::synthesize(Design*des, NetScope*scope, NetExpr*root)
NetNet *lsig=0, *rsig=0;
bool real_args=false;
if (process_binary_args(des, scope, root, left_, right_, lsig, rsig,
real_args, this)) {
real_args)) {
return 0;
}
@ -221,7 +220,7 @@ NetNet* NetEBComp::synthesize(Design*des, NetScope*scope, NetExpr*root)
unsigned width;
bool real_args=false;
if (process_binary_args(des, scope, root, left_, right_, lsig, rsig,
real_args, this)) {
real_args)) {
return 0;
}
@ -370,7 +369,7 @@ NetNet* NetEBPow::synthesize(Design*des, NetScope*scope, NetExpr*root)
unsigned width;
bool real_args=false;
if (process_binary_args(des, scope, root, left_, right_, lsig, rsig,
real_args, this)) {
real_args)) {
return 0;
}
@ -406,7 +405,7 @@ NetNet* NetEBMult::synthesize(Design*des, NetScope*scope, NetExpr*root)
unsigned width;
bool real_args=false;
if (process_binary_args(des, scope, root, left_, right_, lsig, rsig,
real_args, this)) {
real_args)) {
return 0;
}
@ -443,7 +442,7 @@ NetNet* NetEBDiv::synthesize(Design*des, NetScope*scope, NetExpr*root)
unsigned width;
bool real_args=false;
if (process_binary_args(des, scope, root, left_, right_, lsig, rsig,
real_args, this)) {
real_args)) {
return 0;
}

8
functor.cc
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 1999-2008 Stephen Williams (steve@icarus.com)
* Copyright (c) 1999-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@ -100,7 +100,7 @@ void functor_t::lpm_ureduce(class Design*, class NetUReduce*)
void NetScope::run_functor(Design*des, functor_t*fun)
{
for (map<hname_t,NetScope*>::const_iterator cur = children_.begin()
; cur != children_.end() ; cur ++)
; cur != children_.end() ; ++ cur )
cur->second->run_functor(des, fun);
for (NetEvent*cur = events_ ; cur ; /* */) {
@ -124,7 +124,7 @@ void Design::functor(functor_t*fun)
{
// Scan the scopes
for (list<NetScope*>::const_iterator scope = root_scopes_.begin();
scope != root_scopes_.end(); scope++)
scope != root_scopes_.end(); ++ scope )
(*scope)->run_functor(this, fun);
// apply to processes
@ -244,7 +244,7 @@ proc_match_t::~proc_match_t()
{
}
int NetProc::match_proc(proc_match_t*that)
int NetProc::match_proc(proc_match_t*)
{
return 0;
}

3
iverilog-vpi.sh
View File

@ -22,6 +22,7 @@
CC="@IVCC@"
CXX=@IVCXX@
CFLAGS="@PIC@ @IVCFLAGS@ -I@INCLUDEDIR@"
CXXFLAGS="@PIC@ @IVCXXFLAGS@ -I@INCLUDEDIR@"
SUFFIX=@SUFFIX@
@ -136,7 +137,7 @@ do
obj=$base".o"
echo "Compiling $src..."
$CXX -c -o $obj $DEFS $CFLAGS $INCOPT $src || compile_errors=`expr $compile_errors + 1`
$CXX -c -o $obj $DEFS $CXXFLAGS $INCOPT $src || compile_errors=`expr $compile_errors + 1`
OBJ="$OBJ $obj"
done

17
ivl_assert.h
View File

@ -20,21 +20,16 @@
#ifndef __ivl_assert_h
#define __ivl_assert_h
# include <cassert>
# include <cstdlib>
#define ivl_assert(tok, expression) \
do { \
if (! (expression)) \
__ivl_assert(#expression, tok, __FILE__, __LINE__); \
} while(0)
#define __ivl_assert(expression, tok, file, line) \
do { \
if (! (expression)) { \
cerr << (tok).get_fileline() << ": assert: " \
<< file << ":" << line \
<< ": failed assertion " << (expression) << endl; \
<< __FILE__ << ":" << __LINE__ \
<< ": failed assertion " << #expression << endl; \
abort(); \
} while(0)
} \
} while (0)
#endif

2
ivlpp/lexor.lex
View File

@ -20,7 +20,6 @@
# include "config.h"
# include "ivl_alloc.h"
# include <stdio.h>
# include <stdlib.h>
# include <string.h>
@ -28,6 +27,7 @@
# include <assert.h>
# include "globals.h"
# include "ivl_alloc.h"
static void output_init();
#define YY_USER_INIT output_init()

2
ivlpp/main.c
View File

@ -37,7 +37,6 @@ const char NOTICE[] =
" 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.\n"
;
# include "ivl_alloc.h"
# include <stdio.h>
# include <stdlib.h>
# include <unistd.h>
@ -47,6 +46,7 @@ const char NOTICE[] =
# include <getopt.h>
#endif
# include "globals.h"
# include "ivl_alloc.h"
#if defined(__MINGW32__) && !defined(HAVE_GETOPT_H)
extern int getopt(int argc, char*argv[], const char*fmt);

6
lexor_keyword.gperf
View File

@ -1,3 +1,9 @@
/*
* We need this to prevent -Wextra (-W) from complaining that the mask and
* tokenType values are not initialized for the empty table entries.
*/
%define initializer-suffix ,0,0
%{
/* Command-line: gperf -o -i 1 -C -k 1-3,$ -L C -H keyword_hash -N check_identifier -tT lexor_keyword.gperf */

2
libveriuser/a_vcl.c
View File

@ -17,12 +17,12 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#include "ivl_alloc.h"
#include <vpi_user.h>
#include <acc_user.h>
#include <stdlib.h>
#include "priv.h"
#include <assert.h>
#include "ivl_alloc.h"
/*
* This is the structure of a record that I use locally to hold the

2
libveriuser/veriusertfs.c
View File

@ -23,7 +23,6 @@
* via VPI. This is extremely ugly, so don't look after eating dinner.
*/
# include "ivl_alloc.h"
# include <string.h>
# include <stdlib.h>
# include <assert.h>
@ -32,6 +31,7 @@
# include "priv.h"
# include "vpi_user.h"
# include "veriuser.h"
# include "ivl_alloc.h"
/*
* local structure used to hold the persistent veriusertfs data

2
libveriuser/workarea.c
View File

@ -17,10 +17,10 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
# include "ivl_alloc.h"
# include <veriuser.h>
# include <vpi_user.h>
# include <stdlib.h>
# include "ivl_alloc.h"
/*
* Keep a list of sys handle to work area bindings.

5
load_module.cc
View File

@ -21,7 +21,6 @@
# include "util.h"
# include "parse_api.h"
# include "compiler.h"
# include "ivl_alloc.h"
# include <iostream>
# include <map>
# include <cstdlib>
@ -31,6 +30,7 @@
# include <dirent.h>
# include <cctype>
# include <cassert>
# include "ivl_alloc.h"
/*
* The module library items are maps of key names to file name within
@ -149,8 +149,7 @@ int build_library_index(const char*path, bool key_case_sensitive)
char*key = 0;
for (list<const char*>::iterator suf = library_suff.begin()
; suf != library_suff.end()
; suf ++ ) {
; suf != library_suff.end() ; ++ suf ) {
const char*sufptr = *suf;
unsigned sufsiz = strlen(sufptr);

36
main.cc
View File

@ -38,7 +38,6 @@ const char NOTICE[] =
" 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.\n"
;
# include "ivl_alloc.h"
# include <cstdio>
# include <iostream>
# include <fstream>
@ -89,6 +88,8 @@ static void signals_handler(int sig)
}
#endif
# include "ivl_alloc.h"
/* Count errors detected in flag processing. */
unsigned flag_errors = 0;
@ -734,7 +735,7 @@ static void EOC_cleanup(void)
cleanup_sys_func_table();
for (list<const char*>::iterator suf = library_suff.begin() ;
suf != library_suff.end() ; suf ++ ) {
suf != library_suff.end() ; ++ suf ) {
free((void *)*suf);
}
library_suff.clear();
@ -744,7 +745,7 @@ static void EOC_cleanup(void)
free(depfile_name);
for (map<string, const char*>::iterator flg = flags.begin() ;
flg != flags.end() ; flg ++ ) {
flg != flags.end() ; ++ flg ) {
free((void *)flg->second);
}
flags.clear();
@ -941,24 +942,22 @@ int main(int argc, char*argv[])
ofstream out (pf_path);
out << "PFORM DUMP NATURES:" << endl;
for (map<perm_string,ivl_nature_t>::iterator cur = natures.begin()
; cur != natures.end() ; cur ++ ) {
; cur != natures.end() ; ++ cur ) {
pform_dump(out, (*cur).second);
}
out << "PFORM DUMP DISCIPLINES:" << endl;
for (map<perm_string,ivl_discipline_t>::iterator cur = disciplines.begin()
; cur != disciplines.end() ; cur ++ ) {
; cur != disciplines.end() ; ++ cur ) {
pform_dump(out, (*cur).second);
}
out << "PFORM DUMP MODULES:" << endl;
for (map<perm_string,Module*>::iterator mod = pform_modules.begin()
; mod != pform_modules.end()
; mod ++ ) {
; mod != pform_modules.end() ; ++ mod ) {
pform_dump(out, (*mod).second);
}
out << "PFORM DUMP PRIMITIVES:" << endl;
for (map<perm_string,PUdp*>::iterator idx = pform_primitives.begin()
; idx != pform_primitives.end()
; idx ++ ) {
; idx != pform_primitives.end() ; ++ idx ) {
(*idx).second->dump(out);
}
}
@ -977,14 +976,12 @@ int main(int argc, char*argv[])
if (verbose_flag)
cout << "LOCATING TOP-LEVEL MODULES" << endl << " ";
for (mod = pform_modules.begin()
; mod != pform_modules.end()
; mod++) {
; mod != pform_modules.end() ; ++ mod ) {
find_module_mention(mentioned_p, mod->second);
}
for (mod = pform_modules.begin()
; mod != pform_modules.end()
; mod++) {
; mod != pform_modules.end() ; ++ mod ) {
/* Don't choose library modules. */
if ((*mod).second->library_flag)
@ -1064,7 +1061,7 @@ int main(int argc, char*argv[])
/* Done with all the pform data. Delete the modules. */
for (map<perm_string,Module*>::iterator idx = pform_modules.begin()
; idx != pform_modules.end() ; idx ++) {
; idx != pform_modules.end() ; ++ idx ) {
delete (*idx).second;
(*idx).second = 0;
@ -1161,8 +1158,7 @@ int main(int argc, char*argv[])
map<perm_string,unsigned>::const_iterator idx;
for (idx = missing_modules.begin()
; idx != missing_modules.end()
; idx ++)
; idx != missing_modules.end() ; ++ idx )
cerr << " " << (*idx).first
<< " referenced " << (*idx).second
<< " times."<< endl;
@ -1177,7 +1173,7 @@ static void find_module_mention(map<perm_string,bool>&check_map, Module*mod)
{
list<PGate*> gates = mod->get_gates();
list<PGate*>::const_iterator gate;
for (gate = gates.begin(); gate != gates.end(); gate++) {
for (gate = gates.begin(); gate != gates.end(); ++ gate ) {
PGModule*tmp = dynamic_cast<PGModule*>(*gate);
if (tmp) {
// Note that this module has been instantiated
@ -1187,7 +1183,7 @@ static void find_module_mention(map<perm_string,bool>&check_map, Module*mod)
list<PGenerate*>::const_iterator cur;
for (cur = mod->generate_schemes.begin()
; cur != mod->generate_schemes.end() ; cur ++) {
; cur != mod->generate_schemes.end() ; ++ cur ) {
find_module_mention(check_map, *cur);
}
}
@ -1195,7 +1191,7 @@ static void find_module_mention(map<perm_string,bool>&check_map, Module*mod)
static void find_module_mention(map<perm_string,bool>&check_map, PGenerate*schm)
{
list<PGate*>::const_iterator gate;
for (gate = schm->gates.begin(); gate != schm->gates.end(); gate++) {
for (gate = schm->gates.begin(); gate != schm->gates.end(); ++ gate ) {
PGModule*tmp = dynamic_cast<PGModule*>(*gate);
if (tmp) {
// Note that this module has been instantiated
@ -1205,7 +1201,7 @@ static void find_module_mention(map<perm_string,bool>&check_map, PGenerate*schm)
list<PGenerate*>::const_iterator cur;
for (cur = schm->generate_schemes.begin()
; cur != schm->generate_schemes.end() ; cur ++) {
; cur != schm->generate_schemes.end() ; ++ cur ) {
find_module_mention(check_map, *cur);
}
}

16
net_design.cc
View File

@ -138,7 +138,7 @@ NetScope* Design::find_scope(const std::list<hname_t>&path) const
return 0;
for (list<NetScope*>::const_iterator scope = root_scopes_.begin()
; scope != root_scopes_.end(); scope++) {
; scope != root_scopes_.end(); ++ scope ) {
NetScope*cur = *scope;
if (path.front() != cur->fullname())
@ -213,14 +213,14 @@ NetScope* Design::find_scope(NetScope*scope, const std::list<hname_t>&path,
void Design::run_defparams()
{
for (list<NetScope*>::const_iterator scope = root_scopes_.begin();
scope != root_scopes_.end(); scope++)
scope != root_scopes_.end(); ++ scope )
(*scope)->run_defparams(this);
}
void NetScope::run_defparams(Design*des)
{
for (map<hname_t,NetScope*>::const_iterator cur = children_.begin()
; cur != children_.end() ; cur ++)
; cur != children_.end() ; ++ cur )
cur->second->run_defparams(des);
while (! defparams.empty()) {
@ -312,7 +312,7 @@ void NetScope::run_defparams_later(Design*des)
// All the scopes that this defparam set touched should have
// their parameters re-evaluated.
for (set<NetScope*>::iterator cur = target_scopes.begin()
; cur != target_scopes.end() ; cur ++ )
; cur != target_scopes.end() ; ++ cur )
(*cur)->evaluate_parameters(des);
// If there are some scopes that still have missing scopes,
@ -326,7 +326,7 @@ void NetScope::run_defparams_later(Design*des)
void Design::evaluate_parameters()
{
for (list<NetScope*>::const_iterator scope = root_scopes_.begin();
scope != root_scopes_.end(); scope++)
scope != root_scopes_.end(); ++ scope )
(*scope)->evaluate_parameters(this);
}
@ -610,7 +610,7 @@ void NetScope::evaluate_parameter_real_(Design*des, param_ref_t cur)
void NetScope::evaluate_parameters(Design*des)
{
for (map<hname_t,NetScope*>::const_iterator cur = children_.begin()
; cur != children_.end() ; cur ++)
; cur != children_.end() ; ++ cur )
cur->second->evaluate_parameters(des);
if (debug_scopes)
@ -659,7 +659,7 @@ void NetScope::evaluate_parameters(Design*des)
void Design::residual_defparams()
{
for (list<NetScope*>::const_iterator scope = root_scopes_.begin();
scope != root_scopes_.end(); scope++)
scope != root_scopes_.end(); ++ scope )
(*scope)->residual_defparams(this);
}
@ -676,7 +676,7 @@ void NetScope::residual_defparams(Design*des)
}
for (map<hname_t,NetScope*>::const_iterator cur = children_.begin()
; cur != children_.end() ; cur ++)
; cur != children_.end() ; ++ cur )
cur->second->residual_defparams(des);
}

9
net_event.cc
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2000 Stephen Williams (steve@icarus.com)
* Copyright (c) 2000-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@ -138,7 +138,7 @@ void NetEvent::find_similar_event(list<NetEvent*>&event_list)
probes_->find_similar_probes(first_probes);
for (list<NetEvProbe*>::iterator idx = first_probes.begin()
; idx != first_probes.end() ; idx ++) {
; idx != first_probes.end() ; ++ idx ) {
candidate_events.insert( (*idx)->event() );
}
@ -158,7 +158,7 @@ void NetEvent::find_similar_event(list<NetEvent*>&event_list)
set<NetEvent*> candidate_tmp;
for (list<NetEvProbe*>::iterator idx = similar_probes.begin()
; idx != similar_probes.end() ; idx ++) {
; idx != similar_probes.end() ; ++ idx ) {
NetEvent*tmp = (*idx)->event();
if (candidate_events.find(tmp) != candidate_events.end())
@ -178,7 +178,7 @@ void NetEvent::find_similar_event(list<NetEvent*>&event_list)
for remaining compatibility details and save the survivors
in the event_list that the caller passed. */
for (set<NetEvent*>::iterator idx = candidate_events.begin()
; idx != candidate_events.end() ; idx ++) {
; idx != candidate_events.end() ; ++ idx ) {
NetEvent*tmp = *idx;
@ -459,4 +459,3 @@ NetProc* NetEvWait::statement()
{
return statement_;
}

2
net_link.cc
View File

@ -22,12 +22,12 @@
# include <iostream>
# include "netlist.h"
# include "ivl_alloc.h"
# include <sstream>
# include <cstring>
# include <string>
# include <typeinfo>
# include <cstdlib>
# include "ivl_alloc.h"
void Nexus::connect(Link&r)
{

44
net_nex_input.cc
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2002-2008 Stephen Williams (steve@icarus.com)
* Copyright (c) 2002-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@ -27,7 +27,7 @@
# include "netlist.h"
# include "netmisc.h"
NexusSet* NetExpr::nex_input(bool rem_out)
NexusSet* NetExpr::nex_input(bool)
{
cerr << get_fileline()
<< ": internal error: nex_input not implemented: "
@ -35,7 +35,7 @@ NexusSet* NetExpr::nex_input(bool rem_out)
return 0;
}
NexusSet* NetProc::nex_input(bool rem_out)
NexusSet* NetProc::nex_input(bool)
{
cerr << get_fileline()
<< ": internal error: NetProc::nex_input not implemented"
@ -68,7 +68,7 @@ NexusSet* NetEConcat::nex_input(bool rem_out)
return result;
}
NexusSet* NetEAccess::nex_input(bool rem_out)
NexusSet* NetEAccess::nex_input(bool)
{
return new NexusSet;
}
@ -76,12 +76,12 @@ NexusSet* NetEAccess::nex_input(bool rem_out)
/*
* A constant has not inputs, so always return an empty set.
*/
NexusSet* NetEConst::nex_input(bool rem_out)
NexusSet* NetEConst::nex_input(bool)
{
return new NexusSet;
}
NexusSet* NetECReal::nex_input(bool rem_out)
NexusSet* NetECReal::nex_input(bool)
{
return new NexusSet;
}
@ -90,22 +90,22 @@ NexusSet* NetECReal::nex_input(bool rem_out)
* A parameter by definition has no inputs. It represents a constant
* value, even if that value is a constant expression.
*/
NexusSet* NetEParam::nex_input(bool rem_out)
NexusSet* NetEParam::nex_input(bool)
{
return new NexusSet;
}
NexusSet* NetEEvent::nex_input(bool rem_out)
NexusSet* NetEEvent::nex_input(bool)
{
return new NexusSet;
}
NexusSet* NetENetenum::nex_input(bool rem_out)
NexusSet* NetENetenum::nex_input(bool)
{
return new NexusSet;
}
NexusSet* NetEScope::nex_input(bool rem_out)
NexusSet* NetEScope::nex_input(bool)
{
return new NexusSet;
}
@ -128,17 +128,24 @@ NexusSet* NetESelect::nex_input(bool rem_out)
return result;
}
/*
* The $fread, etc. system functions can have NULL arguments.
*/
NexusSet* NetESFunc::nex_input(bool rem_out)
{
if (parms_.size() == 0)
return new NexusSet;
NexusSet*result = parms_[0]->nex_input(rem_out);
NexusSet*result;
if (parms_[0]) result = parms_[0]->nex_input(rem_out);
else result = new NexusSet;
for (unsigned idx = 1 ; idx < parms_.size() ; idx += 1) {
if (parms_[idx]) {
NexusSet*tmp = parms_[idx]->nex_input(rem_out);
result->add(*tmp);
delete tmp;
}
}
return result;
}
@ -329,7 +336,7 @@ NexusSet* NetCase::nex_input(bool rem_out)
return result;
}
NexusSet* NetCAssign::nex_input(bool rem_out)
NexusSet* NetCAssign::nex_input(bool)
{
cerr << get_fileline() << ": internal warning: NetCAssign::nex_input()"
<< " not implemented." << endl;
@ -354,7 +361,7 @@ NexusSet* NetCondit::nex_input(bool rem_out)
return result;
}
NexusSet* NetForce::nex_input(bool rem_out)
NexusSet* NetForce::nex_input(bool)
{
cerr << get_fileline() << ": internal warning: NetForce::nex_input()"
<< " not implemented." << endl;
@ -392,17 +399,24 @@ NexusSet* NetRepeat::nex_input(bool rem_out)
return result;
}
/*
* The $display, etc. system tasks can have NULL arguments.
*/
NexusSet* NetSTask::nex_input(bool rem_out)
{
if (parms_.count() == 0)
return new NexusSet;
NexusSet*result = parms_[0]->nex_input(rem_out);
NexusSet*result;
if (parms_[0]) result = parms_[0]->nex_input(rem_out);
else result = new NexusSet;
for (unsigned idx = 1 ; idx < parms_.count() ; idx += 1) {
if (parms_[idx]) {
NexusSet*tmp = parms_[idx]->nex_input(rem_out);
result->add(*tmp);
delete tmp;
}
}
return result;
}
@ -412,7 +426,7 @@ NexusSet* NetSTask::nex_input(bool rem_out)
* parameters to consider, because the compiler already removed them
* and converted them to blocking assignments.
*/
NexusSet* NetUTask::nex_input(bool rem_out)
NexusSet* NetUTask::nex_input(bool)
{
return new NexusSet;
}

8
net_nex_output.cc
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2002-2007 Stephen Williams (steve@icarus.com)
* Copyright (c) 2002-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@ -26,7 +26,7 @@
# include "netlist.h"
# include "netmisc.h"
void NetProc::nex_output(NexusSet&out)
void NetProc::nex_output(NexusSet&)
{
cerr << get_fileline()
<< ": internal error: NetProc::nex_output not implemented"
@ -108,7 +108,7 @@ void NetPDelay::nex_output(NexusSet&out)
* all. This is OK because most system tasks are not synthesizable in
* the first place.
*/
void NetSTask::nex_output(NexusSet&out)
void NetSTask::nex_output(NexusSet&)
{
}
@ -117,7 +117,7 @@ void NetSTask::nex_output(NexusSet&out)
* right, we should be listing as outputs all the output ports, but for
* the purposes that this method is used, this will do for now.
*/
void NetUTask::nex_output(NexusSet&out)
void NetUTask::nex_output(NexusSet&)
{
}

2
net_tran.cc
View File

@ -161,7 +161,7 @@ void join_island(NetPins*obj)
// process, and thus they will join my island. This process
// will recurse until all the connected branches join this island.
for (list<NetObj*>::iterator cur = uncommitted_neighbors.begin()
; cur != uncommitted_neighbors.end() ; cur ++ ) {
; cur != uncommitted_neighbors.end() ; ++ cur ) {
join_island(*cur);
}
}

9
netlist.h
View File

@ -3458,14 +3458,13 @@ class NetEBComp : public NetEBinary {
NetEConst* must_be_leeq_(NetExpr*le, const verinum&rv, bool eq_flag);
NetEConst*eval_eqeq_(bool ne_flag);
NetEConst*eval_eqeq_real_(NetExpr*le, NetExpr*ri, bool ne_flag);
NetEConst*eval_eqeq_real_(bool ne_flag);
NetEConst*eval_less_();
NetEConst*eval_leeq_();
NetEConst*eval_leeq_real_(NetExpr*le, NetExpr*ri, bool eq_flag);
NetEConst*eval_gt_();
NetEConst*eval_gteq_();
NetEConst*eval_eqeqeq_();
NetEConst*eval_neeqeq_();
NetEConst*eval_eqeqeq_(bool ne_flag);
};
/*
@ -3487,6 +3486,7 @@ class NetEBLogic : public NetEBinary {
virtual NetNet* synthesize(Design*, NetScope*scope, NetExpr*root);
private:
NetEConst* eval_tree_real_();
};
/*
@ -3910,6 +3910,9 @@ class NetEUReduce : public NetEUnary {
virtual NetEUReduce* dup_expr() const;
virtual NetEConst* eval_tree(int prune_to_width = -1);
virtual ivl_variable_type_t expr_type() const;
private:
virtual NetEConst* eval_tree_real_();
};
class NetECast : public NetEUnary {

14
netmisc.cc
View File

@ -27,11 +27,14 @@
# include "compiler.h"
# include "ivl_assert.h"
// This routines is not currently used!
#if 0
NetNet* add_to_net(Design*des, NetNet*sig, long val)
{
if (val == 0)
return sig;
#if 0
cerr << sig->get_fileline() << ": XXXX: Forgot how to implement add_to_net" << endl;
return 0;
NetScope*scope = sig->scope();
unsigned long abs_val = (val >= 0)? val : (-val);
unsigned width = sig->pin_count();
@ -71,11 +74,8 @@ NetNet* add_to_net(Design*des, NetNet*sig, long val)
des->add_node(val_c);
return res;
#else
cerr << sig->get_fileline() << ": XXXX: Forgot how to implement add_to_net" << endl;
return 0;
#endif
}
#endif
NetNet* sub_net_from(Design*des, NetScope*scope, long val, NetNet*sig)
{
@ -587,7 +587,7 @@ std::list<hname_t> eval_scope_path(Design*des, NetScope*scope,
typedef pform_name_t::const_iterator pform_path_it;
for (pform_path_it cur = path.begin() ; cur != path.end(); cur++) {
for (pform_path_it cur = path.begin() ; cur != path.end(); ++ cur ) {
const name_component_t&comp = *cur;
res.push_back( eval_path_component(des,scope,comp) );
}
@ -665,7 +665,7 @@ const_bool const_logical(const NetExpr*expr)
for (unsigned idx = 0; idx < cval.len(); idx += 1) {
switch (cval.get(idx)) {
case verinum::V1:
res = C_1;
return C_1;
break;
case verinum::V0:

4
netmisc.h
View File

@ -107,8 +107,12 @@ extern NetExpr*normalize_variable_array_base(NetExpr *base, long offset,
* This function takes as input a NetNet signal and adds a constant
* value to it. If the val is 0, then simply return sig. Otherwise,
* return a new NetNet value that is the output of an addition.
*
* Not currently used.
*/
#if 0
extern NetNet*add_to_net(Design*des, NetNet*sig, long val);
#endif
extern NetNet*sub_net_from(Design*des, NetScope*scope, long val, NetNet*sig);
/*

6
nodangle.cc
View File

@ -40,7 +40,7 @@ class nodangle_f : public functor_t {
bool scomplete, ecomplete;
};
void nodangle_f::event(Design*des, NetEvent*ev)
void nodangle_f::event(Design*, NetEvent*ev)
{
if (ecomplete) return;
@ -113,7 +113,7 @@ void nodangle_f::event(Design*des, NetEvent*ev)
list<NetEvent*> match;
ev->find_similar_event(match);
for (list<NetEvent*>::iterator idx = match.begin()
; idx != match.end() ; idx ++) {
; idx != match.end() ; ++ idx ) {
NetEvent*tmp = *idx;
assert(tmp != ev);
@ -122,7 +122,7 @@ void nodangle_f::event(Design*des, NetEvent*ev)
}
}
void nodangle_f::signal(Design*des, NetNet*sig)
void nodangle_f::signal(Design*, NetNet*sig)
{
if (scomplete) return;

8
parse.y
View File

@ -87,8 +87,8 @@ static unsigned args_after_notifier;
* These are some common strength pairs that are used as defaults when
* the user is not otherwise specific.
*/
const static struct str_pair_t pull_strength = { IVL_DR_PULL, IVL_DR_PULL };
const static struct str_pair_t str_strength = { IVL_DR_STRONG, IVL_DR_STRONG };
static const struct str_pair_t pull_strength = { IVL_DR_PULL, IVL_DR_PULL };
static const struct str_pair_t str_strength = { IVL_DR_STRONG, IVL_DR_STRONG };
static list<pair<perm_string,PExpr*> >* make_port_list(char*id, PExpr*expr)
{
@ -2457,12 +2457,12 @@ module_item
| K_output var_type unsigned_signed_opt range_opt list_of_port_identifiers ';'
{ list<pair<perm_string,PExpr*> >::const_iterator pp;
list<perm_string>*tmp = new list<perm_string>;
for (pp = $5->begin(); pp != $5->end(); pp++) {
for (pp = $5->begin(); pp != $5->end(); ++ pp ) {
tmp->push_back((*pp).first);
}
pform_makewire(@1, $4, $3, tmp, $2, NetNet::POUTPUT,
IVL_VT_NO_TYPE, 0, SR_BOTH);
for (pp = $5->begin(); pp != $5->end(); pp++) {
for (pp = $5->begin(); pp != $5->end(); ++ pp ) {
if ((*pp).second) {
pform_make_reginit(@1, (*pp).first, (*pp).second);
}

34
pform.cc
View File

@ -28,7 +28,6 @@
# include "PGenerate.h"
# include "PSpec.h"
# include "discipline.h"
# include "ivl_alloc.h"
# include <list>
# include <map>
# include <cassert>
@ -39,6 +38,7 @@
# include <cstdlib>
# include "ivl_assert.h"
# include "ivl_alloc.h"
map<perm_string,Module*> pform_modules;
map<perm_string,PUdp*> pform_primitives;
@ -471,7 +471,7 @@ void pform_set_timescale(int unit, int prec,
/* Look to see if we have any modules without a timescale. */
bool have_no_ts = false;
map<perm_string,Module*>::iterator mod;
for (mod = pform_modules.begin(); mod != pform_modules.end(); mod++) {
for (mod = pform_modules.begin(); mod != pform_modules.end(); ++ mod ) {
const Module*mp = (*mod).second;
if (mp->time_from_timescale ||
mp->timescale_warn_done) continue;
@ -489,7 +489,7 @@ void pform_set_timescale(int unit, int prec,
<< endl;
for (mod = pform_modules.begin()
; mod != pform_modules.end() ; mod++) {
; mod != pform_modules.end() ; ++ mod ) {
Module*mp = (*mod).second;
if (mp->time_from_timescale ||
mp->timescale_warn_done) continue;
@ -1100,8 +1100,7 @@ static void process_udp_table(PUdp*udp, list<string>*table,
svector<char> output (table->size());
{ unsigned idx = 0;
for (list<string>::iterator cur = table->begin()
; cur != table->end()
; cur ++, idx += 1) {
; cur != table->end() ; ++ cur , idx += 1) {
string tmp = *cur;
/* Pull the input values from the string. */
@ -1455,8 +1454,7 @@ void pform_set_net_range(list<perm_string>*names,
assert((range == 0) || (range->size() == 2));
for (list<perm_string>::iterator cur = names->begin()
; cur != names->end()
; cur ++ ) {
; cur != names->end() ; ++ cur ) {
perm_string txt = *cur;
pform_set_net_range(txt, range, signed_flag, dt, rt);
}
@ -1489,7 +1487,7 @@ static void pform_make_event(perm_string name, const char*fn, unsigned ln)
void pform_make_events(list<perm_string>*names, const char*fn, unsigned ln)
{
list<perm_string>::iterator cur;
for (cur = names->begin() ; cur != names->end() ; cur++) {
for (cur = names->begin() ; cur != names->end() ; ++ cur ) {
perm_string txt = *cur;
pform_make_event(txt, fn, ln);
}
@ -1938,8 +1936,7 @@ void pform_makewire(const vlltype&li,
PWSRType rt)
{
for (list<perm_string>::iterator cur = names->begin()
; cur != names->end()
; cur ++ ) {
; cur != names->end() ; ++ cur ) {
perm_string txt = *cur;
pform_makewire(li, txt, type, pt, dt, attr);
/* This has already been done for real variables. */
@ -2074,7 +2071,7 @@ svector<PWire*>*pform_make_task_ports(NetNet::PortType pt,
assert(names);
svector<PWire*>*res = new svector<PWire*>(0);
for (list<perm_string>::iterator cur = names->begin()
; cur != names->end() ; cur ++ ) {
; cur != names->end() ; ++ cur ) {
perm_string name = *cur;
@ -2367,8 +2364,7 @@ void pform_set_port_type(const struct vlltype&li,
NetNet::PortType pt)
{
for (list<perm_string>::iterator cur = names->begin()
; cur != names->end()
; cur ++ ) {
; cur != names->end() ; ++ cur ) {
perm_string txt = *cur;
pform_set_port_type(txt, pt, li.text, li.first_line);
pform_set_net_range(txt, range, signed_flag, IVL_VT_NO_TYPE,
@ -2393,8 +2389,7 @@ static void pform_set_reg_integer(perm_string name)
void pform_set_reg_integer(list<perm_string>*names)
{
for (list<perm_string>::iterator cur = names->begin()
; cur != names->end()
; cur ++ ) {
; cur != names->end() ; ++ cur ) {
perm_string txt = *cur;
pform_set_reg_integer(txt);
}
@ -2414,8 +2409,7 @@ static void pform_set_reg_time(perm_string name)
void pform_set_reg_time(list<perm_string>*names)
{
for (list<perm_string>::iterator cur = names->begin()
; cur != names->end()
; cur ++ ) {
; cur != names->end() ; ++ cur ) {
perm_string txt = *cur;
pform_set_reg_time(txt);
}
@ -2436,8 +2430,7 @@ static void pform_set_integer_2atom(uint64_t width, bool signed_flag, perm_strin
void pform_set_integer_2atom(uint64_t width, bool signed_flag, list<perm_string>*names)
{
for (list<perm_string>::iterator cur = names->begin()
; cur != names->end()
; cur ++ ) {
; cur != names->end() ; ++ cur ) {
perm_string txt = *cur;
pform_set_integer_2atom(width, signed_flag, txt);
}
@ -2487,8 +2480,7 @@ svector<PWire*>* pform_make_udp_input_ports(list<perm_string>*names)
unsigned idx = 0;
for (list<perm_string>::iterator cur = names->begin()
; cur != names->end()
; cur ++ ) {
; cur != names->end() ; ++ cur ) {
perm_string txt = *cur;
PWire*pp = new PWire(txt,
NetNet::IMPLICIT,

4
pform_disciplines.cc
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008 Stephen Williams (steve@icarus.com)
* Copyright (c) 2008-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@ -188,7 +188,7 @@ void pform_attach_discipline(const struct vlltype&loc,
ivl_discipline_t discipline, list<perm_string>*names)
{
for (list<perm_string>::iterator cur = names->begin()
; cur != names->end() ; cur ++ ) {
; cur != names->end() ; ++ cur ) {
PWire* cur_net = pform_get_wire_in_scope(*cur);
if (cur_net == 0) {

54
pform_dump.cc
View File

@ -89,7 +89,7 @@ ostream& operator<< (ostream&out, const name_component_t&that)
typedef std::list<index_component_t>::const_iterator index_it_t;
for (index_it_t idx = that.index.begin()
; idx != that.index.end() ; idx++) {
; idx != that.index.end() ; ++ idx ) {
out << *idx;
}
@ -103,10 +103,10 @@ ostream& operator<< (ostream&o, const pform_name_t&that)
cur = that.begin();
o << *cur;
cur++;
++ cur;
while (cur != that.end()) {
o << "." << *cur;
cur++;
++ cur;
}
return o;
@ -149,7 +149,7 @@ static void dump_attributes_map(ostream&out,
int ind)
{
for (map<perm_string,PExpr*>::const_iterator idx = attributes.begin()
; idx != attributes.end() ; idx++ ) {
; idx != attributes.end() ; ++ idx ) {
out << setw(ind) << "" << "(* " << (*idx).first;
if ((*idx).second) {
@ -1008,28 +1008,28 @@ void PGenerate::dump(ostream&out, unsigned indent) const
dump_wires_(out, indent+2);
for (list<PGate*>::const_iterator idx = gates.begin()
; idx != gates.end() ; idx++) {
; idx != gates.end() ; ++ idx ) {
(*idx)->dump(out, indent+2);
}
for (list<PProcess*>::const_iterator idx = behaviors.begin()
; idx != behaviors.end() ; idx++) {
; idx != behaviors.end() ; ++ idx ) {
(*idx)->dump(out, indent+2);
}
for (list<AProcess*>::const_iterator idx = analog_behaviors.begin()
; idx != analog_behaviors.end() ; idx++) {
; idx != analog_behaviors.end() ; ++ idx ) {
(*idx)->dump(out, indent+2);
}
typedef map<perm_string,LineInfo*>::const_iterator genvar_iter_t;
for (genvar_iter_t cur = genvars.begin()
; cur != genvars.end() ; cur++) {
; cur != genvars.end() ; ++ cur ) {
out << setw(indent+2) << "" << "genvar " << ((*cur).first) << ";" << endl;
}
for (list<PGenerate*>::const_iterator idx = generate_schemes.begin()
; idx != generate_schemes.end() ; idx++) {
; idx != generate_schemes.end() ; ++ idx ) {
(*idx)->dump(out, indent+2);
}
@ -1044,7 +1044,7 @@ void LexicalScope::dump_parameters_(ostream&out, unsigned indent) const
{
typedef map<perm_string,param_expr_t>::const_iterator parm_iter_t;
for (parm_iter_t cur = parameters.begin()
; cur != parameters.end() ; cur ++) {
; cur != parameters.end() ; ++ cur ) {
out << setw(indent) << "" << "parameter "
<< (*cur).second.type << " ";
if ((*cur).second.signed_flag)
@ -1093,7 +1093,7 @@ void LexicalScope::dump_localparams_(ostream&out, unsigned indent) const
{
typedef map<perm_string,param_expr_t>::const_iterator parm_iter_t;
for (parm_iter_t cur = localparams.begin()
; cur != localparams.end() ; cur ++) {
; cur != localparams.end() ; ++ cur ) {
out << setw(indent) << "" << "localparam ";
if ((*cur).second.msb)
out << "[" << *(*cur).second.msb << ":"
@ -1125,7 +1125,7 @@ void LexicalScope::dump_enumerations_(ostream&out, unsigned indent) const
void LexicalScope::dump_events_(ostream&out, unsigned indent) const
{
for (map<perm_string,PEvent*>::const_iterator cur = events.begin()
; cur != events.end() ; cur ++ ) {
; cur != events.end() ; ++ cur ) {
PEvent*ev = (*cur).second;
out << setw(indent) << "" << "event " << ev->name() << "; // "
<< ev->get_fileline() << endl;
@ -1136,7 +1136,7 @@ void LexicalScope::dump_wires_(ostream&out, unsigned indent) const
{
// Iterate through and display all the wires.
for (map<perm_string,PWire*>::const_iterator wire = wires.begin()
; wire != wires.end() ; wire ++ ) {
; wire != wires.end() ; ++ wire ) {
(*wire).second->dump(out, indent);
}
@ -1147,7 +1147,7 @@ void Module::dump(ostream&out) const
if (attributes.begin() != attributes.end()) {
out << "(* ";
for (map<perm_string,PExpr*>::const_iterator idx = attributes.begin()
; idx != attributes.end() ; idx++ ) {
; idx != attributes.end() ; ++ idx ) {
if (idx != attributes.begin()) {
out << " , ";
}
@ -1187,26 +1187,26 @@ void Module::dump(ostream&out) const
typedef map<perm_string,LineInfo*>::const_iterator genvar_iter_t;
for (genvar_iter_t cur = genvars.begin()
; cur != genvars.end() ; cur++) {
; cur != genvars.end() ; ++ cur ) {
out << " genvar " << ((*cur).first) << ";" << endl;
}
typedef list<PGenerate*>::const_iterator genscheme_iter_t;
for (genscheme_iter_t cur = generate_schemes.begin()
; cur != generate_schemes.end() ; cur++) {
; cur != generate_schemes.end() ; ++ cur ) {
(*cur)->dump(out, 4);
}
typedef map<perm_string,PExpr*>::const_iterator specparm_iter_t;
for (specparm_iter_t cur = specparams.begin()
; cur != specparams.end() ; cur ++) {
; cur != specparams.end() ; ++ cur ) {
out << " specparam " << (*cur).first << " = "
<< *(*cur).second << ";" << endl;
}
typedef list<Module::named_expr_t>::const_iterator parm_hiter_t;
for (parm_hiter_t cur = defparms.begin()
; cur != defparms.end() ; cur ++) {
; cur != defparms.end() ; ++ cur ) {
out << " defparam " << (*cur).first << " = ";
if ((*cur).second)
out << *(*cur).second << ";" << endl;
@ -1222,7 +1222,7 @@ void Module::dump(ostream&out) const
// Dump the task definitions.
typedef map<perm_string,PTask*>::const_iterator task_iter_t;
for (task_iter_t cur = tasks.begin()
; cur != tasks.end() ; cur ++) {
; cur != tasks.end() ; ++ cur ) {
out << " task " << (*cur).first << ";" << endl;
(*cur).second->dump(out, 6);
out << " endtask;" << endl;
@ -1231,7 +1231,7 @@ void Module::dump(ostream&out) const
// Dump the function definitions.
typedef map<perm_string,PFunction*>::const_iterator func_iter_t;
for (func_iter_t cur = funcs.begin()
; cur != funcs.end() ; cur ++) {
; cur != funcs.end() ; ++ cur ) {
out << " function " << (*cur).first << ";" << endl;
(*cur).second->dump(out, 6);
out << " endfunction;" << endl;
@ -1240,28 +1240,25 @@ void Module::dump(ostream&out) const
// Iterate through and display all the gates
for (list<PGate*>::const_iterator gate = gates_.begin()
; gate != gates_.end()
; gate ++ ) {
; gate != gates_.end() ; ++ gate ) {
(*gate)->dump(out);
}
for (list<PProcess*>::const_iterator behav = behaviors.begin()
; behav != behaviors.end()
; behav ++ ) {
; behav != behaviors.end() ; ++ behav ) {
(*behav)->dump(out, 4);
}
for (list<AProcess*>::const_iterator idx = analog_behaviors.begin()
; idx != analog_behaviors.end() ; idx++) {
; idx != analog_behaviors.end() ; ++ idx) {
(*idx)->dump(out, 4);
}
for (list<PSpecPath*>::const_iterator spec = specify_paths.begin()
; spec != specify_paths.end()
; spec ++ ) {
; spec != specify_paths.end() ; ++ spec ) {
(*spec)->dump(out, 4);
}
@ -1304,8 +1301,7 @@ void PUdp::dump(ostream&out) const
// Dump the attributes for the primitive as attribute
// statements.
for (map<string,PExpr*>::const_iterator idx = attributes.begin()
; idx != attributes.end()
; idx ++) {
; idx != attributes.end() ; ++ idx ) {
out << " attribute " << (*idx).first;
if ((*idx).second)
out << " = " << *(*idx).second;

37
set_width.cc
View File

@ -103,7 +103,7 @@ bool NetEBAdd::set_width(unsigned w, bool)
}
expr_width(wid);
return wid == w;
return w == wid;
}
void NetEBAdd::cast_signed(bool sign_flag)
@ -168,7 +168,7 @@ bool NetEBBits::set_width(unsigned w, bool)
*/
bool NetEBComp::set_width(unsigned w, bool)
{
return (w == 1);
return w == 1;
}
/*
@ -199,7 +199,7 @@ bool NetEBLogic::set_width(unsigned w, bool)
flag = left_->set_width(right_->expr_width());
if (!flag)
flag = right_->set_width(left_->expr_width());
return (w == 1);
return w == 1;
}
/*
@ -230,7 +230,7 @@ void NetEBMult::cast_signed(bool sign_flag)
cast_signed_base_(sign_flag);
}
bool NetEBPow::set_width(unsigned w, bool last_chance)
bool NetEBPow::set_width(unsigned w, bool)
{
return w == expr_width();
}
@ -242,8 +242,6 @@ bool NetEBPow::set_width(unsigned w, bool last_chance)
*/
bool NetEBShift::set_width(unsigned w, bool)
{
bool flag = true;
switch (op()) {
case 'l':
@ -263,9 +261,8 @@ bool NetEBShift::set_width(unsigned w, bool)
}
expr_width(left_->expr_width());
flag = expr_width() == w;
return flag;
return w == expr_width();
}
/*
@ -287,8 +284,7 @@ bool NetEConcat::set_width(unsigned w, bool)
sum *= repeat();
expr_width(sum);
if (sum != w) return false;
return true;
return w == sum;
}
bool NetEConst::set_width(unsigned w, bool last_chance)
@ -365,7 +361,7 @@ bool NetEConst::set_width(unsigned w, bool last_chance)
tmp.has_sign(value_.has_sign());
value_ = tmp;
expr_width(use_w);
return use_w == w;
return w == use_w;
}
}
@ -414,12 +410,9 @@ bool NetEParam::set_width(unsigned, bool)
return false;
}
bool NetESelect::set_width(unsigned w, bool)
bool NetESelect::set_width(unsigned, bool)
{
if (expr_width() == 1)
return true;
else
return false;
return expr_width() == 1;
}
bool NetESFunc::set_width(unsigned w, bool)
@ -433,10 +426,7 @@ bool NetESFunc::set_width(unsigned w, bool)
*/
bool NetESignal::set_width(unsigned w, bool)
{
if (w != vector_width())
return false;
return true;
return w == vector_width();
}
bool NetETernary::set_width(unsigned w, bool last_chance)
@ -465,12 +455,9 @@ bool NetETernary::set_width(unsigned w, bool last_chance)
* width. What I really need to do is note the width of the output
* parameter of the function definition and take that into account.
*/
bool NetEUFunc::set_width(unsigned wid, bool)
bool NetEUFunc::set_width(unsigned w, bool)
{
if (result_sig_->expr_width() == wid)
return true;
else
return false;
return w == result_sig_->expr_width();
}
bool NetEUnary::set_width(unsigned w, bool)

15
syn-rules.y
View File

@ -1,7 +1,7 @@
%{
/*
* Copyright (c) 2000-2008 Stephen Williams (steve@icarus.com)
* Copyright (c) 2000-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@ -53,7 +53,7 @@ static int yylex();
static void yyerror(const char*);
static Design*des_;
static void make_DFF_CE(Design*des, NetProcTop*top, NetEvWait*wclk,
static void make_DFF_CE(Design*des, NetProcTop*top,
NetEvent*eclk, NetExpr*cexp, NetAssignBase*asn);
%}
@ -80,13 +80,11 @@ start
flip-flops. */
: S_ALWAYS '@' '(' S_EVENT ')' S_ASSIGN ';'
{ make_DFF_CE(des_, $1->top, $2->evwait, $4->event,
0, $6->assign);
{ make_DFF_CE(des_, $1->top, $4->event, 0, $6->assign);
}
| S_ALWAYS '@' '(' S_EVENT ')' S_IF S_EXPR S_ASSIGN ';' ';'
{ make_DFF_CE(des_, $1->top, $2->evwait, $4->event,
$7->expr, $8->assign);
{ make_DFF_CE(des_, $1->top, $4->event, $7->expr, $8->assign);
}
/* Unconditional assignments in initial blocks should be made into
@ -102,6 +100,7 @@ static void hookup_DFF_CE(NetFF*ff, NetESignal*d, NetEvProbe*pclk,
NetNet*ce, NetAssign_*a, unsigned rval_pinoffset)
{
assert(rval_pinoffset == 0);
// a->sig() is a *NetNet, which doesn't have the loff_ and
// lwid_ context. Add the correction for loff_ ourselves.
@ -129,7 +128,7 @@ static void hookup_DFF_CE(NetFF*ff, NetESignal*d, NetEvProbe*pclk,
a->turn_sig_to_wire_on_release();
}
static void make_DFF_CE(Design*des, NetProcTop*top, NetEvWait*wclk,
static void make_DFF_CE(Design*des, NetProcTop*top,
NetEvent*eclk, NetExpr*cexp, NetAssignBase*asn)
{
assert(asn);
@ -335,7 +334,7 @@ static int yylex()
struct syn_rules_f : public functor_t {
~syn_rules_f() { }
void process(class Design*des, class NetProcTop*top)
void process(class Design*, class NetProcTop*top)
{
/* If the scope that contains this process as a cell
attribute attached to it, then skip synthesis. */

53
synth2.cc
View File

@ -26,13 +26,12 @@
# include <cassert>
bool NetProc::synth_async(Design*des, NetScope*scope,
const NetBus&nex_map, NetBus&nex_out)
bool NetProc::synth_async(Design*, NetScope*, const NetBus&, NetBus&)
{
return false;
}
bool NetProc::synth_sync(Design*des, NetScope*scope, NetFF*ff,
bool NetProc::synth_sync(Design*des, NetScope*scope, NetFF* /*ff*/,
const NetBus&nex_map, NetBus&nex_out,
const svector<NetEvProbe*>&events)
{
@ -58,7 +57,7 @@ bool NetProc::synth_sync(Design*des, NetScope*scope, NetFF*ff,
* r-value.
*/
bool NetAssignBase::synth_async(Design*des, NetScope*scope,
const NetBus&nex_map, NetBus&nex_out)
const NetBus& /*nex_map*/, NetBus&nex_out)
{
NetNet*rsig = rval_->synthesize(des, scope, rval_);
assert(rsig);
@ -152,7 +151,7 @@ bool NetBlock::synth_async(Design*des, NetScope*scope,
}
bool NetCase::synth_async(Design*des, NetScope*scope,
const NetBus&nex_map, NetBus&nex_out)
const NetBus& /*nex_map*/, NetBus&nex_out)
{
/* Synthesize the select expression. */
NetNet*esig = expr_->synthesize(des, scope, expr_);
@ -237,9 +236,13 @@ bool NetCase::synth_async(Design*des, NetScope*scope,
return true;
}
bool NetCondit::synth_async(Design*des, NetScope*scope,
const NetBus&nex_map, NetBus&nex_out)
bool NetCondit::synth_async(Design*des, NetScope* /*scope*/,
const NetBus& /*nex_map*/, NetBus& /*nex_out*/)
{
cerr << get_fileline() << ": sorry: "
<< "Forgot to implement NetCondit::synth_async" << endl;
des->errors += 1;
return false;
#if 0
NetNet*ssig = expr_->synthesize(des);
assert(ssig);
@ -295,11 +298,6 @@ bool NetCondit::synth_async(Design*des, NetScope*scope,
DEBUG_SYNTH2_EXIT("NetCondit",true)
return true;
#else
cerr << get_fileline() << ": sorry: "
<< "Forgot to implement NetCondit::synth_async" << endl;
des->errors += 1;
return false;
#endif
}
@ -351,13 +349,17 @@ bool NetProcTop::synth_async(Design*des)
* This needs to be split into a DFF bank for each statement, because
* the statements may each infer different reset and enable signals.
*/
bool NetBlock::synth_sync(Design*des, NetScope*scope, NetFF*ff,
const NetBus&nex_map, NetBus&nex_out,
const svector<NetEvProbe*>&events_in)
bool NetBlock::synth_sync(Design*des, NetScope* /*scope*/, NetFF* /*ff*/,
const NetBus& /*nex_map*/, NetBus& /*nex_out*/,
const svector<NetEvProbe*>& /*events_in*/)
{
if (last_ == 0) {
return true;
}
cerr << get_fileline() << ": sorry: "
<< "Forgot to implement NetBlock::synth_sync" << endl;
des->errors += 1;
return false;
#if 0
bool flag = true;
@ -503,12 +505,6 @@ bool NetBlock::synth_sync(Design*des, NetScope*scope, NetFF*ff,
return flag;
#else
cerr << get_fileline() << ": sorry: "
<< "Forgot to implement NetBlock::synth_sync"
<< endl;
des->errors += 1;
return false;
#endif
}
@ -518,10 +514,14 @@ bool NetBlock::synth_sync(Design*des, NetScope*scope, NetFF*ff,
* asynchronous set/reset, depending on whether the pin of the
* expression is connected to an event, or not.
*/
bool NetCondit::synth_sync(Design*des, NetScope*scope, NetFF*ff,
const NetBus&nex_map, NetBus&nex_out,
const svector<NetEvProbe*>&events_in)
bool NetCondit::synth_sync(Design*des, NetScope* /*scope*/, NetFF* /*ff*/,
const NetBus& /*nex_map*/, NetBus& /*nex_out*/,
const svector<NetEvProbe*>& /*events_in*/)
{
cerr << get_fileline() << ": sorry: "
<< "Forgot to implement NetCondit::synth_sync" << endl;
des->errors += 1;
return false;
#if 0
/* First try to turn the condition expression into an
asynchronous set/reset. If the condition expression has
@ -726,11 +726,6 @@ bool NetCondit::synth_sync(Design*des, NetScope*scope, NetFF*ff,
return flag;
#else
cerr << get_fileline() << ": sorry: "
<< "Forgot to implement NetCondit::synth_sync" << endl;
des->errors += 1;
return false;
#endif
}

2
t-dll-analog.cc
View File

@ -22,13 +22,13 @@
# include <iostream>
# include "ivl_alloc.h"
# include <cstring>
# include "target.h"
# include "ivl_target.h"
# include "compiler.h"
# include "t-dll.h"
# include <cstdlib>
# include "ivl_alloc.h"
bool dll_target::process(const NetAnalogTop*net)
{

4
t-dll-api.cc
View File

@ -22,10 +22,10 @@
# include "t-dll.h"
# include "discipline.h"
# include "netenum.h"
# include "ivl_alloc.h"
# include <cstdlib>
# include <cstdio>
# include <cstring>
# include "ivl_alloc.h"
static StringHeap api_strings;
@ -1683,7 +1683,7 @@ extern "C" int ivl_scope_children(ivl_scope_t net,
void*cd)
{
for (map<hname_t,ivl_scope_t>::iterator cur = net->children.begin()
; cur != net->children.end() ; cur ++) {
; cur != net->children.end() ; ++ cur ) {
int rc = func(cur->second, cd);
if (rc != 0)
return rc;

2
t-dll-expr.cc
View File

@ -19,7 +19,6 @@
# include "config.h"
# include "ivl_alloc.h"
# include <iostream>
# include <cstring>
@ -27,6 +26,7 @@
# include "netlist.h"
# include <cassert>
# include <cstdlib>
# include "ivl_alloc.h"
/*
* This is a little convenience function for converting a NetExpr

2
t-dll-proc.cc
View File

@ -22,13 +22,13 @@
# include <iostream>
# include "ivl_alloc.h"
# include <cstring>
# include "target.h"
# include "ivl_target.h"
# include "compiler.h"
# include "t-dll.h"
# include <cstdlib>
# include "ivl_alloc.h"
bool dll_target::process(const NetProcTop*net)
{

14
t-dll.cc
View File

@ -21,7 +21,6 @@
# include <iostream>
# include "ivl_alloc.h"
# include <cstring>
# include <cstdio> // sprintf()
# include "compiler.h"
@ -30,6 +29,7 @@
# include "discipline.h"
# include <cstdlib>
# include "ivl_assert.h"
# include "ivl_alloc.h"
struct dll_target dll_target_obj;
@ -363,7 +363,7 @@ static void nexus_lpm_add(ivl_nexus_t nex, ivl_lpm_t net, unsigned pin,
nex->ptrs_[top].type_= __NEXUS_PTR_LPM;
nex->ptrs_[top].drive0 = drive0;
nex->ptrs_[top].drive1 = drive0;
nex->ptrs_[top].drive1 = drive1;
nex->ptrs_[top].pin_ = pin;
nex->ptrs_[top].l.lpm= net;
}
@ -473,7 +473,7 @@ void dll_target::make_scope_parameters(ivl_scope_t scop, const NetScope*net)
typedef map<perm_string,NetScope::param_expr_t>::const_iterator pit_t;
for (pit_t cur_pit = net->parameters.begin()
; cur_pit != net->parameters.end() ; cur_pit ++) {
; cur_pit != net->parameters.end() ; ++ cur_pit ) {
assert(idx < scop->nparam_);
ivl_parameter_t cur_par = scop->param_ + idx;
@ -487,7 +487,7 @@ void dll_target::make_scope_parameters(ivl_scope_t scop, const NetScope*net)
idx += 1;
}
for (pit_t cur_pit = net->localparams.begin()
; cur_pit != net->localparams.end() ; cur_pit ++) {
; cur_pit != net->localparams.end() ; ++ cur_pit ) {
assert(idx < scop->nparam_);
ivl_parameter_t cur_par = scop->param_ + idx;
@ -608,7 +608,7 @@ bool dll_target::start_design(const Design*des)
des_.disciplines.resize(disciplines.size());
unsigned idx = 0;
for (map<perm_string,ivl_discipline_t>::const_iterator cur = disciplines.begin()
; cur != disciplines.end() ; cur ++) {
; cur != disciplines.end() ; ++ cur ) {
des_.disciplines[idx] = cur->second;
idx += 1;
}
@ -616,7 +616,7 @@ bool dll_target::start_design(const Design*des)
root_scopes = des->find_root_scopes();
for (list<NetScope*>::const_iterator scop = root_scopes.begin();
scop != root_scopes.end(); scop++)
scop != root_scopes.end(); ++ scop )
add_root(des_, *scop);
@ -2222,7 +2222,7 @@ bool dll_target::net_literal(const NetLiteral*net)
return true;
}
void dll_target::net_probe(const NetEvProbe*net)
void dll_target::net_probe(const NetEvProbe*)
{
}

14
target.cc
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 1998-2008 Stephen Williams <steve@icarus.com>
* Copyright (c) 1998-2010 Stephen Williams <steve@icarus.com>
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@ -224,14 +224,14 @@ bool target_t::net_const(const NetConst*)
return false;
}
bool target_t::net_sysfunction(const NetSysFunc*net)
bool target_t::net_sysfunction(const NetSysFunc*)
{
cerr << "target (" << typeid(*this).name() << "): "
"Unhandled NetSysFunc node." << endl;
return false;
}
bool target_t::net_function(const NetUserFunc*net)
bool target_t::net_function(const NetUserFunc*)
{
cerr << "target (" << typeid(*this).name() << "): "
"Unhandled NetUserFunc node." << endl;
@ -252,21 +252,21 @@ void target_t::net_probe(const NetEvProbe*net)
net->dump_node(cerr, 4);
}
bool target_t::sign_extend(const NetSignExtend*net)
bool target_t::sign_extend(const NetSignExtend*)
{
cerr << "target (" << typeid(*this).name() << "): "
"Unhandled NetSignExtend node." << endl;
return false;
}
bool target_t::process(const NetProcTop*top)
bool target_t::process(const NetProcTop*)
{
cerr << "target (" << typeid(*this).name() << "): "
"Unhandled process(NetProcTop)." << endl;
return false;
}
bool target_t::process(const NetAnalogTop*top)
bool target_t::process(const NetAnalogTop*)
{
cerr << "target (" << typeid(*this).name() << "): "
"Unhandled process(NetAnalogTop)." << endl;
@ -353,7 +353,7 @@ bool target_t::proc_disable(const NetDisable*obj)
return false;
}
bool target_t::proc_force(const NetForce*dev)
bool target_t::proc_force(const NetForce*)
{
cerr << "target (" << typeid(*this).name() << "): "
"Unhandled proc_force." << endl;

2
tgt-fpga/d-generic-edif.c
View File

@ -19,10 +19,10 @@
# include "device.h"
# include "fpga_priv.h"
# include "ivl_alloc.h"
# include <stdlib.h>
# include <string.h>
# include <assert.h>
# include "ivl_alloc.h"
struct nexus_recall {
struct nexus_recall*next;

2
tgt-fpga/edif.c
View File

@ -18,10 +18,10 @@
*/
# include "edif.h"
# include "ivl_alloc.h"
# include <stdlib.h>
# include <string.h>
# include <assert.h>
# include "ivl_alloc.h"
typedef enum property_e {
PRP_NONE = 0,

2
tgt-fpga/mangle.c
View File

@ -18,9 +18,9 @@
*/
# include "fpga_priv.h"
# include "ivl_alloc.h"
# include <string.h>
# include <stdlib.h>
# include "ivl_alloc.h"
static size_t xnf_mangle_scope_name(ivl_scope_t net, char*buf, size_t nbuf)
{

2
tgt-fpga/xilinx.c
View File

@ -21,10 +21,10 @@
# include "generic.h"
# include "xilinx.h"
# include "fpga_priv.h"
# include "ivl_alloc.h"
# include <stdlib.h>
# include <string.h>
# include <assert.h>
# include "ivl_alloc.h"
edif_cell_t xilinx_cell_buf(edif_xlibrary_t xlib)
{

2
tgt-pal/emit_jed.c
View File

@ -20,10 +20,10 @@
# include "config.h"
# include "priv.h"
# include "ivl_alloc.h"
# include <stdio.h>
# include <stdlib.h>
# include <assert.h>
# include "ivl_alloc.h"
static void draw_macrocell_modes(FILE*jfd)
{

2
tgt-pal/fit_log.c
View File

@ -20,11 +20,11 @@
# include "config.h"
# include "ivl_target.h"
# include "ivl_alloc.h"
# include <stdio.h>
# include <stdlib.h>
# include <assert.h>
# include "priv.h"
# include "ivl_alloc.h"
/*
* By the time we get here, all the flip-flops have been placed in

2
tgt-pal/imain.c
View File

@ -25,10 +25,10 @@
# include "priv.h"
# include "ivl_alloc.h"
# include <stdio.h>
# include <stdlib.h>
# include <assert.h>
# include "ivl_alloc.h"
extern void dump_final_design(FILE*out);

2
tgt-stub/stub.c
View File

@ -28,11 +28,11 @@
# include "version_tag.h"
# include "config.h"
# include "priv.h"
# include "ivl_alloc.h"
# include <stdlib.h>
# include <inttypes.h>
# include <string.h>
# include <assert.h>
# include "ivl_alloc.h"
static const char*version_string =
"Icarus Verilog STUB Code Generator " VERSION " (" VERSION_TAG ")\n\n"

106
tgt-vvp/draw_net_input.c
View File

@ -18,12 +18,12 @@
*/
# include "vvp_priv.h"
# include "ivl_alloc.h"
# include <stdlib.h>
# include <math.h>
# include <string.h>
# include <inttypes.h>
# include <assert.h>
# include "ivl_alloc.h"
#ifdef __MINGW32__ /* MinGW has inconsistent %p output. */
#define snprintf _snprintf
@ -58,16 +58,30 @@ static ivl_signal_type_t signal_type_of_nexus(ivl_nexus_t nex)
static ivl_variable_type_t signal_data_type_of_nexus(ivl_nexus_t nex)
{
unsigned idx;
ivl_variable_type_t out = IVL_VT_NO_TYPE;
for (idx = 0 ; idx < ivl_nexus_ptrs(nex) ; idx += 1) {
ivl_variable_type_t vtype;
ivl_nexus_ptr_t ptr = ivl_nexus_ptr(nex, idx);
ivl_signal_t sig = ivl_nexus_ptr_sig(ptr);
if (sig == 0) continue;
return ivl_signal_data_type(sig);
vtype = ivl_signal_data_type(sig);
if (out == IVL_VT_NO_TYPE && vtype == IVL_VT_BOOL) {
out = vtype;
continue;
}
if (out != IVL_VT_LOGIC && vtype == IVL_VT_LOGIC) {
out = vtype;
continue;
}
if (vtype == IVL_VT_REAL) {
out = vtype;
break;
}
}
return IVL_VT_NO_TYPE;
return out;
}
static void draw_C4_repeated_constant(char bit_char, unsigned width)
@ -537,6 +551,70 @@ static char* draw_island_port(ivl_island_t island, int island_input_flag,
}
}
/*
* This routine is called to display an error message when a uwire or
* wire real has multiple drivers.
*/
typedef enum mdriver_type_e {
MDRV_UWIRE = 0,
MDRV_REAL = 1
} mdriver_type_t;
static void display_multi_driver_error(ivl_nexus_t nex, unsigned ndrivers,
mdriver_type_t type)
{
unsigned idx;
unsigned scope_len = -1;
ivl_signal_t sig = 0;
/* Find the signal. */
for (idx = 0 ; idx < ivl_nexus_ptrs(nex) ; idx += 1) {
ivl_nexus_ptr_t ptr = ivl_nexus_ptr(nex, idx);
ivl_signal_t tsig = ivl_nexus_ptr_sig(ptr);
if (tsig != 0) {
ivl_scope_t scope;
unsigned len;
if (ivl_signal_local(tsig)) continue;
/* If this is not a local signal then find the signal
* that has the shortest scope (is the furthest up
* the hierarchy). */
scope = ivl_signal_scope(tsig);
assert(scope);
len = strlen(ivl_scope_name(scope));
if (len < scope_len) {
scope_len = len;
sig = tsig;
}
}
}
assert(sig);
fprintf(stderr, "%s:%u: vvp.tgt error: ",
ivl_signal_file(sig), ivl_signal_lineno(sig));
switch (type) {
case MDRV_UWIRE:
if (ivl_signal_type(sig) != IVL_SIT_UWIRE) {
fprintf(stderr, "(implicit) ");
}
fprintf(stderr, "uwire");
break;
case MDRV_REAL:
assert(ivl_signal_type(sig) == IVL_SIT_TRI);
if (ivl_signal_data_type(sig) != IVL_VT_REAL) {
fprintf(stderr, "(implicit) ");
}
fprintf(stderr, "wire real");
break;
default:
assert(0);;
}
fprintf(stderr, " \"%s\" must have a single driver, found (%u).\n",
ivl_signal_basename(sig), ndrivers);
vvp_errors += 1;
}
/*
* This function draws the input to a net into a string. What that
* means is that it returns a static string that can be used to
@ -711,22 +789,7 @@ static void draw_net_input_x(ivl_nexus_t nex,
/* A uwire is a tri with only one driver. */
if (res == IVL_SIT_UWIRE) {
if (ndrivers > 1) {
unsigned uidx;
ivl_signal_t usig = 0;
/* Find the uwire signal. */
for (uidx = 0 ; uidx < ivl_nexus_ptrs(nex) ; uidx += 1) {
ivl_nexus_ptr_t ptr = ivl_nexus_ptr(nex, uidx);
usig = ivl_nexus_ptr_sig(ptr);
if (usig != 0) break;
}
assert(usig);
fprintf(stderr, "%s:%u: vvp.tgt error: uwire \"%s\" must "
"have a single driver, found (%u).\n",
ivl_signal_file(usig),
ivl_signal_lineno(usig),
ivl_signal_basename(usig), ndrivers);
vvp_errors += 1;
display_multi_driver_error(nex, ndrivers, MDRV_UWIRE);
}
res = IVL_SIT_TRI;
}
@ -757,6 +820,11 @@ static void draw_net_input_x(ivl_nexus_t nex,
return;
}
/* We currently only support one driver on real nets. */
if (ndrivers > 1 && signal_data_type_of_nexus(nex) == IVL_VT_REAL) {
display_multi_driver_error(nex, ndrivers, MDRV_REAL);
}
level = 0;
while (ndrivers) {
unsigned int inst;

2
tgt-vvp/draw_vpi.c
View File

@ -18,10 +18,10 @@
*/
# include "vvp_priv.h"
# include "ivl_alloc.h"
# include <string.h>
# include <stdlib.h>
# include <assert.h>
# include "ivl_alloc.h"
#ifdef __MINGW32__ /* MinGW has inconsistent %p output. */
#define snprintf _snprintf

2
tgt-vvp/eval_expr.c
View File

@ -18,10 +18,10 @@
*/
# include "vvp_priv.h"
# include "ivl_alloc.h"
# include <string.h>
# include <stdlib.h>
# include <assert.h>
# include "ivl_alloc.h"
static void draw_eval_expr_dest(ivl_expr_t expr, struct vector_info dest,
int ok_flags);

3
tgt-vvp/eval_real.c
View File

@ -160,7 +160,7 @@ static int draw_number_real(ivl_expr_t expr)
int res = allocate_word();
const char*bits = ivl_expr_bits(expr);
unsigned wid = ivl_expr_width(expr);
unsigned long mant = 0, mask = -1UL;
unsigned long mant = 0;
int vexp = 0x1000;
/* If this is a negative number, then arrange for the 2's
@ -176,7 +176,6 @@ static int draw_number_real(ivl_expr_t expr)
}
for (idx = 0 ; idx < wid && idx < IMM_WID ; idx += 1) {
mask <<= 1;
int cur_bit = bits[idx] == '1'? 1 : 0;
if (negate) {

2
tgt-vvp/modpath.c
View File

@ -18,10 +18,10 @@
*/
# include "vvp_priv.h"
# include "ivl_alloc.h"
# include <string.h>
# include <stdlib.h>
# include <assert.h>
# include "ivl_alloc.h"
#ifdef __MINGW32__ /* MinGW has inconsistent %p output. */
#define snprintf _snprintf

4
tgt-vvp/vvp_scope.c
View File

@ -18,12 +18,12 @@
*/
# include "vvp_priv.h"
# include "ivl_alloc.h"
# include <stdlib.h>
# include <math.h>
# include <string.h>
# include <inttypes.h>
# include <assert.h>
# include "ivl_alloc.h"
/*
* Escape non-symbol characters in ids, and quotes in strings.
@ -371,7 +371,7 @@ char* draw_Cr_to_string(double value)
}
sign = 0;
if (value < 0) {
if (value < 0.0 || (value == 0.0 && 1.0/value < 0.0)) {
sign = 0x4000;
value *= -1;
}

2
verinum.cc
View File

@ -170,7 +170,7 @@ verinum::verinum(uint64_t val, unsigned n)
/* The second argument is not used! It is there to make this
* constructor unique. */
verinum::verinum(double val, bool dummy)
verinum::verinum(double val, bool)
: has_len_(false), has_sign_(true), string_flag_(false)
{
bool is_neg = false;

4
verinum.h
View File

@ -1,7 +1,7 @@
#ifndef __verinum_H
#define __verinum_H
/*
* Copyright (c) 1998-2008 Stephen Williams (steve@icarus.com)
* Copyright (c) 1998-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@ -46,7 +46,7 @@ class verinum {
verinum(const V*v, unsigned nbits, bool has_len =true);
verinum(V, unsigned nbits =1, bool has_len =true);
verinum(uint64_t val, unsigned bits);
verinum(double val, bool dummy);
verinum(double val, bool);
verinum(const verinum&);
// Create a signed number, with an unspecified number of bits.

3
vpi/Makefile.in
View File

@ -89,7 +89,8 @@ distclean: clean
rm -f vpi_config.h stamp-vpi_config-h
cppcheck: $(O:.o=.c) $(OPP:.o=.cc) $(M:.o=.c) $(V:.o=.c)
cppcheck --enable=all -f $(INCLUDE_PATH) $^
cppcheck --enable=all -f --suppressions $(srcdir)/cppcheck.sup \
$(INCLUDE_PATH) $^
Makefile: $(srcdir)/Makefile.in ../config.status
cd ..; ./config.status --file=vpi/$@

41
vpi/cppcheck.sup Normal file
View File

@ -0,0 +1,41 @@
// The following three files are copied directly from GTKWave and we do not
// have control over them. Tony has a specific programming style so these
// problems will not be fixed.
// fstapi.c from GTKWave
variableScope:fstapi.c:1497
variableScope:fstapi.c:1614
variableScope:fstapi.c:1663
variableScope:fstapi.c:1664
variableScope:fstapi.c:2355
variableScope:fstapi.c:2670
variableScope:fstapi.c:2674
variableScope:fstapi.c:2675
// lxt2_write.c from GTKWave
variableScope:lxt2_write.c:63
variableScope:lxt2_write.c:523
variableScope:lxt2_write.c:581
variableScope:lxt2_write.c:587
variableScope:lxt2_write.c:1602
variableScope:lxt2_write.c:2049
// lxt_write.c from GTKWave
variableScope:lxt_write.c:31
variableScope:lxt_write.c:587
variableScope:lxt_write.c:640
variableScope:lxt_write.c:1056
variableScope:lxt_write.c:1057
variableScope:lxt_write.c:1058
variableScope:lxt_write.c:1841
variableScope:lxt_write.c:2586
variableScope:lxt_write.c:2587
variableScope:lxt_write.c:2588
variableScope:lxt_write.c:2589
// The routines in sys_random.c are exact copies from IEEE1364-2005 and
// they have scope warnings that we need to ignore.
variableScope:sys_random.c:46
variableScope:sys_random.c:69
variableScope:sys_random.c:92
variableScope:sys_random.c:147

199
vpi/fstapi.c
View File

@ -20,12 +20,17 @@
* DEALINGS IN THE SOFTWARE.
*/
#ifdef _WAVE_USE_CONFIG_HDR
#include <config.h>
#endif
#include "fstapi.h"
#include "fastlz.h"
#undef FST_DEBUG
#define FST_BREAK_SIZE (32 * 1024 * 1024)
#define FST_BREAK_SIZE (128 * 1024 * 1024)
#define FST_BREAK_ADD_SIZE (4 * 1024 * 1024)
#define FST_WRITER_STR "fstWriter"
#define FST_ID_NAM_SIZ (512)
#define FST_DOUBLE_ENDTEST (2.7182818284590452354)
@ -33,7 +38,6 @@
#define FST_HDR_DATE_SIZE (128)
#define FST_GZIO_LEN (32768)
#if defined(__i386__) || defined(__x86_64__) || defined(_AIX)
#define FST_DO_MISALIGNED_OPS
#endif
@ -42,10 +46,6 @@
#define FST_MACOSX
#endif
#if defined(__CYGWIN__) && defined(__GNUC__)
#define FST_USE_FWRITE_COMBINING
#endif
/***********************/
/*** ***/
@ -218,6 +218,19 @@ return(rc);
}
static uint32_t fstGetVarint32Length(unsigned char *mem)
{
unsigned char *mem_orig = mem;
while(*mem & 0x80)
{
mem++;
}
return(mem - mem_orig + 1);
}
static uint32_t fstGetVarint32NoSkip(unsigned char *mem)
{
unsigned char *mem_orig = mem;
@ -395,50 +408,6 @@ fstFwrite(buf, len, 1, handle);
return(len);
}
#ifndef FST_USE_FWRITE_COMBINING
static int fstWriterUint32WithVarint(FILE *handle, uint32_t *u, uint64_t v)
{
uint64_t nxt;
unsigned char buf[10 + sizeof(uint32_t)];
unsigned char *pnt = buf + sizeof(uint32_t);
int len;
memcpy(buf, u, sizeof(uint32_t));
while((nxt = v>>7))
{
*(pnt++) = (v&0x7f) | 0x80;
v = nxt;
}
*(pnt++) = (v&0x7f);
len = pnt-buf;
fstFwrite(buf, len, 1, handle);
return(len);
}
#else
static int fstWriterUint32WithVarint(FILE *handle, uint32_t *u, uint64_t v, const void *dbuf, size_t siz)
{
uint64_t nxt;
unsigned char buf[10 + sizeof(uint32_t) + siz]; /* gcc extension ok for cygwin */
unsigned char *pnt = buf + sizeof(uint32_t);
int len;
memcpy(buf, u, sizeof(uint32_t));
while((nxt = v>>7))
{
*(pnt++) = (v&0x7f) | 0x80;
v = nxt;
}
*(pnt++) = (v&0x7f);
memcpy(pnt, dbuf, siz);
len = pnt-buf + siz;
fstFwrite(buf, len, 1, handle);
return(len);
}
#endif
/***********************/
/*** ***/
@ -464,9 +433,10 @@ FILE *hier_handle;
FILE *geom_handle;
FILE *valpos_handle;
FILE *curval_handle;
FILE *vchn_handle;
FILE *tchn_handle;
unsigned char *vchg_mem;
off_t hier_file_len;
uint32_t *valpos_mem;
@ -486,7 +456,9 @@ off_t section_header_truncpos;
uint32_t tchn_cnt, tchn_idx;
uint64_t curtime;
uint64_t firsttime;
off_t vchn_siz;
uint32_t vchg_siz;
uint32_t vchg_alloc_siz;
uint32_t secnum;
off_t section_start;
@ -504,6 +476,7 @@ unsigned compress_hier : 1;
unsigned repack_on_close : 1;
unsigned skip_writing_section_hdr : 1;
unsigned size_limit_locked : 1;
unsigned section_header_only : 1;
/* should really be semaphores, but are bytes to cut down on read-modify-write window size */
unsigned char already_in_flush; /* in case control-c handlers interrupt */
@ -511,6 +484,33 @@ unsigned char already_in_close; /* in case control-c handlers interrupt */
};
static int fstWriterUint32WithVarint32(struct fstWriterContext *xc, uint32_t *u, uint32_t v, const void *dbuf, int siz)
{
unsigned char *buf = xc->vchg_mem + xc->vchg_siz;
unsigned char *pnt = buf;
uint32_t nxt;
int len;
#ifdef FST_DO_MISALIGNED_OPS
(*(uint32_t *)(pnt)) = (*(uint32_t *)(u));
#else
memcpy(pnt, u, sizeof(uint32_t));
#endif
pnt += 4;
while((nxt = v>>7))
{
*(pnt++) = (v&0x7f) | 0x80;
v = nxt;
}
*(pnt++) = (v&0x7f);
memcpy(pnt, dbuf, siz);
len = pnt-buf + siz;
return(len);
}
/*
* header bytes, write here so defines are set up before anything else
* that needs to use them
@ -664,11 +664,12 @@ if((!nam)||(!(xc->handle=fopen(nam, "w+b"))))
xc->geom_handle = tmpfile(); /* .geom */
xc->valpos_handle = tmpfile(); /* .offs */
xc->curval_handle = tmpfile(); /* .bits */
xc->vchn_handle = tmpfile(); /* .vchn */
xc->tchn_handle = tmpfile(); /* .tchn */
xc->vchg_alloc_siz = FST_BREAK_SIZE + FST_BREAK_ADD_SIZE;
xc->vchg_mem = malloc(xc->vchg_alloc_siz);
free(hf);
if(xc->hier_handle && xc->geom_handle && xc->valpos_handle && xc->curval_handle && xc->vchn_handle && xc->tchn_handle)
if(xc->hier_handle && xc->geom_handle && xc->valpos_handle && xc->curval_handle && xc->vchg_mem && xc->tchn_handle)
{
xc->filename = strdup(nam);
xc->is_initial_time = 1;
@ -682,8 +683,8 @@ if((!nam)||(!(xc->handle=fopen(nam, "w+b"))))
if(xc->geom_handle) fclose(xc->geom_handle);
if(xc->valpos_handle) fclose(xc->valpos_handle);
if(xc->curval_handle) fclose(xc->curval_handle);
if(xc->vchn_handle) fclose(xc->vchn_handle);
if(xc->tchn_handle) fclose(xc->tchn_handle);
free(xc->vchg_mem);
free(xc);
xc=NULL;
}
@ -703,6 +704,14 @@ if(xc && !xc->already_in_close && !xc->already_in_flush)
xc->already_in_close = 1; /* never need to zero this out as it is freed at bottom */
if(xc->section_header_only && xc->section_header_truncpos && (xc->vchg_siz <= 1) && (!xc->is_initial_time))
{
fstFtruncate(fileno(xc->handle), xc->section_header_truncpos);
fseeko(xc->handle, xc->section_header_truncpos, SEEK_SET);
xc->section_header_only = 0;
}
else
{
xc->skip_writing_section_hdr = 1;
if(!xc->size_limit_locked)
{
@ -718,6 +727,7 @@ if(xc && !xc->already_in_close && !xc->already_in_flush)
}
fstWriterFlushContext(xc);
}
}
fstDestroyMmaps(xc, 1);
/* write out geom section */
@ -855,7 +865,7 @@ if(xc && !xc->already_in_close && !xc->already_in_flush)
fflush(xc->handle);
if(xc->tchn_handle) { fclose(xc->tchn_handle); xc->tchn_handle = NULL; }
if(xc->vchn_handle) { fclose(xc->vchn_handle); xc->vchn_handle = NULL; }
free(xc->vchg_mem); xc->vchg_mem = NULL;
if(xc->curval_handle) { fclose(xc->curval_handle); xc->curval_handle = NULL; }
if(xc->valpos_handle) { fclose(xc->valpos_handle); xc->valpos_handle = NULL; }
if(xc->geom_handle) { fclose(xc->geom_handle); xc->geom_handle = NULL; }
@ -969,6 +979,7 @@ if(xc)
fputc(FST_BL_SKIP, xc->handle); /* temporarily tag the section, use FST_BL_VCDATA on finalize */
xc->section_start = ftello(xc->handle);
xc->section_header_only = 1; /* indicates truncate might be needed */
fstWriterUint64(xc->handle, 0); /* placeholder = section length */
fstWriterUint64(xc->handle, xc->is_initial_time ? xc->firsttime : xc->curtime); /* begin time of section */
fstWriterUint64(xc->handle, xc->curtime); /* end time of section (placeholder) */
@ -1021,13 +1032,13 @@ uint32_t *vm4ip;
struct fstWriterContext *xc = (struct fstWriterContext *)ctx;
if((!xc)||(xc->vchn_siz <= 1)||(xc->already_in_flush)) return;
if((!xc)||(xc->vchg_siz <= 1)||(xc->already_in_flush)) return;
xc->already_in_flush = 1; /* should really do this with a semaphore */
scratchpad = malloc(xc->vchn_siz);
xc->section_header_only = 0;
scratchpad = malloc(xc->vchg_siz);
fflush(xc->vchn_handle);
vchg_mem = fstMmap(NULL, xc->vchn_siz, PROT_READ|PROT_WRITE, MAP_SHARED, fileno(xc->vchn_handle), 0);
vchg_mem = xc->vchg_mem;
f = xc->handle;
fstWriterVarint(f, xc->maxhandle); /* emit current number of handles */
@ -1049,9 +1060,12 @@ for(i=0;i<xc->maxhandle;i++)
vm4ip[2] = fpos;
scratchpnt = scratchpad + xc->vchn_siz; /* build this buffer backwards */
scratchpnt = scratchpad + xc->vchg_siz; /* build this buffer backwards */
if(vm4ip[1] == 1)
{
wrlen = fstGetVarint32Length(vchg_mem + offs + 4); /* used to advance and determine wrlen */
xc->curval_mem[vm4ip[0]] = vchg_mem[offs + 4 + wrlen]; /* checkpoint variable */
while(offs)
{
unsigned char val;
@ -1083,6 +1097,9 @@ for(i=0;i<xc->maxhandle;i++)
}
else
{
wrlen = fstGetVarint32Length(vchg_mem + offs + 4); /* used to advance and determine wrlen */
memcpy(xc->curval_mem + vm4ip[0], vchg_mem + offs + 4 + wrlen, vm4ip[1]); /* checkpoint variable */
while(offs)
{
int idx;
@ -1139,7 +1156,7 @@ for(i=0;i<xc->maxhandle;i++)
}
}
wrlen = scratchpad + xc->vchn_siz - scratchpnt;
wrlen = scratchpad + xc->vchg_siz - scratchpnt;
unc_memreq += wrlen;
if(wrlen > 32)
{
@ -1252,12 +1269,8 @@ if(zerocnt)
printf("value chains: %d\n", cnt);
#endif
fstMunmap(vchg_mem, xc->vchn_siz);
fseeko(xc->vchn_handle, 0, SEEK_SET);
fstFtruncate(fileno(xc->vchn_handle), 0);
fputc('!', xc->vchn_handle);
xc->vchn_siz = 1;
xc->vchg_mem[0] = '!';
xc->vchg_siz = 1;
endpos = ftello(xc->handle);
fstWriterUint64(xc->handle, endpos-indxpos); /* write delta index position at very end of block */
@ -1323,7 +1336,6 @@ if(xc->dump_size_limit)
}
}
if(!xc->skip_writing_section_hdr)
{
fstWriterEmitSectionHeader(xc); /* emit next section header */
@ -1594,12 +1606,12 @@ if(xc)
/*
* value and time change emission
*/
void fstWriterEmitValueChange(void *ctx, fstHandle handle, void *val)
void fstWriterEmitValueChange(void *ctx, fstHandle handle, const void *val)
{
struct fstWriterContext *xc = (struct fstWriterContext *)ctx;
unsigned char *buf = (unsigned char *)val;
const unsigned char *buf = (const unsigned char *)val;
uint32_t offs;
size_t len;
int len;
if((xc) && (handle <= xc->maxhandle))
{
@ -1614,24 +1626,33 @@ if((xc) && (handle <= xc->maxhandle))
handle--; /* move starting at 1 index to starting at 0 */
vm4ip = &(xc->valpos_mem[4*handle]);
offs = vm4ip[0];
len = vm4ip[1];
memcpy(xc->curval_mem + offs, buf, len);
if(!xc->is_initial_time)
{
fpos = xc->vchn_siz;
/* cygwin runs faster if these writes are combined, so the new fstWriterUint32WithVarint function, but should help with regular */
#ifndef FST_USE_FWRITE_COMBINING
xc->vchn_siz += fstWriterUint32WithVarint(xc->vchn_handle, &vm4ip[2], xc->tchn_idx - vm4ip[3]); /* prev_chg is vm4ip[2] */
fstFwrite(buf, len, 1, xc->vchn_handle);
xc->vchn_siz += len;
#else
xc->vchn_siz += fstWriterUint32WithVarint(xc->vchn_handle, &vm4ip[2], xc->tchn_idx - vm4ip[3], buf, len); /* do one fwrite op only */
#endif
fpos = xc->vchg_siz;
if((fpos + len + 10) > xc->vchg_alloc_siz)
{
xc->vchg_alloc_siz += FST_BREAK_ADD_SIZE;
xc->vchg_mem = realloc(xc->vchg_mem, xc->vchg_alloc_siz);
if(!xc->vchg_mem)
{
fprintf(stderr, "FATAL ERROR, could not realloc() in fstWriterEmitValueChange, exiting.\n");
exit(255);
}
}
xc->vchg_siz += fstWriterUint32WithVarint32(xc, &vm4ip[2], xc->tchn_idx - vm4ip[3], buf, len); /* do one fwrite op only */
vm4ip[3] = xc->tchn_idx;
vm4ip[2] = fpos;
}
else
{
offs = vm4ip[0];
memcpy(xc->curval_mem + offs, buf, len);
}
}
}
@ -1659,10 +1680,8 @@ if(xc)
xc->firsttime = (xc->vc_emitted) ? 0: tim;
xc->curtime = 0;
fseeko(xc->vchn_handle, 0, SEEK_SET);
fstFtruncate(fileno(xc->vchn_handle), 0);
fputc('!', xc->vchn_handle);
xc->vchn_siz = 1;
xc->vchg_mem[0] = '!';
xc->vchg_siz = 1;
fstWriterEmitSectionHeader(xc);
for(i=0;i<xc->maxhandle;i++)
{
@ -1673,7 +1692,7 @@ if(xc)
}
else
{
if(xc->vchn_siz >= FST_BREAK_SIZE)
if(xc->vchg_siz >= FST_BREAK_SIZE)
{
fstWriterFlushContext(xc);
xc->tchn_cnt++;
@ -3403,6 +3422,7 @@ for(;;)
printf("\tindx_pos: %d (%d bytes)\n", (int)indx_pos, (int)chain_clen);
#endif
chain_cmem = malloc(chain_clen);
if(!chain_cmem) goto block_err;
fseeko(xc->f, indx_pos, SEEK_SET);
fstFread(chain_cmem, chain_clen, 1, xc->f);
@ -3416,6 +3436,8 @@ for(;;)
chain_table_lengths = malloc((vc_maxhandle+1) * sizeof(uint32_t));
}
if(!chain_table || !chain_table_lengths) goto block_err;
pnt = chain_cmem;
idx = 0;
pval = 0;
@ -3783,6 +3805,7 @@ for(;;)
}
}
block_err:
free(tc_head);
free(chain_cmem);
free(mem_for_traversal);

4
vpi/fstapi.h
View File

@ -126,7 +126,7 @@ union {
/* if htyp == FST_HT_VAR */
struct fstHierVar {
unsigned char typ; /* FST_VT_VCD_EVENT ... FST_VT_VCD_WOR */
unsigned char typ; /* FST_VT_VCD_EVENT ... FST_VT_VCD_REALTIME */
unsigned char direction; /* FST_VD_IMPLICIT ... FST_VD_INOUT */
const char *name;
uint32_t length;
@ -157,7 +157,7 @@ void fstWriterSetTimescaleFromString(void *ctx, const char *s);
void fstWriterSetScope(void *ctx, enum fstScopeType scopetype,
const char *scopename, const char *scopecomp);
void fstWriterSetUpscope(void *ctx);
void fstWriterEmitValueChange(void *ctx, fstHandle handle, void *val);
void fstWriterEmitValueChange(void *ctx, fstHandle handle, const void *val);
void fstWriterEmitDumpActive(void *ctx, int enable);
void fstWriterEmitTimeChange(void *ctx, uint64_t tim);
void fstWriterFlushContext(void *ctx);

4
vpi/lxt_write.c
View File

@ -996,8 +996,8 @@ if(rgh) lt_recurse_dictionary_free(lt, rgh);
static int lt_dictval_compare(const void *v1, const void *v2)
{
const dslxt_Tree *s1 = *(const dslxt_Tree * const *)v1;
const dslxt_Tree *s2 = *(const dslxt_Tree * const *)v2;
dslxt_Tree *s1 = *(dslxt_Tree **)v1;
dslxt_Tree *s2 = *(dslxt_Tree **)v2;
if(s1->val > s2->val) return(1); else return(-1); /* they're *never* equal */
}

50
vpi/sdf_lexor.lex
View File

@ -45,6 +45,7 @@ static int yywrap(void)
%}
%x CCOMMENT
%x COND_EDGE_ID
%x EDGE_ID
%%
@ -64,14 +65,15 @@ static int yywrap(void)
\n { sdflloc.first_line += 1; }
/* The other edge identifiers. */
<EDGE_ID>"01" {return K_01; }
<EDGE_ID>"10" {return K_10; }
<EDGE_ID>"0"[zZ] {return K_0Z; }
<EDGE_ID>[zZ]"1" {return K_Z1; }
<EDGE_ID>"1"[zZ] {return K_1Z; }
<EDGE_ID>[zZ]"0" {return K_Z0; }
<EDGE_ID>[pP][oO][sS][eE][dD][gG][eE] {return K_POSEDGE; }
<EDGE_ID>[nN][eE][gG][eE][dD][gG][eE] {return K_NEGEDGE; }
<COND_EDGE_ID,EDGE_ID>"01" {return K_01; }
<COND_EDGE_ID,EDGE_ID>"10" {return K_10; }
<COND_EDGE_ID,EDGE_ID>"0"[zZ] {return K_0Z; }
<COND_EDGE_ID,EDGE_ID>[zZ]"1" {return K_Z1; }
<COND_EDGE_ID,EDGE_ID>"1"[zZ] {return K_1Z; }
<COND_EDGE_ID,EDGE_ID>[zZ]"0" {return K_Z0; }
<COND_EDGE_ID,EDGE_ID>[pP][oO][sS][eE][dD][gG][eE] {return K_POSEDGE; }
<COND_EDGE_ID,EDGE_ID>[nN][eE][gG][eE][dD][gG][eE] {return K_NEGEDGE; }
<COND_EDGE_ID>[cC][oO][nN][dD] {return K_COND; }
/* Integer values */
[0-9]+ {
@ -85,7 +87,7 @@ static int yywrap(void)
return REAL_NUMBER;
}
[a-zA-Z_][a-zA-Z0-9$_]* {
([a-zA-Z_]|(\\[^ \t\b\f\r\n]))([a-zA-Z0-9$_]|(\\[^ \t\b\f\r\n]))* {
return lookup_keyword(yytext);
}
@ -94,6 +96,17 @@ static int yywrap(void)
return QSTRING;
}
/* Scalar constants. */
("1"?"'"[bB])?"0" { return K_LOGICAL_ZERO; }
("1"?"'"[bB])?"1" { return K_LOGICAL_ONE; }
/* Equality operators. */
"==" { return K_EQ; }
"!=" { return K_NE; }
"===" { return K_CEQ; }
"!==" { return K_CNE; }
/* The HCHAR (hierarchy separator) is set by the SDF file itself. We
recognize here the HCHAR. */
[./] {
@ -142,9 +155,10 @@ static struct {
{ 0, IDENTIFIER }
};
void start_edge_id(void)
void start_edge_id(unsigned cond)
{
BEGIN(EDGE_ID);
if (cond) BEGIN(COND_EDGE_ID);
else BEGIN(EDGE_ID);
}
void stop_edge_id(void)
@ -154,12 +168,24 @@ void stop_edge_id(void)
static int lookup_keyword(const char*text)
{
int idx;
unsigned idx, len, skip;
for (idx = 0 ; keywords[idx].name ; idx += 1) {
if (strcasecmp(text, keywords[idx].name) == 0)
return keywords[idx].code;
}
/* Process any escaped characters. */
skip = 0;
len = strlen(yytext);
for (idx = 0; idx < len; idx += 1) {
if (yytext[idx] == '\\') {
skip += 1;
idx += 1;
}
yytext[idx-skip] = yytext[idx];
}
yytext[idx-skip] = 0;
yylval.string_val = strdup(yytext);
return IDENTIFIER;
}

53
vpi/sdf_parse.y
View File

@ -24,10 +24,10 @@ static void yyerror(const char*msg);
# include "vpi_user.h"
# include "sdf_parse_priv.h"
# include "sdf_priv.h"
# include "ivl_alloc.h"
# include <stdio.h>
# include <string.h>
# include <stdlib.h>
# include "ivl_alloc.h"
/* This is the hierarchy separator to use. */
char sdf_use_hchar = '.';
@ -44,12 +44,13 @@ char sdf_use_hchar = '.';
struct sdf_delval_list_s delval_list;
};
%token K_ABSOLUTE K_CELL K_CELLTYPE K_DATE K_DELAYFILE K_DELAY K_DESIGN
%token K_ABSOLUTE K_CELL K_CELLTYPE K_COND K_DATE K_DELAYFILE K_DELAY K_DESIGN
%token K_DIVIDER K_HOLD K_INCREMENT K_INSTANCE K_INTERCONNECT K_IOPATH
%token K_NEGEDGE K_POSEDGE K_PROCESS K_PROGRAM K_RECREM K_RECOVERY
%token K_REMOVAL K_SDFVERSION K_SETUP K_SETUPHOLD K_TEMPERATURE
%token K_TIMESCALE K_TIMINGCHECK K_VENDOR K_VERSION K_VOLTAGE K_WIDTH
%token K_01 K_10 K_0Z K_Z1 K_1Z K_Z0
%token K_EQ K_NE K_CEQ K_CNE K_LOGICAL_ONE K_LOGICAL_ZERO
%token HCHAR
%token <string_val> QSTRING IDENTIFIER
@ -284,14 +285,53 @@ tchk_def
| '(' K_HOLD port_tchk port_tchk rvalue ')'
| '(' K_SETUPHOLD port_tchk port_tchk rvalue rvalue ')'
| '(' K_RECOVERY port_tchk port_tchk rvalue ')'
| '(' K_REMOVAL port_tchk port_tchk rvalue ')'
| '(' K_RECREM port_tchk port_tchk rvalue rvalue ')'
| '(' K_REMOVAL port_tchk port_tchk rvalue ')'
| '(' K_WIDTH port_tchk rvalue ')'
;
port_tchk
: port_spec
/* | '(' K_COND qstring_opt timing_check_condition port_spec ')' */
: port_instance
/* This must only be an edge. For now we just accept everything. */
| cond_edge_start port_instance ')'
/* These must only be a cond. For now we just accept everything. */
| cond_edge_start timing_check_condition port_spec ')'
| cond_edge_start QSTRING timing_check_condition port_spec ')'
;
cond_edge_start
: '(' { start_edge_id(1); } cond_edge_identifier { stop_edge_id(); }
;
cond_edge_identifier
: K_POSEDGE
| K_NEGEDGE
| K_01
| K_10
| K_0Z
| K_Z1
| K_1Z
| K_Z0
| K_COND
;
timing_check_condition
: port_interconnect
| '~' port_interconnect
| '!' port_interconnect
| port_interconnect equality_operator scalar_constant
;
equality_operator
: K_EQ
| K_NE
| K_CEQ
| K_CNE
;
scalar_constant
: K_LOGICAL_ONE
| K_LOGICAL_ZERO
;
port_spec
@ -318,7 +358,7 @@ port_interconnect
;
port_edge
: '(' {start_edge_id();} edge_identifier {stop_edge_id();} port_instance ')'
: '(' {start_edge_id(0);} edge_identifier {stop_edge_id();} port_instance ')'
{ $$.vpi_edge = $3; $$.string_val = $5; }
;
@ -420,6 +460,7 @@ signed_real_number_opt
{ $$.value = $1;
$$.defined = 1;
}
;
signed_real_number
: REAL_NUMBER { $$ = $1; }

4
vpi/sdf_parse_priv.h
View File

@ -1,7 +1,7 @@
#ifndef _sdf_parse_priv_h
#define _sdf_parse_priv_h
/*
* Copyright (c) 2007-2009 Stephen Williams (steve@icarus.com)
* Copyright (c) 2007-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@ -35,7 +35,7 @@ extern const char*sdf_parse_path;
/* Hierarchy separator character to use. */
extern char sdf_use_hchar;
extern void start_edge_id(void);
extern void start_edge_id(unsigned cond);
extern void stop_edge_id(void);
#endif

2
vpi/stringheap.c
View File

@ -19,10 +19,10 @@
# include "sys_priv.h"
# include "stringheap.h"
# include "ivl_alloc.h"
# include <string.h>
# include <stdlib.h>
# include <assert.h>
# include "ivl_alloc.h"
struct stringheap_cell {
struct stringheap_cell*next;

2
vpi/sys_display.c
View File

@ -18,7 +18,6 @@
*/
# include "sys_priv.h"
# include "ivl_alloc.h"
# include <assert.h>
# include <string.h>
# include <errno.h>
@ -26,6 +25,7 @@
# include <stdio.h>
# include <stdlib.h>
# include <math.h>
# include "ivl_alloc.h"
#define IS_MCD(mcd) !((mcd)>>31&1)

2
vpi/sys_fileio.c
View File

@ -18,13 +18,13 @@
*/
# include "sys_priv.h"
# include "ivl_alloc.h"
# include <assert.h>
# include <ctype.h>
# include <errno.h>
# include <string.h>
# include <stdio.h>
# include <stdlib.h>
# include "ivl_alloc.h"
#define IS_MCD(mcd) !((mcd)>>31&1)

2
vpi/sys_fst.c
View File

@ -25,12 +25,12 @@
* This file contains the implementations of the FST related functions.
*/
# include "ivl_alloc.h"
# include <stdio.h>
# include <stdlib.h>
# include <string.h>
# include <assert.h>
# include <time.h>
# include "ivl_alloc.h"
static char *dump_path = NULL;
static struct fstContext *dump_file = NULL;

2
vpi/sys_lxt.c
View File

@ -26,13 +26,13 @@
* This file contains the implementations of the LXT related functions.
*/
# include "ivl_alloc.h"
# include <stdio.h>
# include <stdlib.h>
# include <string.h>
# include <assert.h>
# include <time.h>
# include "stringheap.h"
# include "ivl_alloc.h"
static char *dump_path = NULL;

2
vpi/sys_lxt2.c
View File

@ -26,13 +26,13 @@
* This file contains the implementations of the LXT2 related functions.
*/
# include "ivl_alloc.h"
# include <stdio.h>
# include <stdlib.h>
# include <string.h>
# include <time.h>
# include "stringheap.h"
# include <assert.h>
# include "ivl_alloc.h"
static char *dump_path = NULL;

2
vpi/sys_priv.c
View File

@ -18,11 +18,11 @@
*/
#include "sys_priv.h"
#include "ivl_alloc.h"
#include <assert.h>
#include <ctype.h>
#include <stdlib.h>
#include <string.h>
#include "ivl_alloc.h"
PLI_UINT64 timerec_to_time64(const struct t_vpi_time*timerec)
{

2
vpi/sys_random_mti.c
View File

@ -20,11 +20,11 @@
# include "sys_priv.h"
# include "sys_random.h"
# include "ivl_alloc.h"
# include <assert.h>
# include <stdlib.h>
# include <math.h>
# include <limits.h>
# include "ivl_alloc.h"
/*
* Implement the $random system function using the ``Mersenne

2
vpi/sys_readmem.c
View File

@ -18,7 +18,6 @@
*/
# include "sys_priv.h"
# include "ivl_alloc.h"
# include <ctype.h>
# include <string.h>
# include <stdlib.h>
@ -26,6 +25,7 @@
# include <assert.h>
# include "sys_readmem_lex.h"
# include <sys/stat.h>
# include "ivl_alloc.h"
char **search_list = NULL;
unsigned sl_count = 0;

2
vpi/sys_scanf.c
View File

@ -22,7 +22,6 @@
# define _SVID_SOURCE 1
# include "sys_priv.h"
# include "ivl_alloc.h"
# include <ctype.h>
# include <errno.h>
# include <string.h>
@ -30,6 +29,7 @@
# include <stdlib.h>
# include <math.h>
# include <assert.h>
# include "ivl_alloc.h"
struct byte_source {
const char*str;

6
vpi/sys_vcd.c
View File

@ -24,12 +24,12 @@
* This file contains the implementations of the VCD related functions.
*/
# include "ivl_alloc.h"
# include <stdio.h>
# include <stdlib.h>
# include <string.h>
# include <assert.h>
# include <time.h>
# include "ivl_alloc.h"
static char *dump_path = NULL;
static FILE *dump_file = NULL;
@ -76,9 +76,11 @@ static void gen_new_vcd_id(void)
v /= 94;
if(!v) {
vcdid[i+1] = '\0';
break;
return;
}
}
// This should never happen since 94**7 is a lot if identifiers!
assert(0);
}
static char *truncate_bitvec(char *s)

2
vpi/v2005_math.c
View File

@ -20,12 +20,12 @@
*/
#include "vpi_config.h"
#include "ivl_alloc.h"
#include <assert.h>
#include <math.h>
#include <stdlib.h>
#include <string.h>
#include "vpi_user.h"
#include "ivl_alloc.h"
/* Single argument functions. */
typedef struct s_single_data {

2
vpi/va_math.c
View File

@ -20,12 +20,12 @@
*/
#include "vpi_config.h"
#include "ivl_alloc.h"
#include <assert.h>
#include <math.h>
#include <stdlib.h>
#include <string.h>
#include "vpi_user.h"
#include "ivl_alloc.h"
/*
* Compile time options: (set in the Makefile.)

2
vpi_user.h
View File

@ -577,7 +577,7 @@ extern PLI_INT32 vpi_chk_error(p_vpi_error_info info);
/* This is the table of startup routines included in each module. */
extern DLLEXPORT void (*vlog_startup_routines[])();
extern DLLEXPORT void (*vlog_startup_routines[])(void);
/*

2
vvp/array.cc
View File

@ -26,13 +26,13 @@
#ifdef CHECK_WITH_VALGRIND
#include "vvp_cleanup.h"
#endif
# include "ivl_alloc.h"
# include <cstdlib>
# include <cstring>
# include <climits>
# include <iostream>
# include "compile.h"
# include <cassert>
# include "ivl_alloc.h"
unsigned long count_net_arrays = 0;
unsigned long count_net_array_words = 0;

5
vvp/compile.cc
View File

@ -28,7 +28,6 @@
# include "vpi_priv.h"
# include "parse_misc.h"
# include "statistics.h"
# include "ivl_alloc.h"
# include <iostream>
# include <list>
# include <cstdlib>
@ -39,6 +38,8 @@
#include <windows.h>
#endif
# include "ivl_alloc.h"
unsigned compile_errors = 0;
/*
@ -76,7 +77,7 @@ struct opcode_table_s {
enum operand_e argt[OPERAND_MAX];
};
const static struct opcode_table_s opcode_table[] = {
static const struct opcode_table_s opcode_table[] = {
{ "%abs/wr", of_ABS_WR, 2, {OA_BIT1, OA_BIT2, OA_NONE} },
{ "%add", of_ADD, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
{ "%add/wr", of_ADD_WR, 2, {OA_BIT1, OA_BIT2, OA_NONE} },

6
vvp/delay.cc
View File

@ -24,12 +24,12 @@
#ifdef CHECK_WITH_VALGRIND
#include "vvp_cleanup.h"
#endif
#include "ivl_alloc.h"
#include <iostream>
#include <cstdlib>
#include <list>
#include <cassert>
#include <cmath>
#include "ivl_alloc.h"
void vvp_delay_t::calculate_min_delay_()
{
@ -526,7 +526,7 @@ static vvp_time64_t delay_from_edge(vvp_bit4_t a, vvp_bit4_t b,
vvp_time64_t array[12])
{
typedef delay_edge_t bit4_table4[4];
const static bit4_table4 edge_table[4] = {
static const bit4_table4 edge_table[4] = {
{ DELAY_EDGE_01, DELAY_EDGE_01, DELAY_EDGE_0x, DELAY_EDGE_0z },
{ DELAY_EDGE_10, DELAY_EDGE_10, DELAY_EDGE_1x, DELAY_EDGE_1z },
{ DELAY_EDGE_x0, DELAY_EDGE_x1, DELAY_EDGE_x0, DELAY_EDGE_xz },
@ -617,7 +617,7 @@ void vvp_fun_modpath::recv_vec4(vvp_net_ptr_t port, const vvp_vector4_t&bit,
out_at[idx] -= now;
}
for (cur ++ ; cur != candidate_list.end() ; cur ++) {
for (cur ++ ; cur != candidate_list.end() ; ++ cur ) {
src = *cur;
for (unsigned idx = 0 ; idx < 12 ; idx += 1) {
vvp_time64_t tmp = src->wake_time_ + src->delay_[idx];

12
vvp/island_tran.cc
View File

@ -161,7 +161,7 @@ bool vvp_island_branch_tran::run_test_enabled()
static void island_send_value(list<vvp_branch_ptr_t>&connections, const vvp_vector8_t&val)
{
for (list<vvp_branch_ptr_t>::iterator idx = connections.begin()
; idx != connections.end() ; idx ++ ) {
; idx != connections.end() ; ++ idx ) {
vvp_island_branch*tmp_ptr = idx->ptr();
@ -173,7 +173,7 @@ static void island_send_value(list<vvp_branch_ptr_t>&connections, const vvp_vect
static void mark_done_flags(list<vvp_branch_ptr_t>&connections)
{
for (list<vvp_branch_ptr_t>::iterator idx = connections.begin()
; idx != connections.end() ; idx ++ ) {
; idx != connections.end() ; ++ idx ) {
vvp_island_branch*tmp_ptr = idx->ptr();
vvp_island_branch_tran*cur = dynamic_cast<vvp_island_branch_tran*>(tmp_ptr);
@ -186,7 +186,7 @@ static void mark_done_flags(list<vvp_branch_ptr_t>&connections)
static void mark_visited_flags(list<vvp_branch_ptr_t>&connections)
{
for (list<vvp_branch_ptr_t>::iterator idx = connections.begin()
; idx != connections.end() ; idx ++ ) {
; idx != connections.end() ; ++ idx ) {
vvp_island_branch*tmp_ptr = idx->ptr();
vvp_island_branch_tran*cur = dynamic_cast<vvp_island_branch_tran*>(tmp_ptr);
@ -200,7 +200,7 @@ static void mark_visited_flags(list<vvp_branch_ptr_t>&connections)
static void clear_visited_flags(list<vvp_branch_ptr_t>&connections)
{
for (list<vvp_branch_ptr_t>::iterator idx = connections.begin()
; idx != connections.end() ; idx ++ ) {
; idx != connections.end() ; ++ idx ) {
vvp_island_branch_tran*tmp_ptr = BRANCH_TRAN(idx->ptr());
@ -215,7 +215,7 @@ static void resolve_values_from_connections(vvp_vector8_t&val,
list<vvp_branch_ptr_t>&connections)
{
for (list<vvp_branch_ptr_t>::iterator idx = connections.begin()
; idx != connections.end() ; idx ++ ) {
; idx != connections.end() ; ++ idx ) {
vvp_vector8_t tmp = get_value_from_branch(*idx);
if (val.size() == 0)
val = tmp;
@ -287,7 +287,7 @@ static void push_value_through_branches(const vvp_vector8_t&val,
list<vvp_branch_ptr_t>&connections)
{
for (list<vvp_branch_ptr_t>::iterator idx = connections.begin()
; idx != connections.end() ; idx ++ ) {
; idx != connections.end() ; ++ idx ) {
vvp_island_branch_tran*tmp_ptr = BRANCH_TRAN(idx->ptr());
unsigned tmp_ab = idx->port();

2
vvp/lexor.lex
View File

@ -25,9 +25,9 @@
# include "parse_misc.h"
# include "compile.h"
# include "parse.h"
# include "ivl_alloc.h"
# include <cstring>
# include <cassert>
# include "ivl_alloc.h"
static char* strdupnew(char const *str)
{

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