vhdlpp: Support for 'left & 'right attributes.
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fddb3ec129
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@ -567,7 +567,7 @@ const VType* ExpAttribute::probe_type(Entity*ent, Architecture*arc) const
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{
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{
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base_->probe_type(ent, arc);
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base_->probe_type(ent, arc);
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if (name_ == "length") {
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if (name_ == "length" || name_ == "left" || name_ == "right") {
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return &primitive_INTEGER;
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return &primitive_INTEGER;
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}
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}
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@ -313,8 +313,8 @@ int ExpAttribute::emit(ostream&out, Entity*ent, Architecture*arc)
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return errors;
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return errors;
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}
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}
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/* Special Case: The length attribute can be calculated all
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/* Special Case: The length,left & right attributes can be calculated
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the down to a literal integer at compile time, and all it
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all the down to a literal integer at compile time, and all it
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needs is the type of the base expression. (The base
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needs is the type of the base expression. (The base
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expression doesn't even need to be evaluated.) */
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expression doesn't even need to be evaluated.) */
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if (name_=="length") {
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if (name_=="length") {
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@ -322,9 +322,13 @@ int ExpAttribute::emit(ostream&out, Entity*ent, Architecture*arc)
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errors += base_->emit(out, ent, arc);
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errors += base_->emit(out, ent, arc);
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out << ")";
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out << ")";
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return errors;
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return errors;
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} else if (name_=="left" || name_=="right") {
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out << "$" << name_ << "(";
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errors += base_->emit(out, ent, arc);
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out << ")";
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return errors;
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}
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}
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out << "$ivl_attribute(";
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out << "$ivl_attribute(";
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errors += base_->emit(out, ent, arc);
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errors += base_->emit(out, ent, arc);
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out << ", \"" << name_ << "\")";
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out << ", \"" << name_ << "\")";
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