luke
/
iverilog
mirror of https://github.com/steveicarus/iverilog.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Fix new shadow issues and add -Wshadow to gcc compile. 

Some new shadow issues have crept in. This patch fixes these new
issues and adds -Wshadow to the normal warning flags to keep any
new occurrences from happening.
This commit is contained in:
Cary R 2010-05-12 18:53:56 -07:00 committed by Stephen Williams
parent b6b43b5dec
commit 128f3d29cc
16 changed files with 55 additions and 53 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
configure.in
View File

@ -61,7 +61,7 @@ AX_WIN32
AC_CHECK_DECL(__SUNPRO_C, AC_SUBST(DEPENDENCY_FLAG, [-xMD]),
AC_SUBST(DEPENDENCY_FLAG, [-MD]))
AC_CHECK_DECL(__SUNPRO_C, AC_SUBST(WARNING_FLAGS, []),
AC_SUBST(WARNING_FLAGS, [-Wall]))
AC_SUBST(WARNING_FLAGS, ["-Wall -Wshadow"]))
AC_LANG(C++)

12
elab_expr.cc
View File

@ -3528,7 +3528,7 @@ NetExpr*PETernary::elaborate_expr(Design*des, NetScope*scope,
verinum cval = tmp->value();
ivl_assert(*this, cval.len()==1);
// Condition is constant TRUE, so we only need the true claue.
// Condition is constant TRUE, so we only need the true clause.
if (cval.get(0) == verinum::V1) {
if (debug_elaborate)
cerr << get_fileline() << ": debug: Short-circuit "
@ -3541,8 +3541,9 @@ NetExpr*PETernary::elaborate_expr(Design*des, NetScope*scope,
<< " of expression: " << *this << endl;
}
ivl_assert(*this, use_wid > 0);
NetExpr*tmp = elab_and_eval_alternative_(des, scope, tru_, use_wid);
return pad_to_width(tmp, use_wid, *this);
NetExpr*texpr = elab_and_eval_alternative_(des, scope, tru_,
use_wid);
return pad_to_width(texpr, use_wid, *this);
}
// Condition is constant FALSE, so we only need the
@ -3559,8 +3560,9 @@ NetExpr*PETernary::elaborate_expr(Design*des, NetScope*scope,
<< " of expression: " << *this << endl;
}
ivl_assert(*this, use_wid > 0);
NetExpr*tmp = elab_and_eval_alternative_(des, scope, fal_, use_wid);
return pad_to_width(tmp, use_wid, *this);
NetExpr*texpr = elab_and_eval_alternative_(des, scope, fal_,
use_wid);
return pad_to_width(texpr, use_wid, *this);
}
// X and Z conditions need to blend both results, so we

8
elab_scope.cc
View File

@ -563,10 +563,10 @@ bool PGenerate::generate_scope_loop_(Design*des, NetScope*container)
{
// Check that the loop_index variable was declared in a
// genvar statement.
NetScope*scope = container;
while (scope && !scope->find_genvar(loop_index))
scope = scope->parent();
if (!scope) {
NetScope*cscope = container;
while (cscope && !cscope->find_genvar(loop_index))
cscope = cscope->parent();
if (!cscope) {
cerr << get_fileline() << ": error: genvar is missing for "
"generate \"loop\" variable '" << loop_index << "'."
<< endl;

8
elaborate.cc
View File

@ -1377,12 +1377,12 @@ void PGModule::elaborate_mod_(Design*des, Module*rmod, NetScope*scope) const
continue;
}
prts_vector_width = sig->vector_width();
for (unsigned idx = 0; idx < prts.size(); idx += 1) {
prts[idx]->port_type(NetNet::NOT_A_PORT);
prts[idx] = cast_to_int(des, scope, prts[idx],
for (unsigned pidx = 0; pidx < prts.size(); pidx += 1) {
prts[pidx]->port_type(NetNet::NOT_A_PORT);
prts[pidx] = cast_to_int(des, scope, prts[pidx],
prts_vector_width /
instance.size());
prts[idx]->port_type(NetNet::POUTPUT);
prts[pidx]->port_type(NetNet::POUTPUT);
}
}

6
expr_synth.cc
View File

@ -723,7 +723,7 @@ NetNet* NetEBShift::synthesize(Design*des, NetScope*scope, NetExpr*root)
NetNet* NetEConcat::synthesize(Design*des, NetScope*scope, NetExpr*root)
{
/* First, synthesize the operands. */
unsigned nparms = parms_.count();
unsigned num_parms = parms_.count();
NetNet**tmp = new NetNet*[parms_.count()];
bool flag = true;
ivl_variable_type_t data_type = IVL_VT_NO_TYPE;
@ -732,7 +732,7 @@ NetNet* NetEConcat::synthesize(Design*des, NetScope*scope, NetExpr*root)
/* We need to synthesize a replication of zero. */
tmp[idx] = parms_[idx]->synthesize(des, scope, root);
assert(tmp[idx] == 0);
nparms -= 1;
num_parms -= 1;
} else {
tmp[idx] = parms_[idx]->synthesize(des, scope, root);
if (tmp[idx] == 0) flag = false;
@ -758,7 +758,7 @@ NetNet* NetEConcat::synthesize(Design*des, NetScope*scope, NetExpr*root)
NetConcat*concat = new NetConcat(scope, scope->local_symbol(),
osig->vector_width(),
nparms * repeat());
num_parms * repeat());
concat->set_line(*this);
des->add_node(concat);
connect(concat->pin(0), osig->pin(0));

11
net_func.cc
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2002-2004 Stephen Williams (steve@icarus.com)
* Copyright (c) 2002-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@ -29,9 +29,10 @@
* which accounts for all the inputs, plus one for the phantom output
* that is the result.
*/
NetUserFunc::NetUserFunc(NetScope*s, perm_string n, NetScope*d, NetEvWait*trigger)
NetUserFunc::NetUserFunc(NetScope*s, perm_string n, NetScope*d,
NetEvWait*trigger__)
: NetNode(s, n, d->func_def()->port_count()+1),
def_(d), trigger_(trigger)
def_(d), trigger_(trigger__)
{
pin(0).set_dir(Link::OUTPUT);
@ -128,8 +129,8 @@ bool PECallFunction::check_call_matches_definition_(Design*des, NetScope*dscope)
NetSysFunc::NetSysFunc(NetScope*s, perm_string n,
const struct sfunc_return_type*def,
unsigned ports, NetEvWait*trigger)
: NetNode(s, n, ports), def_(def), trigger_(trigger)
unsigned ports, NetEvWait*trigger__)
: NetNode(s, n, ports), def_(def), trigger_(trigger__)
{
pin(0).set_dir(Link::OUTPUT); // Q

6
netlist.cc
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 1998-2009 Stephen Williams (steve@icarus.com)
* Copyright (c) 1998-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@ -844,9 +844,9 @@ NetPartSelect::NetPartSelect(NetNet*sig, unsigned off, unsigned wid,
}
NetPartSelect::NetPartSelect(NetNet*sig, NetNet*sel,
unsigned wid, bool signed_flag)
unsigned wid, bool signed_flag__)
: NetNode(sig->scope(), sig->scope()->local_symbol(), 3),
off_(0), wid_(wid), dir_(VP), signed_flag_(signed_flag)
off_(0), wid_(wid), dir_(VP), signed_flag_(signed_flag__)
{
switch (dir_) {
case NetPartSelect::VP:

9
pform.cc
View File

@ -463,7 +463,6 @@ void pform_set_timescale(int unit, int prec,
<< "confusing timing results. Affected modules are:"
<< endl;
map<perm_string,Module*>::iterator mod;
for (mod = pform_modules.begin()
; mod != pform_modules.end() ; mod++) {
Module*mp = (*mod).second;
@ -762,8 +761,8 @@ void pform_module_set_ports(vector<Module::port_t*>*ports)
}
}
void pform_endmodule(const char*name, bool in_celldefine,
Module::UCDriveType uc_drive)
void pform_endmodule(const char*name, bool inside_celldefine,
Module::UCDriveType uc_drive_def)
{
assert(pform_cur_module);
pform_cur_module->time_from_timescale = (tu_local_flag &&
@ -771,8 +770,8 @@ void pform_endmodule(const char*name, bool in_celldefine,
(pform_timescale_file != 0);
perm_string mod_name = pform_cur_module->mod_name();
assert(strcmp(name, mod_name) == 0);
pform_cur_module->is_cell = in_celldefine;
pform_cur_module->uc_drive = uc_drive;
pform_cur_module->is_cell = inside_celldefine;
pform_cur_module->uc_drive = uc_drive_def;
map<perm_string,Module*>::const_iterator test =
pform_modules.find(mod_name);

4
vpi/sys_lxt.c
View File

@ -557,8 +557,8 @@ static void scan_item(unsigned depth, vpiHandle item, int skip)
/* Turn a non-constant array word select into a
* constant word select. */
vpiHandle array = vpi_handle(vpiParent, item);
PLI_INT32 index = vpi_get(vpiIndex, item);
item = vpi_handle_by_index(array, index);
PLI_INT32 idx = vpi_get(vpiIndex, item);
item = vpi_handle_by_index(array, idx);
}
case vpiIntegerVar:
case vpiTimeVar:

4
vpi/sys_lxt2.c
View File

@ -620,8 +620,8 @@ static void scan_item(unsigned depth, vpiHandle item, int skip)
/* Turn a non-constant array word select into a
* constant word select. */
vpiHandle array = vpi_handle(vpiParent, item);
PLI_INT32 index = vpi_get(vpiIndex, item);
item = vpi_handle_by_index(array, index);
PLI_INT32 idx = vpi_get(vpiIndex, item);
item = vpi_handle_by_index(array, idx);
}
case vpiIntegerVar:
case vpiTimeVar:

4
vpi/sys_vcd.c
View File

@ -576,8 +576,8 @@ static void scan_item(unsigned depth, vpiHandle item, int skip)
* word select. */
if (vpi_get(vpiConstantSelect, item) == 0) {
vpiHandle array = vpi_handle(vpiParent, item);
PLI_INT32 index = vpi_get(vpiIndex, item);
item = vpi_handle_by_index(array, index);
PLI_INT32 idx = vpi_get(vpiIndex, item);
item = vpi_handle_by_index(array, idx);
}
/* An array word is implicitly escaped so look for an

2
vpi_user.h
View File

@ -491,7 +491,7 @@ extern void vpi_sim_control(PLI_INT32 operation, ...);
extern vpiHandle vpi_handle(PLI_INT32 type, vpiHandle ref);
extern vpiHandle vpi_iterate(PLI_INT32 type, vpiHandle ref);
extern vpiHandle vpi_scan(vpiHandle iter);
extern vpiHandle vpi_handle_by_index(vpiHandle ref, PLI_INT32 index);
extern vpiHandle vpi_handle_by_index(vpiHandle ref, PLI_INT32 idx);
extern vpiHandle vpi_handle_by_name(const char*name, vpiHandle scope);
extern void vpi_get_time(vpiHandle obj, s_vpi_time*t);

6
vvp/array.cc
View File

@ -1693,9 +1693,9 @@ void memory_delete(vpiHandle item)
} else {
assert(arr->nets[idx]->vpi_type->type_code ==
vpiRealVar);
struct __vpiRealVar *sig = (struct __vpiRealVar *)
arr->nets[idx];
constant_delete(sig->id.index);
struct __vpiRealVar *sigr = (struct __vpiRealVar *)
arr->nets[idx];
constant_delete(sigr->id.index);
// Why are only the real words still here?
free(arr->nets[idx]);
}

12
vvp/vpi_callback.cc
View File

@ -705,17 +705,17 @@ void vvp_wire_real::get_signal_value(struct t_vpi_value*vp)
real_signal_value(vp, real_value());
}
void vvp_wire_vec4::get_value(struct t_vpi_value*value)
void vvp_wire_vec4::get_value(struct t_vpi_value*val)
{
get_signal_value(value);
get_signal_value(val);
}
void vvp_wire_vec8::get_value(struct t_vpi_value*value)
void vvp_wire_vec8::get_value(struct t_vpi_value*val)
{
get_signal_value(value);
get_signal_value(val);
}
void vvp_wire_real::get_value(struct t_vpi_value*value)
void vvp_wire_real::get_value(struct t_vpi_value*val)
{
get_signal_value(value);
get_signal_value(val);
}

10
vvp/vvp_net.cc
View File

@ -156,11 +156,11 @@ vvp_net_t::vvp_net_t()
fil = 0;
}
void vvp_net_t::link(vvp_net_ptr_t port)
void vvp_net_t::link(vvp_net_ptr_t port_to_link)
{
vvp_net_t*net = port.ptr();
net->port[port.port()] = out_;
out_ = port;
vvp_net_t*net = port_to_link.ptr();
net->port[port_to_link.port()] = out_;
out_ = port_to_link;
}
/*
@ -608,7 +608,7 @@ void vvp_vector4_t::copy_inverted_from_(const vvp_vector4_t&that)
abits_ptr_[idx] = mask & (that.bbits_ptr_[idx] | ~that.abits_ptr_[idx]);
}
for (unsigned idx = 0 ; idx < words ; idx += 1)
for (idx = 0 ; idx < words ; idx += 1)
bbits_ptr_[idx] = that.bbits_ptr_[idx];
} else {

4
vvp/vvp_net.h
View File

@ -1,7 +1,7 @@
#ifndef __vvp_net_H
#define __vvp_net_H
/*
* Copyright (c) 2004-2009 Stephen Williams (steve@icarus.com)
* Copyright (c) 2004-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@ -717,7 +717,7 @@ class vvp_scalar_t {
// so allow vvp_vector8_t access to the raw encoding so that
// it can do compact vectoring of vvp_scalar_t objects.
friend class vvp_vector8_t;
explicit vvp_scalar_t(unsigned char raw) : value_(raw) { }
explicit vvp_scalar_t(unsigned char val) : value_(val) { }
unsigned char raw() const { return value_; }
private: