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Handle expression widths for EEE and NEE operators, 

add named blocks and scope handling,
 add registers declared in named blocks.
This commit is contained in:
steve 1999-06-24 04:24:18 +00:00
parent 33d4133217
commit 11b2b1740a
9 changed files with 234 additions and 84 deletions
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30
Statement.cc
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/ */
#if !defined(WINNT) #if !defined(WINNT)
#ident "$Id: Statement.cc,v 1.10 1999/06/19 21:06:16 steve Exp $" #ident "$Id: Statement.cc,v 1.11 1999/06/24 04:24:18 steve Exp $"
#endif #endif
# include "Statement.h" # include "Statement.h"
@ -56,24 +56,25 @@ PAssignNB::~PAssignNB()
{ {
} }
PBlock::PBlock(BL_TYPE t, const list<Statement*>&st) PBlock::PBlock(const string&n, BL_TYPE t, const svector<Statement*>&st)
: name_(n), bl_type_(t), list_(st)
{
}
PBlock::PBlock(BL_TYPE t, const svector<Statement*>&st)
: bl_type_(t), list_(st)
{
}
PBlock::PBlock(BL_TYPE t)
: bl_type_(t) : bl_type_(t)
{ {
nlist_ = st.size();
list_ = new Statement*[nlist_];
list<Statement*>::const_iterator s = st.begin();
for (unsigned idx = 0 ; s != st.end() ; s ++, idx += 1 ) {
list_[idx] = *s;
}
} }
PBlock::~PBlock() PBlock::~PBlock()
{ {
for (unsigned idx = 0 ; idx < nlist_ ; idx += 1) for (unsigned idx = 0 ; idx < list_.count() ; idx += 1)
delete list_[idx]; delete list_[idx];
delete[]list_;
} }
PCallTask::PCallTask(const string&n, const svector<PExpr*>&p) PCallTask::PCallTask(const string&n, const svector<PExpr*>&p)
@ -136,6 +137,11 @@ PWhile::~PWhile()
/* /*
* $Log: Statement.cc,v $ * $Log: Statement.cc,v $
* Revision 1.11 1999/06/24 04:24:18 steve
* Handle expression widths for EEE and NEE operators,
* add named blocks and scope handling,
* add registers declared in named blocks.
*
* Revision 1.10 1999/06/19 21:06:16 steve * Revision 1.10 1999/06/19 21:06:16 steve
* Elaborate and supprort to vvm the forever * Elaborate and supprort to vvm the forever
* and repeat statements. * and repeat statements.

20
Statement.h
View File

@ -19,11 +19,10 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/ */
#if !defined(WINNT) #if !defined(WINNT)
#ident "$Id: Statement.h,v 1.12 1999/06/19 21:06:16 steve Exp $" #ident "$Id: Statement.h,v 1.13 1999/06/24 04:24:18 steve Exp $"
#endif #endif
# include <string> # include <string>
# include <list>
# include "svector.h" # include "svector.h"
# include "PExpr.h" # include "PExpr.h"
# include "LineInfo.h" # include "LineInfo.h"
@ -132,21 +131,23 @@ class PBlock : public Statement {
public: public:
enum BL_TYPE { BL_SEQ, BL_PAR }; enum BL_TYPE { BL_SEQ, BL_PAR };
explicit PBlock(BL_TYPE t, const list<Statement*>&st); explicit PBlock(const string&n, BL_TYPE t, const svector<Statement*>&st);
explicit PBlock(BL_TYPE t, const svector<Statement*>&st);
explicit PBlock(BL_TYPE t);
~PBlock(); ~PBlock();
BL_TYPE bl_type() const { return bl_type_; } BL_TYPE bl_type() const { return bl_type_; }
unsigned size() const { return nlist_; } //unsigned size() const { return list_.count(); }
const Statement*stat(unsigned idx) const { return list_[idx]; } //const Statement*stat(unsigned idx) const { return list_[idx]; }
virtual void dump(ostream&out, unsigned ind) const; virtual void dump(ostream&out, unsigned ind) const;
virtual NetProc* elaborate(Design*des, const string&path) const; virtual NetProc* elaborate(Design*des, const string&path) const;
private: private:
string name_;
const BL_TYPE bl_type_; const BL_TYPE bl_type_;
unsigned nlist_; svector<Statement*>list_;
Statement**list_;
}; };
class PCallTask : public Statement { class PCallTask : public Statement {
@ -326,6 +327,11 @@ class PWhile : public Statement {
/* /*
* $Log: Statement.h,v $ * $Log: Statement.h,v $
* Revision 1.13 1999/06/24 04:24:18 steve
* Handle expression widths for EEE and NEE operators,
* add named blocks and scope handling,
* add registers declared in named blocks.
*
* Revision 1.12 1999/06/19 21:06:16 steve * Revision 1.12 1999/06/19 21:06:16 steve
* Elaborate and supprort to vvm the forever * Elaborate and supprort to vvm the forever
* and repeat statements. * and repeat statements.

44
elaborate.cc
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/ */
#if !defined(WINNT) #if !defined(WINNT)
#ident "$Id: elaborate.cc,v 1.47 1999/06/19 21:06:16 steve Exp $" #ident "$Id: elaborate.cc,v 1.48 1999/06/24 04:24:18 steve Exp $"
#endif #endif
/* /*
@ -450,8 +450,7 @@ void PGModule::elaborate_mod_(Design*des, Module*rmod, const string&path) const
} }
assert(sig); assert(sig);
NetNet*prt = des->find_signal(my_name + "." + NetNet*prt = des->find_signal(my_name, rmod->ports[idx]->name());
rmod->ports[idx]->name());
assert(prt); assert(prt);
// Check that the parts have matching pin counts. If // Check that the parts have matching pin counts. If
@ -739,7 +738,7 @@ NetNet* PEConcat::elaborate_net(Design*des, const string&path) const
NetNet* PEIdent::elaborate_net(Design*des, const string&path) const NetNet* PEIdent::elaborate_net(Design*des, const string&path) const
{ {
NetNet*sig = des->find_signal(path+"."+text_); NetNet*sig = des->find_signal(path, text_);
if (sig == 0) { if (sig == 0) {
cerr << get_line() << ": Unable to find signal ``" << cerr << get_line() << ": Unable to find signal ``" <<
text_ << "''" << endl; text_ << "''" << endl;
@ -938,7 +937,7 @@ NetExpr*PEIdent::elaborate_expr(Design*des, const string&path) const
// If the identifier names a signal (a register or wire) // If the identifier names a signal (a register or wire)
// then create a NetESignal node to handle it. // then create a NetESignal node to handle it.
if (NetNet*net = des->find_signal(name)) { if (NetNet*net = des->find_signal(path, text_)) {
NetESignal*node = des->get_esignal(net); NetESignal*node = des->get_esignal(net);
assert(idx_ == 0); assert(idx_ == 0);
if (lsb_) { if (lsb_) {
@ -1034,11 +1033,11 @@ NetNet* PAssign_::elaborate_lval(Design*des, const string&path,
/* Get the signal referenced by the identifier, and make sure /* Get the signal referenced by the identifier, and make sure
it is a register. */ it is a register. */
NetNet*reg = des->find_signal(path+"."+id->name()); NetNet*reg = des->find_signal(path, id->name());
if (reg == 0) { if (reg == 0) {
cerr << get_line() << ": Could not match signal: " << cerr << get_line() << ": Could not match signal ``" <<
id->name() << endl; id->name() << "'' in ``" << path << "''" << endl;
return 0; return 0;
} }
assert(reg); assert(reg);
@ -1212,15 +1211,17 @@ NetProc* PBlock::elaborate(Design*des, const string&path) const
NetBlock*cur = new NetBlock(NetBlock::SEQU); NetBlock*cur = new NetBlock(NetBlock::SEQU);
bool fail_flag = false; bool fail_flag = false;
string npath = name_.length()? (path+"."+name_) : path;
// Handle the special case that the block contains only one // Handle the special case that the block contains only one
// statement. There is no need to keep the block node. // statement. There is no need to keep the block node.
if (size() == 1) { if (list_.count() == 1) {
NetProc*tmp = stat(0)->elaborate(des, path); NetProc*tmp = list_[0]->elaborate(des, npath);
return tmp; return tmp;
} }
for (unsigned idx = 0 ; idx < size() ; idx += 1) { for (unsigned idx = 0 ; idx < list_.count() ; idx += 1) {
NetProc*tmp = stat(idx)->elaborate(des, path); NetProc*tmp = list_[idx]->elaborate(des, npath);
if (tmp == 0) { if (tmp == 0) {
fail_flag = true; fail_flag = true;
continue; continue;
@ -1328,7 +1329,15 @@ NetProc* PCondit::elaborate(Design*des, const string&path) const
else else
return new NetBlock(NetBlock::SEQU); return new NetBlock(NetBlock::SEQU);
} }
if (! expr->set_width(1)) {
cerr << get_line() << ": Unable to set expression width to 1."
<< endl;
des->errors += 1;
delete expr;
return 0;
}
// Well, I actually need to generate code to handle the // Well, I actually need to generate code to handle the
// conditional, so elaborate. // conditional, so elaborate.
NetProc*i = if_->elaborate(des, path); NetProc*i = if_->elaborate(des, path);
@ -1447,7 +1456,7 @@ NetProc* PForStatement::elaborate(Design*des, const string&path) const
assert(id2); assert(id2);
NetBlock*top = new NetBlock(NetBlock::SEQU); NetBlock*top = new NetBlock(NetBlock::SEQU);
NetNet*sig = des->find_signal(path+"."+id1->name()); NetNet*sig = des->find_signal(path, id1->name());
if (sig == 0) { if (sig == 0) {
cerr << id1->get_line() << ": register ``" << id1->name() cerr << id1->get_line() << ": register ``" << id1->name()
<< "'' unknown in this context." << endl; << "'' unknown in this context." << endl;
@ -1466,7 +1475,7 @@ NetProc* PForStatement::elaborate(Design*des, const string&path) const
body->append(statement_->elaborate(des, path)); body->append(statement_->elaborate(des, path));
sig = des->find_signal(path+"."+id2->name()); sig = des->find_signal(path, id2->name());
assert(sig); assert(sig);
NetAssign*step = new NetAssign("@for-assign", des, sig->pin_count(), NetAssign*step = new NetAssign("@for-assign", des, sig->pin_count(),
expr2_->elaborate_expr(des, path)); expr2_->elaborate_expr(des, path));
@ -1629,6 +1638,11 @@ Design* elaborate(const map<string,Module*>&modules,
/* /*
* $Log: elaborate.cc,v $ * $Log: elaborate.cc,v $
* Revision 1.48 1999/06/24 04:24:18 steve
* Handle expression widths for EEE and NEE operators,
* add named blocks and scope handling,
* add registers declared in named blocks.
*
* Revision 1.47 1999/06/19 21:06:16 steve * Revision 1.47 1999/06/19 21:06:16 steve
* Elaborate and supprort to vvm the forever * Elaborate and supprort to vvm the forever
* and repeat statements. * and repeat statements.

44
netlist.cc
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/ */
#if !defined(WINNT) #if !defined(WINNT)
#ident "$Id: netlist.cc,v 1.38 1999/06/19 21:06:16 steve Exp $" #ident "$Id: netlist.cc,v 1.39 1999/06/24 04:24:18 steve Exp $"
#endif #endif
# include <cassert> # include <cassert>
@ -425,6 +425,11 @@ void NetCase::set_case(unsigned idx, NetExpr*e, NetProc*p)
items_[idx].guard->set_width(expr_->expr_width()); items_[idx].guard->set_width(expr_->expr_width());
} }
NetCondit::NetCondit(NetExpr*ex, NetProc*i, NetProc*e)
: expr_(ex), if_(i), else_(e)
{
}
NetTask::~NetTask() NetTask::~NetTask()
{ {
for (unsigned idx = 0 ; idx < nparms_ ; idx += 1) for (unsigned idx = 0 ; idx < nparms_ ; idx += 1)
@ -468,8 +473,10 @@ bool NetEBinary::set_width(unsigned w)
/* Comparison operators allow the subexpressions to have /* Comparison operators allow the subexpressions to have
their own natural width. However, I do need to make their own natural width. However, I do need to make
sure that the subexpressions have the same width. */ sure that the subexpressions have the same width. */
case 'e': /* == */ case 'E': /* === */
case 'n': /* != */ case 'e': /* == */
case 'N': /* !== */
case 'n': /* != */
case '<': /* < */ case '<': /* < */
case '>': /* > */ case '>': /* > */
assert(w == 1); assert(w == 1);
@ -1091,18 +1098,30 @@ void Design::del_signal(NetNet*net)
net->design_ = 0; net->design_ = 0;
} }
NetNet* Design::find_signal(const string&name) /*
* This method looks for a string given a current context as a
* starting point.
*/
NetNet* Design::find_signal(const string&path, const string&name)
{ {
if (signals_ == 0) if (signals_ == 0)
return 0; return 0;
NetNet*cur = signals_; string root = path;
do { while (root.size() > 0) {
if (cur->name() == name)
return cur;
cur = cur->sig_prev_; string fulname = root + "." + name;
} while (cur != signals_); NetNet*cur = signals_;
do {
if (cur->name() == fulname)
return cur;
cur = cur->sig_prev_;
} while (cur != signals_);
unsigned pos = root.rfind('.');
root = root.substr(0, pos);
}
return 0; return 0;
} }
@ -1228,6 +1247,11 @@ NetNet* Design::find_signal(bool (*func)(const NetNet*))
/* /*
* $Log: netlist.cc,v $ * $Log: netlist.cc,v $
* Revision 1.39 1999/06/24 04:24:18 steve
* Handle expression widths for EEE and NEE operators,
* add named blocks and scope handling,
* add registers declared in named blocks.
*
* Revision 1.38 1999/06/19 21:06:16 steve * Revision 1.38 1999/06/19 21:06:16 steve
* Elaborate and supprort to vvm the forever * Elaborate and supprort to vvm the forever
* and repeat statements. * and repeat statements.

12
netlist.h
View File

@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/ */
#if !defined(WINNT) #if !defined(WINNT)
#ident "$Id: netlist.h,v 1.41 1999/06/19 21:06:16 steve Exp $" #ident "$Id: netlist.h,v 1.42 1999/06/24 04:24:18 steve Exp $"
#endif #endif
/* /*
@ -712,8 +712,7 @@ class NetCase : public NetProc {
class NetCondit : public NetProc { class NetCondit : public NetProc {
public: public:
NetCondit(NetExpr*ex, NetProc*i, NetProc*e) explicit NetCondit(NetExpr*ex, NetProc*i, NetProc*e);
: expr_(ex), if_(i), else_(e) { }
const NetExpr*expr() const { return expr_; } const NetExpr*expr() const { return expr_; }
void emit_recurse_if(ostream&, struct target_t*) const; void emit_recurse_if(ostream&, struct target_t*) const;
@ -1188,7 +1187,7 @@ class Design {
// SIGNALS // SIGNALS
void add_signal(NetNet*); void add_signal(NetNet*);
void del_signal(NetNet*); void del_signal(NetNet*);
NetNet*find_signal(const string&name); NetNet*find_signal(const string&path, const string&name);
// Memories // Memories
void add_memory(NetMemory*); void add_memory(NetMemory*);
@ -1291,6 +1290,11 @@ extern ostream& operator << (ostream&, NetNet::Type);
/* /*
* $Log: netlist.h,v $ * $Log: netlist.h,v $
* Revision 1.42 1999/06/24 04:24:18 steve
* Handle expression widths for EEE and NEE operators,
* add named blocks and scope handling,
* add registers declared in named blocks.
*
* Revision 1.41 1999/06/19 21:06:16 steve * Revision 1.41 1999/06/19 21:06:16 steve
* Elaborate and supprort to vvm the forever * Elaborate and supprort to vvm the forever
* and repeat statements. * and repeat statements.

81
parse.y
View File

@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/ */
#if !defined(WINNT) #if !defined(WINNT)
#ident "$Id: parse.y,v 1.46 1999/06/19 21:06:16 steve Exp $" #ident "$Id: parse.y,v 1.47 1999/06/24 04:24:18 steve Exp $"
#endif #endif
# include "parse_misc.h" # include "parse_misc.h"
@ -57,7 +57,7 @@ extern void lex_end_table();
PEventStatement*event_statement; PEventStatement*event_statement;
Statement*statement; Statement*statement;
list<Statement*>*statement_list; svector<Statement*>*statement_list;
verinum* number; verinum* number;
@ -150,6 +150,21 @@ source_file
| source_file description | source_file description
; ;
block_item_decl
: K_reg range_opt register_variable_list ';'
| K_integer list_of_variables ';'
;
block_item_decls
: block_item_decl
| block_item_decls block_item_decl
;
block_item_decls_opt
: block_item_decls
|
;
case_item case_item
: expression_list ':' statement_opt : expression_list ':' statement_opt
{ PCase::Item*tmp = new PCase::Item; { PCase::Item*tmp = new PCase::Item;
@ -1247,10 +1262,35 @@ statement
$$ = 0; $$ = 0;
} }
| K_begin statement_list K_end | K_begin statement_list K_end
{ $$ = pform_make_block(PBlock::BL_SEQ, $2); } { PBlock*tmp = new PBlock(PBlock::BL_SEQ, *$2);
| K_begin ':' IDENTIFIER statement_list K_end tmp->set_file(@1.text);
{ yyerror(@3, "Sorry, block identifiers not supported."); tmp->set_lineno(@1.first_line);
$$ = pform_make_block(PBlock::BL_SEQ, $4); delete $2;
$$ = tmp;
}
| K_begin ':' IDENTIFIER
{ pform_push_scope(*$3); }
block_item_decls_opt
statement_list K_end
{ pform_pop_scope();
PBlock*tmp = new PBlock(*$3, PBlock::BL_SEQ, *$6);
tmp->set_file(@1.text);
tmp->set_lineno(@1.first_line);
delete $3;
delete $6;
$$ = tmp;
}
| K_begin K_end
{ PBlock*tmp = new PBlock(PBlock::BL_SEQ);
tmp->set_file(@1.text);
tmp->set_lineno(@1.first_line);
$$ = tmp;
}
| K_begin ':' IDENTIFIER K_end
{ PBlock*tmp = new PBlock(PBlock::BL_SEQ);
tmp->set_file(@1.text);
tmp->set_lineno(@1.first_line);
$$ = tmp;
} }
| K_begin error K_end | K_begin error K_end
{ yyerrok; } { yyerrok; }
@ -1274,7 +1314,12 @@ statement
$$ = tmp; $$ = tmp;
} }
| K_fork statement_list K_join | K_fork statement_list K_join
{ $$ = pform_make_block(PBlock::BL_PAR, $2); } { PBlock*tmp = new PBlock(PBlock::BL_PAR, *$2);
tmp->set_file(@1.text);
tmp->set_lineno(@1.first_line);
delete $2;
$$ = tmp;
}
| K_release lavalue ';' | K_release lavalue ';'
{ yyerror(@1, "Sorry, release not supported."); { yyerror(@1, "Sorry, release not supported.");
$$ = 0; $$ = 0;
@ -1285,12 +1330,12 @@ statement
tmp->set_lineno(@1.first_line); tmp->set_lineno(@1.first_line);
$$ = tmp; $$ = tmp;
} }
| K_begin K_end
{ $$ = pform_make_block(PBlock::BL_SEQ, 0); }
| K_begin ':' IDENTIFIER K_end
{ $$ = pform_make_block(PBlock::BL_SEQ, 0); }
| K_fork K_join | K_fork K_join
{ $$ = pform_make_block(PBlock::BL_PAR, 0); } { PBlock*tmp = new PBlock(PBlock::BL_PAR);
tmp->set_file(@1.text);
tmp->set_lineno(@1.first_line);
$$ = tmp;
}
| K_case '(' expression ')' case_items K_endcase | K_case '(' expression ')' case_items K_endcase
{ PCase*tmp = new PCase($3, $5); { PCase*tmp = new PCase($3, $5);
tmp->set_file(@1.text); tmp->set_file(@1.text);
@ -1438,13 +1483,13 @@ statement
statement_list statement_list
: statement_list statement : statement_list statement
{ list<Statement*>*tmp = $1; { svector<Statement*>*tmp = new svector<Statement*>(*$1, $2);
tmp->push_back($2); delete $1;
$$ = tmp; $$ = tmp;
} }
| statement | statement
{ list<Statement*>*tmp = new list<Statement*>(); { svector<Statement*>*tmp = new svector<Statement*>(1);
tmp->push_back($1); (*tmp)[0] = $1;
$$ = tmp; $$ = tmp;
} }
; ;
@ -1459,10 +1504,10 @@ task_body
; ;
task_item task_item
: K_input range_opt list_of_variables ';' : block_item_decl
| K_input range_opt list_of_variables ';'
| K_output range_opt list_of_variables ';' | K_output range_opt list_of_variables ';'
| K_inout range_opt list_of_variables ';' | K_inout range_opt list_of_variables ';'
| K_reg range_opt list_of_variables ';'
; ;
task_item_list task_item_list

57
pform.cc
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/ */
#if !defined(WINNT) #if !defined(WINNT)
#ident "$Id: pform.cc,v 1.29 1999/06/21 01:02:16 steve Exp $" #ident "$Id: pform.cc,v 1.30 1999/06/24 04:24:18 steve Exp $"
#endif #endif
# include "compiler.h" # include "compiler.h"
@ -39,6 +39,43 @@ extern int VLparse();
static Module*cur_module = 0; static Module*cur_module = 0;
/*
* The scope stack and the following functions handle the processing
* of scope. As I enter a scope, the push function is called, and as I
* leave a scope the opo function is called.
*/
struct scope_name_t {
string name;
struct scope_name_t*next;
};
static scope_name_t*scope_stack = 0;
void pform_push_scope(const string&name)
{
scope_name_t*cur = new scope_name_t;
cur->name = name;
cur->next = scope_stack;
scope_stack = cur;
}
void pform_pop_scope()
{
assert(scope_stack);
scope_name_t*cur = scope_stack;
scope_stack = cur->next;
delete cur;
}
static string scoped_name(string name)
{
scope_name_t*cur = scope_stack;
while (cur) {
name = cur->name + "." + name;
cur = cur->next;
}
return name;
}
static map<string,Module*> vl_modules; static map<string,Module*> vl_modules;
static map<string,PUdp*> vl_primitives; static map<string,PUdp*> vl_primitives;
@ -344,9 +381,10 @@ PGAssign* pform_make_pgassign(PExpr*lval, PExpr*rval)
return cur; return cur;
} }
void pform_makewire(const vlltype&li, const string&name, void pform_makewire(const vlltype&li, const string&nm,
NetNet::Type type) NetNet::Type type)
{ {
const string name = scoped_name(nm);
PWire*cur = cur_module->get_wire(name); PWire*cur = cur_module->get_wire(name);
if (cur) { if (cur) {
if (cur->get_wire_type() != NetNet::IMPLICIT) { if (cur->get_wire_type() != NetNet::IMPLICIT) {
@ -512,16 +550,6 @@ PProcess* pform_make_behavior(PProcess::Type type, Statement*st)
return pp; return pp;
} }
Statement* pform_make_block(PBlock::BL_TYPE type, list<Statement*>*sl)
{
if (sl == 0)
sl = new list<Statement*>;
PBlock*bl = new PBlock(type, *sl);
delete sl;
return bl;
}
Statement* pform_make_calltask(string*name, svector<PExpr*>*parms) Statement* pform_make_calltask(string*name, svector<PExpr*>*parms)
{ {
if (parms == 0) if (parms == 0)
@ -559,6 +587,11 @@ int pform_parse(const char*path, map<string,Module*>&modules,
/* /*
* $Log: pform.cc,v $ * $Log: pform.cc,v $
* Revision 1.30 1999/06/24 04:24:18 steve
* Handle expression widths for EEE and NEE operators,
* add named blocks and scope handling,
* add registers declared in named blocks.
*
* Revision 1.29 1999/06/21 01:02:16 steve * Revision 1.29 1999/06/21 01:02:16 steve
* Fix merging of UDP port type in decls. * Fix merging of UDP port type in decls.
* *

14
pform.h
View File

@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/ */
#if !defined(WINNT) #if !defined(WINNT)
#ident "$Id: pform.h,v 1.20 1999/06/15 03:44:53 steve Exp $" #ident "$Id: pform.h,v 1.21 1999/06/24 04:24:18 steve Exp $"
#endif #endif
# include "netlist.h" # include "netlist.h"
@ -101,6 +101,12 @@ extern void pform_make_udp(string*name, list<string>*parms,
svector<PWire*>*decl, list<string>*table, svector<PWire*>*decl, list<string>*table,
Statement*init); Statement*init);
/*
* Enter/exit name scopes.
*/
extern void pform_push_scope(const string&name);
extern void pform_pop_scope();
/* /*
* The makewire functions announce to the pform code new wires. These * The makewire functions announce to the pform code new wires. These
* go into a module that is currently opened. * go into a module that is currently opened.
@ -119,7 +125,6 @@ extern void pform_set_type_attrib(const string&name, const string&key,
const string&value); const string&value);
extern void pform_set_parameter(const string&name, PExpr*expr); extern void pform_set_parameter(const string&name, PExpr*expr);
extern PProcess* pform_make_behavior(PProcess::Type, Statement*); extern PProcess* pform_make_behavior(PProcess::Type, Statement*);
extern Statement* pform_make_block(PBlock::BL_TYPE, list<Statement*>*);
extern Statement* pform_make_calltask(string*t, svector<PExpr*>* =0); extern Statement* pform_make_calltask(string*t, svector<PExpr*>* =0);
extern svector<PWire*>* pform_make_udp_input_ports(list<string>*); extern svector<PWire*>* pform_make_udp_input_ports(list<string>*);
@ -151,6 +156,11 @@ extern void pform_dump(ostream&out, Module*mod);
/* /*
* $Log: pform.h,v $ * $Log: pform.h,v $
* Revision 1.21 1999/06/24 04:24:18 steve
* Handle expression widths for EEE and NEE operators,
* add named blocks and scope handling,
* add registers declared in named blocks.
*
* Revision 1.20 1999/06/15 03:44:53 steve * Revision 1.20 1999/06/15 03:44:53 steve
* Get rid of the STL vector template. * Get rid of the STL vector template.
* *

16
pform_dump.cc
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/ */
#if !defined(WINNT) #if !defined(WINNT)
#ident "$Id: pform_dump.cc,v 1.24 1999/06/19 21:06:16 steve Exp $" #ident "$Id: pform_dump.cc,v 1.25 1999/06/24 04:24:18 steve Exp $"
#endif #endif
/* /*
@ -275,10 +275,13 @@ void PAssignNB::dump(ostream&out, unsigned ind) const
void PBlock::dump(ostream&out, unsigned ind) const void PBlock::dump(ostream&out, unsigned ind) const
{ {
out << setw(ind) << "" << "begin" << endl; out << setw(ind) << "" << "begin";
if (name_.length())
out << " : " << name_;
out << endl;
for (unsigned idx = 0 ; idx < size() ; idx += 1) { for (unsigned idx = 0 ; idx < list_.count() ; idx += 1) {
stat(idx)->dump(out, ind+2); list_[idx]->dump(out, ind+2);
} }
out << setw(ind) << "" << "end" << endl; out << setw(ind) << "" << "end" << endl;
@ -501,6 +504,11 @@ void PUdp::dump(ostream&out) const
/* /*
* $Log: pform_dump.cc,v $ * $Log: pform_dump.cc,v $
* Revision 1.25 1999/06/24 04:24:18 steve
* Handle expression widths for EEE and NEE operators,
* add named blocks and scope handling,
* add registers declared in named blocks.
*
* Revision 1.24 1999/06/19 21:06:16 steve * Revision 1.24 1999/06/19 21:06:16 steve
* Elaborate and supprort to vvm the forever * Elaborate and supprort to vvm the forever
* and repeat statements. * and repeat statements.