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iverilog
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Glitches in cygwin build process.

This commit is contained in:
steve 2000-10-28 19:12:43 +00:00
parent 5b65f15df4
commit 10fbb2a1bb
3 changed files with 4 additions and 2 deletions
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4
Makefile.in
View File

@ -18,7 +18,7 @@
# 59 Temple Place - Suite 330
# Boston, MA 02111-1307, USA
#
#ident "$Id: Makefile.in,v 1.76 2000/10/28 17:51:45 steve Exp $"
#ident "$Id: Makefile.in,v 1.77 2000/10/28 19:12:43 steve Exp $"
#
#
SHELL = /bin/sh
@ -62,7 +62,7 @@ all: ivl@EXEEXT@
# sure the basics were compiled properly.
check: all
driver/iverilog -Ccheck.conf -ocheck -tvvm-check -B./ivlpp examples/hello.vl
$(CXX) -o check $(rdynamic) -fno-exceptions -Ivvm -Lvvm check.cc -lvvm -lvpip $(dllib)
$(CXX) -o check $(rdynamic) -fno-exceptions -Ivvm -Ivpi -Lvvm check.cc -lvvm -lvpip $(dllib)
./check | grep 'Hello, World'
clean:

1
ivl.def
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@ -44,6 +44,7 @@ ivl_scope_name
ivl_scope_sigs
ivl_scope_sig
ivl_signal_pin
ivl_signal_pins
ivl_signal_port
ivl_signal_type

1
vvm/.cvsignore
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@ -1,2 +1,3 @@
dep
Makefile
vpip.dll