Remove some cppcheck warnings

tgt-blif/Makefile.in

@@ -57,7 +57,8 @@ distclean: clean
 	rm -f Makefile config.log
 
 cppcheck: $(O:.o=.cc)
-	cppcheck --enable=all -f $(INCLUDE_PATH) $^
+	cppcheck --enable=all -f --suppressions-list=$(srcdir)/cppcheck.sup \
+	         --relative-paths=$(srcdir) $(INCLUDE_PATH) $^
 
 Makefile: $(srcdir)/Makefile.in ../config.status
 	cd ..; ./config.status --file=tgt-blif/$@

tgt-blif/cppcheck.sup

@@ -0,0 +1,8 @@
+// These are the global access functions called from the compiler so they
+// are not used here.
+
+// target_design()
+unusedFunction:blif.cc:66
+
+// target_query()
+unusedFunction:blif.cc:98

tgt-fpga/Makefile.in

@@ -61,7 +61,8 @@ distclean: clean
 	rm -f Makefile config.log
 
 cppcheck: $(O:.o=.c)
-	cppcheck --enable=all -f $(INCLUDE_PATH) $^
+	cppcheck --enable=all -f --suppressions-list=$(srcdir)/cppcheck.sup \
+	         --relative-paths=$(srcdir) $(INCLUDE_PATH) $^
 
 Makefile: $(srcdir)/Makefile.in ../config.status
 	cd ..; ./config.status --file=tgt-fpga/$@

tgt-fpga/cppcheck.sup

@@ -0,0 +1,5 @@
+// These are the global access functions called from the compiler so they
+// are not used here.
+
+// target_design()
+unusedFunction:fpga.c:104

tgt-fpga/d-generic-edif.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2001-2010 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 2001-2014 Stephen Williams (steve@icarus.com)
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -384,24 +384,23 @@ static void edif_show_logic(ivl_net_logic_t net)
 
 static void edif_show_generic_dff(ivl_lpm_t net)
 {
-      ivl_nexus_t nex;
       char jbuf[1024];
       unsigned idx;
       ivl_nexus_t aclr = ivl_lpm_async_clr(net);
       ivl_nexus_t aset = ivl_lpm_async_set(net);
-      ivl_expr_t avalue = 0;
       const char*abits = 0;
       const char*fdcell = "FDCE";
 
       if (aset != 0) {
+	    ivl_expr_t avalue = ivl_lpm_aset_value(net);
 	    fdcell = "FDCPE";
-	    avalue = ivl_lpm_aset_value(net);
 	    assert(avalue);
 	    abits = ivl_expr_bits(avalue);
 	    assert(abits);
       }
 
       for (idx = 0 ;  idx < ivl_lpm_width(net) ;  idx += 1) {
+	    ivl_nexus_t nex;
 
 	    edif_uref += 1;
 

tgt-fpga/d-generic.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2001 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 2001-2014 Stephen Williams (steve@icarus.com)
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -358,7 +358,7 @@ static void generic_show_cmp_eq(ivl_lpm_t net)
 static void generic_show_mux(ivl_lpm_t net)
 {
       char name[1024];
-      ivl_nexus_t nex, sel;
+      ivl_nexus_t sel;
       unsigned idx;
 
       xnf_mangle_lpm_name(net, name, sizeof name);
@@ -369,6 +369,8 @@ static void generic_show_mux(ivl_lpm_t net)
       sel = ivl_lpm_select(net, 0);
 
       for (idx = 0 ;  idx < ivl_lpm_width(net) ;  idx += 1) {
+	    ivl_nexus_t nex;
+
 	    fprintf(xnf, "SYM, %s/M%u, EQN, "
 		    "EQN=((I0 * ~I2) + (I1 * I2))\n",
 		    name, idx);

tgt-fpga/d-lpm.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 2003-2014 Stephen Williams (steve@icarus.com)
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -735,7 +735,6 @@ static void lpm_show_mult(ivl_lpm_t net)
 
       edif_cell_t cell;
       edif_cellref_t ref;
-      edif_joint_t jnt;
 
       sprintf(name, "mult%u", ivl_lpm_width(net));
       cell = edif_xlibrary_findcell(xlib, name);
@@ -773,6 +772,7 @@ static void lpm_show_mult(ivl_lpm_t net)
       for (idx = 0 ;  idx < ivl_lpm_width(net) ;  idx += 1) {
 	    unsigned pin;
 	    ivl_nexus_t nex;
+	    edif_joint_t jnt;
 
 	    sprintf(name, "Result%u", idx);
 	    pin = edif_cell_port_byname(cell, name);

tgt-fpga/fpga.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2001 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 2001-2014 Stephen Williams (steve@icarus.com)
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -39,11 +39,10 @@ device_t device = 0;
 int scope_has_attribute(ivl_scope_t s, const char *name)
 {
       int i;
-      const struct ivl_attribute_s *a;
       for (i=0; i<ivl_scope_attr_cnt(s); i++) {
-	      a = ivl_scope_attr_val(s, i);
+	    const struct ivl_attribute_s *a;
-	      if (strcmp(a->key,name) == 0)
+	    a = ivl_scope_attr_val(s, i);
-		    return 1;
+	    if (strcmp(a->key,name) == 0) return 1;
       }
       return 0;
 }

tgt-fpga/xilinx.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003-2012 Stephen Williams (steve at icarus.com)
+ * Copyright (c) 2003-2014 Stephen Williams (steve at icarus.com)
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -505,8 +505,7 @@ static void edif_cellref_logic(ivl_net_logic_t net, const char*def)
       char*pins;
       edif_cell_t cell;
       edif_cellref_t ref;
-      edif_joint_t jnt;
+      unsigned idx;
-      unsigned idx, port;
 
       pins = strchr(str, ':');
       assert(pins);
@@ -520,6 +519,8 @@ static void edif_cellref_logic(ivl_net_logic_t net, const char*def)
 
       for (idx = 0 ;  idx < ivl_logic_pins(net) ;  idx += 1) {
 	    char*tmp;
+	    edif_joint_t jnt;
+	    unsigned port;
 
 	    assert(pins);
 	    tmp = strchr(pins,',');
@@ -707,9 +708,6 @@ void xilinx_mux(ivl_lpm_t net)
 {
       unsigned idx;
 
-      edif_cellref_t lut;
-      edif_joint_t jnt;
-
       assert(ivl_lpm_selects(net) == 1);
 
 	/* A/B Mux devices are made from LUT3 devices. I0 is connected
@@ -730,6 +728,8 @@ void xilinx_mux(ivl_lpm_t net)
 	   INIT = "CA" */
 
       for (idx = 0 ;  idx < ivl_lpm_width(net) ;  idx += 1) {
+	    edif_cellref_t lut;
+	    edif_joint_t jnt;
 
 	    lut = edif_cellref_create(edf, xilinx_cell_lut3(xlib));
 
@@ -756,8 +756,6 @@ void xilinx_mux(ivl_lpm_t net)
 void xilinx_add(ivl_lpm_t net)
 {
       const char*ha_init = 0;
-      edif_cellref_t lut;
-      edif_joint_t jnt;
 
       switch (ivl_lpm_type(net)) {
 	    case IVL_LPM_ADD:
@@ -774,6 +772,8 @@ void xilinx_add(ivl_lpm_t net)
 	   half-adder. Normally this is an XOR, but if this is a SUB
 	   then it is an XNOR. */
       if (ivl_lpm_width(net) == 1) {
+	    edif_cellref_t lut;
+	    edif_joint_t jnt;
 
 	    lut = edif_cellref_create(edf, xilinx_cell_lut2(xlib));
 
@@ -801,7 +801,7 @@ void xilinx_add(ivl_lpm_t net)
 void xilinx_shiftl(ivl_lpm_t net)
 {
       unsigned width = ivl_lpm_width(net);
-      unsigned nsel = 0, swid = 0;
+      unsigned nsel = 0;
       unsigned sdx, qdx;
 
       edif_cellref_t* cells;
@@ -818,6 +818,7 @@ void xilinx_shiftl(ivl_lpm_t net)
 	   emits zeros. */
 
       while (nsel < ivl_lpm_selects(net)) {
+	    unsigned swid;
 
 	    nsel += 1;
 

tgt-null/Makefile.in

@@ -56,7 +56,8 @@ distclean: clean
 	rm -f Makefile config.log
 
 cppcheck: $(O:.o=.c)
-	cppcheck --enable=all -f $(INCLUDE_PATH) $^
+	cppcheck --enable=all -f --suppressions-list=$(srcdir)/cppcheck.sup \
+	         --relative-paths=$(srcdir) $(INCLUDE_PATH) $^
 
 Makefile: $(srcdir)/Makefile.in ../config.status
 	cd ..; ./config.status --file=tgt-null/$@

tgt-null/cppcheck.sup

@@ -0,0 +1,8 @@
+// These are the global access functions called from the compiler so they
+// are not used here.
+
+// target_design()
+unusedFunction:null.c:50
+
+// target_query()
+unusedFunction:null.c:56

tgt-pal/Makefile.in

@@ -55,7 +55,8 @@ distclean: clean
 	rm -f Makefile config.log
 
 cppcheck: $(O:.o=.c)
-	cppcheck --enable=all -f $(INCLUDE_PATH) $^
+	cppcheck --enable=all -f --suppressions-list=$(srcdir)/cppcheck.sup \
+	         --relative-paths=$(srcdir) $(INCLUDE_PATH) $^
 
 Makefile: $(srcdir)/Makefile.in ../config.status
 	cd ..; ./config.status --file=tgt-pal/$@

tgt-pal/cppcheck.sup

@@ -0,0 +1,5 @@
+// These are the global access functions called from the compiler so they
+// are not used here.
+
+// target_design()
+unusedFunction:imain.c:59

tgt-pcb/Makefile.in

@@ -61,7 +61,11 @@ distclean: clean
 	rm -f stamp-pcb_config-h pcb_config.h
 
 cppcheck: $(O:.o=.cc)
-	cppcheck --enable=all -f $(INCLUDE_PATH) $^
+	cppcheck --enable=all -f --suppressions-list=$(srcdir)/cppcheck.sup \
+	         -UYY_USER_INIT \
+	         -UYYPARSE_PARAM -UYYPRINT -Usize_t -Ushort -Uyyoverflow \
+	         -UYYTYPE_INT8 -UYYTYPE_INT16 -UYYTYPE_UINT8 -UYYTYPE_UINT16 \
+	         --relative-paths=$(srcdir) $(INCLUDE_PATH) $^
 
 Makefile: $(srcdir)/Makefile.in ../config.status
 	cd ..; ./config.status --file=tgt-pcb/$@

tgt-pcb/cppcheck.sup

@@ -0,0 +1,8 @@
+// These are the global access functions called from the compiler so they
+// are not used here.
+
+// target_design()
+unusedFunction:pcb.cc:52
+
+// target_query()
+unusedFunction:pcb.cc:84

tgt-sizer/Makefile.in

@@ -56,7 +56,8 @@ distclean: clean
 	rm -f Makefile config.log
 
 cppcheck: $(O:.o=.cc)
-	cppcheck --enable=all -f $(INCLUDE_PATH) $^
+	cppcheck --enable=all -f --suppressions-list=$(srcdir)/cppcheck.sup \
+	         --relative-paths=$(srcdir) $(INCLUDE_PATH) $^
 
 Makefile: $(srcdir)/Makefile.in ../config.status
 	cd ..; ./config.status --file=tgt-sizer/$@

tgt-sizer/cppcheck.sup

@@ -0,0 +1,8 @@
+// These are the global access functions called from the compiler so they
+// are not used here.
+
+// target_design()
+unusedFunction:sizer.cc:76
+
+// target_query()
+unusedFunction:sizer.cc:65

tgt-sizer/sizer.cc

@@ -193,11 +193,9 @@ static void show_stats(struct sizer_statistics&stats)
 
 unsigned get_nexus_width(ivl_nexus_t nex)
 {
-      ivl_signal_t sig = 0;
-
       for (unsigned idx = 0 ; idx < ivl_nexus_ptrs(nex) ; idx += 1) {
 	    ivl_nexus_ptr_t ptr = ivl_nexus_ptr(nex,idx);
-	    sig = ivl_nexus_ptr_sig(ptr);
+	    ivl_signal_t sig = ivl_nexus_ptr_sig(ptr);
 	    if (sig) return ivl_signal_width(sig);
       }
 

tgt-vvp/Makefile.in

@@ -65,7 +65,8 @@ distclean: clean
 	rm -f stamp-vvp_config-h vvp_config.h
 
 cppcheck: $(O:.o=.c)
-	cppcheck --enable=all -f $(INCLUDE_PATH) $^
+	cppcheck --enable=all -f --suppressions-list=$(srcdir)/cppcheck.sup \
+	         --relative-paths=$(srcdir) $(INCLUDE_PATH) $^
 
 Makefile: $(srcdir)/Makefile.in ../config.status
 	cd ..; ./config.status --file=tgt-vvp/$@

tgt-vvp/cppcheck.sup

@@ -0,0 +1,8 @@
+// These are the global access functions called from the compiler so they
+// are not used here.
+
+// target_design()
+unusedFunction:vvp.c:89
+
+// target_query()
+unusedFunction:vvp.c:184