Accept white after . in portname tokens.

README.txt

@@ -216,7 +216,7 @@ endmodule
 
 --------------------------------------------------------------
 
-Insure that "ivl" is on your search path, and the vpi library 
+Insure that "verilog" is on your search path, and the vpi library 
 is available.
 
 For csh - 
@@ -242,11 +242,6 @@ verilog features. This list is not exhaustive, and does not account
 for errors in the compiler. See the Icarus Verilog web page for the
 current state of support for Verilog.
 
-  - Ranges within parameter definitions:
-    Example: parameter [15:0] seed = 16'ha3; 
-
-    [Note: IEEE Std: 1364-1995 does not allow the syntax.]
-
   - Min/Typ/Max expressions: Example:  a = (1 : 6 : 14);
 
   - Non-scalar memories, i.e. other than registers. 
@@ -261,10 +256,14 @@ current state of support for Verilog.
 
   - structural arithmetic operators are in general not supported.
 
+  - multiplicative operators (*, /, %) are not supported.
+
   - event data type is not supported.
 
+  - real data type not supported.
+
   - system functions are not supported. (User defined functions are
-    supported.)
+    supported, and system tasks are supported.)
 
 Specify blocks are parsed but ignored in general.
 

lexor.lex

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #if !defined(WINNT)
-#ident "$Id: lexor.lex,v 1.35 1999/09/29 01:50:35 steve Exp $"
+#ident "$Id: lexor.lex,v 1.36 1999/09/30 04:51:14 steve Exp $"
 #endif
 
       //# define YYSTYPE lexval
@@ -150,8 +150,11 @@ W [ \t\b\f\r]+
       yylval.text = strdup(yytext);
       return SYSTEM_IDENTIFIER; }
 
-\.[a-zA-Z_][a-zA-Z0-9$_]* {
-      yylval.text = strdup(yytext+1);
+\.{W}?[a-zA-Z_][a-zA-Z0-9$_]* {
+      char*cp = yytext+1;
+      while (! (isalpha(*cp) || (*cp == '_')))
+	    cp += 1;
+      yylval.text = strdup(cp);
       return PORTNAME; }
 
 [0-9][0-9_]*[ \t]*\'d[ \t]*[0-9][0-9_]* {