32 lines
704 B
Coq
32 lines
704 B
Coq
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module top;
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localparam wid = 7;
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localparam vec_wid = $clog2(wid+1)-1;
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reg pass;
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reg [vec_wid:0] mem [wid:0];
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reg [wid:0] sel;
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wor [vec_wid:0] out;
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integer lp;
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genvar i;
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for (i = 0; i <= wid; i = i + 1) assign out = sel[i] ? mem[i] : {wid{1'b0}};
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initial begin
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pass = 1'b1;
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for (lp = 0; lp <= wid; lp = lp + 1) begin
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mem[lp] = lp;
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end
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for (lp = 0; lp <= wid; lp = lp + 1) begin
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sel = 2**lp;
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#1;
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if (out !== mem[lp]) begin
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$display("FAILED: mem[%0d] %b != %b (%b)", lp, mem[lp], out, sel);
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pass = 1'b0;
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end else $display("OK: mem[%0d] %b (%b)", lp, out, sel);
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end
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if (pass) $display("PASSED");
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end
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endmodule
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