24 lines
391 B
Coq
24 lines
391 B
Coq
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module top;
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reg in;
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wire [7:0] out;
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lwr dut(out, in);
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initial begin
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$display("FAILED");
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end
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endmodule
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module lwr(out, in);
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output [7:0] out;
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input in;
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assign out = {8{in}};
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specify
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// It is an error to use a parallel connection here since the input
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// and output (source/destination) do not have the same width.
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(in => out) = 2;
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endspecify
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endmodule
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