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iverilog/pform_types.cc

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Rework the heirarchical identifier parse syntax and pform to handle more general combinations of heirarch and bit selects.
2007-05-24 06:07:11 +02:00
/*
Create new base class for all named items that can be added to a scope. Provide a helper function to identify the derived classes when reporting errors.
2019-09-24 00:17:31 +02:00
* Copyright (c) 2007-2019 Stephen Williams (steve@icarus.com)
Rework the heirarchical identifier parse syntax and pform to handle more general combinations of heirarch and bit selects.
2007-05-24 06:07:11 +02:00
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
updated FSF-address
2012-08-29 03:41:23 +02:00
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
Rework the heirarchical identifier parse syntax and pform to handle more general combinations of heirarch and bit selects.
2007-05-24 06:07:11 +02:00
*/
# include "pform_types.h"
Parse simple typedefs Parse typedefs with structs and enums, but give a sorry message, because they are not yet supported. Rearrange some of the parse rules for variables in order to increase comonality with the typedef rules.
2012-01-08 00:37:30 +01:00
data_type_t::~data_type_t()
{
}
First pass at getting strings to work. In vvp, create the .var/str variable for representing strings, and handle strings in the $display system task. Add to vvp threads the concept of a stack of strings. This is going to be how complex objects are to me handled in the future: forth-like operation stacks. Also add the first two instructions to minimally get strings to work. In the parser, handle the variable declaration and make it available to the ivl_target.h code generator. The vvp code generator can use this information to generate the code for new vvp support.
2012-06-18 03:22:50 +02:00
Create new base class for all named items that can be added to a scope. Provide a helper function to identify the derived classes when reporting errors.
2019-09-24 00:17:31 +02:00
PNamedItem::SymbolType data_type_t::symbol_type() const
{
return TYPE;
}
First pass at getting strings to work. In vvp, create the .var/str variable for representing strings, and handle strings in the $display system task. Add to vvp threads the concept of a stack of strings. This is going to be how complex objects are to me handled in the future: forth-like operation stacks. Also add the first two instructions to minimally get strings to work. In the parser, handle the variable declaration and make it available to the ivl_target.h code generator. The vvp code generator can use this information to generate the code for new vvp support.
2012-06-18 03:22:50 +02:00
string_type_t::~string_type_t()
{
}
Clean up PWire handling of wire data type. / Reword packed type handling
2012-08-03 05:14:55 +02:00
Correctly handle separate port type declaration for `integer` and `time` When using non-ANSI style port declarations it is possible to declare the port direction and the data type for the port in separate statements. E.g. ``` input x; reg x; ``` When using packed array dimensions they must match for both declarations. E.g. ``` input [3:0] x; reg [3:0] x; ``` But this only applies for vector types, i.e. the packed dimension is explicitly declared. It does not apply to the `integer` and `time` types, which have an implicit packed dimension. The current implementation requires that even for `integer` and `time` types the implicit dimension needs to be explicitly declared in the port direction. E.g. the following will result in a elaboration error complaining about a packed dimension mismatch. ``` module test; output x; integer x; endmodule ``` Currently the parser creates a vector_type_t for `time` and `integer`. This means that e.g. `time` and `reg [63:0]` are indistinguishable during elaboration, even though they require different behavior. To fix let the atom2_type_t handle `integer` and `time`. Since it no longer exclusively handles 2-state types, rename it to atom_type_t. This also fixes a problem with the vlog95 target unit tests. The vlog95 target translates ``` module test(output integer x); endmodule ``` to ``` module test(x); output x; integer x; endmodule ``` which then fails when being elaborated again. There were some regression tests that were failing because of this that will now pass. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-03-12 21:10:19 +01:00
atom_type_t size_type (atom_type_t::INT, true);
Create new base class for all named items that can be added to a scope. Provide a helper function to identify the derived classes when reporting errors.
2019-09-24 00:17:31 +02:00
PNamedItem::SymbolType enum_type_t::symbol_type() const
{
return ENUM;
}
PNamedItem::SymbolType class_type_t::symbol_type() const
{
return CLASS;
}
Allow to attach additional information to typedefs Currently typedefs are just a pointer to a data_type_t. Currently typedefs are implemented by setting the name field of a data_type_t when a typedef of the type is declared. This works mostly, but there are some corner cases that can't be supported. E.g. a typedef of a typedef does not work as it overwrites the name field of the same data_type_t multiple times. Forward typedefs can also not be supported since forward typedefs allow to reference a type before it has been declared. There are also some problems with type identifier references from a higher-level scope if there is a type identifier in the current scope with the same name, but it is declared after the type identifier has been referenced. E.g. in the following x should be a vector fo width 8, but it will be a vector of width 4, because while the right type is used it is elaborated in the wrong scope. ``` localparam A = 8; typedef logic [A-1:0] T; module M; localparam A = 4; T x; typedef int T; endmodule ``` Furthermore typedefs used for the type of ports are elaborated in the wrong scope. To handle these corner case issues introduce a data_type_t for typedefs. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-04-23 15:05:53 +02:00
bool typedef_t::set_data_type(data_type_t *t)
{
if (data_type.get())
return false;
data_type.reset(t);
return true;
}
Add support for forward type declarations SystemVerilog supports forward type declarations. This allows to declare a type identifier and use it, e.g. in a signal declaration, before declaring what the actual type is. The type still needs to be fully defined eventually in the same scope as its forward type declaration. E.g. ``` typedef T; T x; typedef int T; ``` The forward type definition can also contain the kind of the type it is going to be. E.g struct, union, class, etc. The LRM calls this the basic type. If the actual type is not of the basic type specified in the forward type declaration this is an error. E.g. ``` typedef struct T; typedef int T; // Error, int is not a struct ``` It is legal to have more than one forward type declaration for the same type name, as long as the basic type is the compatible. It is even legal to have a forward type declaration after the actual type has already been declared. E.g. ``` typedef T; typedef int T; typedef T; ``` Implement support for forward type definitions as part of the new typedef_t. The basic type will be attached to the typedef_t. The compatibility of the basic type for multiple forward type declarations will be checked in the parser. The compatibility of the basic type to the actual type will be checked during elaboration, once the actual type is known. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-03-31 15:08:51 +02:00
bool typedef_t::set_basic_type(enum basic_type bt)
{
if (bt == ANY)
return true;
if (basic_type != ANY && bt != basic_type)
return false;
basic_type = bt;
return true;
}
std::ostream& operator<< (std::ostream&out, enum typedef_t::basic_type bt)
{
switch (bt) {
case typedef_t::ANY:
out << "any";
break;
case typedef_t::ENUM:
out << "enum";
break;
case typedef_t::STRUCT:
out << "struct";
break;
case typedef_t::UNION:
out << "union";
break;
case typedef_t::CLASS:
out << "class";
break;
}
return out;
}