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17 lines
209 B
Verilog
17 lines
209 B
Verilog
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// Check that using an array type as the base type for an enum results in an
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// error.
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module test;
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typedef logic T[1:0];
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enum T {
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A
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} e;
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initial begin
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$display("FAILED");
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end
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endmodule
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