82 lines
2.1 KiB
C++
82 lines
2.1 KiB
C++
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/*
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* Copyright (c) 1998 Stephen Williams (steve@icarus.com)
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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* General Public License as published by the Free Software
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* Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: stupid.cc,v 1.1 1998/11/03 23:29:05 steve Exp $"
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#endif
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# include "netlist.h"
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# include <vector>
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vector<NetObj::Link*>* list_link_nodes(NetObj::Link&link)
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{
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NetObj*net;
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unsigned npin;
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vector<NetObj::Link*>*result = new vector<NetObj::Link*>;
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link.cur_link(net, npin);
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NetObj*cur = net;
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unsigned cpin = npin;
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do {
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if (dynamic_cast<NetNode*>(cur))
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result->push_back(&cur->pin(cpin));
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cur->pin(cpin).next_link(cur, cpin);
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} while ((cur != net) || (cpin != npin));
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return result;
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}
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/*
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* This function scans a design and removes artifacts from the
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* elaboration step, and maybe a few other stupid inefficiencies.
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*/
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class Functor : public Design::SigFunctor {
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public:
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virtual void sig_function(NetNet*);
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};
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void Functor::sig_function(NetNet*net)
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{
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for (unsigned idx = 0 ; idx < net->pin_count() ; idx += 1) {
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vector<NetObj::Link*>*nodes = list_link_nodes(net->pin(idx));
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#if 0
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cerr << "XXXX " << net->name() << "[" << idx << "] "
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"nodes->size() == " << nodes->size() << endl;
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#endif
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delete nodes;
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}
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}
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void stupid(Design*des)
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{
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Functor fun;
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des->scan_signals(&fun);
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}
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/*
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* $Log: stupid.cc,v $
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* Revision 1.1 1998/11/03 23:29:05 steve
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* Introduce verilog to CVS.
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*
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*/
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