435 lines
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HTML
435 lines
28 KiB
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<head>
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<meta charset="utf-8">
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<meta name="viewport" content="width=device-width, initial-scale=1.0"><title>VVP Interactive Mode - Icarus Verilog documentation</title><link rel="shortcut icon" href="../_static/favicon.ico"/><link rel="index" title="Index" href="../genindex.html" /><link rel="search" title="Search" href="../search.html" /><link rel="next" title="VVP as a library" href="vvp_library.html" /><link rel="prev" title="VVP Command Line Flags" href="vvp_flags.html" /><script>
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function setColorMode(t){let e=document.documentElement;e.setAttribute("data-color-mode",t);let a=window.matchMedia&&window.matchMedia("(prefers-color-scheme: dark)").matches,s=t;"auto"===t&&(s=a?"dark":"light"),"light"===s?(e.classList.remove("dark"),e.classList.add("light")):(e.classList.remove("light"),e.classList.add("dark"))}
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</style>
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<meta property="og:type" content="website"/><meta property="og:title" content="VVP Interactive Mode"/>
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<meta name="twitter:card" content="summary"/>
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<a class="sy-head-brand" href="../index.html">
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<strong>Icarus Verilog</strong>
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<kbd>/</kbd>
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<a href="https://github.com/steveicarus/iverilog" aria-label="GitHub">
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<div class="globaltoc" data-expand-depth="0"><p class="caption" role="heading" aria-level="3"><span class="caption-text">Contents:</span></p>
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<ul class="current">
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<li class="toctree-l1"><a class="reference internal" href="../releases/index.html">Icarus Verilog Release Notes</a><ul>
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<li class="toctree-l2"><a class="reference internal" href="../releases/v13-0-release-note.html">🎉 Release V13.0</a></li>
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<li class="toctree-l2"><a class="reference internal" href="../releases/v13-0-release-note.html#major-changes-in-v13">🔄 Major Changes in V13</a></li>
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</ul>
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</li>
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<li class="toctree-l1 current"><a class="reference internal" href="index.html">Icarus Verilog Usage</a><ul class="current">
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<li class="toctree-l2"><a class="reference internal" href="installation.html">Installation Guide</a></li>
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<li class="toctree-l2"><a class="reference internal" href="getting_started.html">Getting Started With Icarus Verilog</a></li>
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<li class="toctree-l2"><a class="reference internal" href="simulation.html">Simulation Using Icarus Verilog</a></li>
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<li class="toctree-l2"><a class="reference internal" href="command_line_flags.html">iverilog Command Line Flags</a></li>
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<li class="toctree-l2"><a class="reference internal" href="command_files.html">Command File Format</a></li>
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<li class="toctree-l2"><a class="reference internal" href="verilog_attributes.html">Verilog Attributes</a></li>
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<li class="toctree-l2"><a class="reference internal" href="ivlpp_flags.html">IVLPP - IVL Preprocessor</a></li>
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<li class="toctree-l2"><a class="reference internal" href="vvp_flags.html">VVP Command Line Flags</a></li>
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<li class="toctree-l2 current"><a class="current reference internal" href="#">VVP Interactive Mode</a></li>
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<li class="toctree-l2"><a class="reference internal" href="vvp_library.html">VVP as a library</a></li>
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<li class="toctree-l2"><a class="reference internal" href="vhdlpp_flags.html">vhdlpp Command Line Flags</a></li>
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<li class="toctree-l2"><a class="reference internal" href="waveform_viewer.html">Viewing Waveforms</a></li>
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<li class="toctree-l2"><a class="reference internal" href="vpi.html">Using VPI</a></li>
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<li class="toctree-l2"><a class="reference internal" href="icarus_verilog_extensions.html">Icarus Verilog Extensions</a></li>
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<li class="toctree-l2"><a class="reference internal" href="icarus_verilog_quirks.html">Icarus Verilog Quirks</a></li>
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<li class="toctree-l2"><a class="reference internal" href="reporting_issues.html">Reporting Issues</a></li>
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</ul>
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</li>
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<li class="toctree-l1"><a class="reference internal" href="../targets/index.html">The Icarus Verilog Targets</a><ul>
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<li class="toctree-l2"><a class="reference internal" href="../targets/tgt-vvp.html">The vvp Code Generator (-tvvp)</a></li>
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<li class="toctree-l2"><a class="reference internal" href="../targets/tgt-stub.html">The stub Code Generator (-tstub)</a></li>
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<li class="toctree-l2"><a class="reference internal" href="../targets/tgt-null.html">The null Code Generator (-tnull)</a></li>
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<li class="toctree-l2"><a class="reference internal" href="../targets/tgt-vhdl.html">The VHDL Code Generator (-tvhdl)</a></li>
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<li class="toctree-l2"><a class="reference internal" href="../targets/tgt-vlog95.html">The Verilog ‘95 Code Generator (-tvlog95)</a></li>
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<li class="toctree-l2"><a class="reference internal" href="../targets/tgt-pcb.html">The PCB Code Generator (-tpcb)</a></li>
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<li class="toctree-l2"><a class="reference internal" href="../targets/tgt-fpga.html">The FPGA Code Generator (-tfpga)</a></li>
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<li class="toctree-l2"><a class="reference internal" href="../targets/tgt-pal.html">The PAL Code Generator (-tpal)</a></li>
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<li class="toctree-l2"><a class="reference internal" href="../targets/tgt-sizer.html">The sizer Code Analyzer (-tsizer)</a></li>
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<li class="toctree-l2"><a class="reference internal" href="../targets/tgt-verilog.html">The Verilog Code Generator (-tverilog)</a></li>
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<li class="toctree-l2"><a class="reference internal" href="../targets/tgt-blif.html">The BLIF Code Generator (-tblif)</a></li>
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</ul>
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</li>
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<li class="toctree-l1"><a class="reference internal" href="../developer/index.html">Icarus Verilog Developer Support</a><ul>
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<li class="toctree-l2"><a class="reference internal" href="../developer/getting_started.html">Getting Started as a Contributor</a></li>
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<li class="toctree-l2"><a class="reference internal" href="../developer/regression_tests.html">The Regression Test Suite</a></li>
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<li class="toctree-l2"><a class="reference internal" href="../developer/version_stamps.html">Files With Version Information</a></li>
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<li class="toctree-l2"><a class="reference internal" href="../developer/guide/index.html">Developer Guide</a><ul>
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<li class="toctree-l3"><a class="reference internal" href="../developer/guide/ivl/index.html">IVL - The Core Compiler</a><ul>
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<li class="toctree-l4"><a class="reference internal" href="../developer/guide/ivl/netlist.html">Netlist Format</a></li>
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<li class="toctree-l4"><a class="reference internal" href="../developer/guide/ivl/attributes.html">Icarus Verilog Attributes</a></li>
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<li class="toctree-l4"><a class="reference internal" href="../developer/guide/ivl/ivl_target.html">Loadable Target API (ivl_target)</a></li>
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<li class="toctree-l4"><a class="reference internal" href="../developer/guide/ivl/lpm.html">What Is LPM</a></li>
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<li class="toctree-l4"><a class="reference internal" href="../developer/guide/ivl/t-dll.html">Loadable Targets</a></li>
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</ul>
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</li>
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<li class="toctree-l3"><a class="reference internal" href="../developer/guide/vvp/index.html">VVP - Verilog Virtual Processor</a><ul>
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<li class="toctree-l4"><a class="reference internal" href="../developer/guide/vvp/vvp.html">VVP Simulation Engine</a></li>
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<li class="toctree-l4"><a class="reference internal" href="../developer/guide/vvp/opcodes.html">Executable Instruction Opcodes</a></li>
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<li class="toctree-l4"><a class="reference internal" href="../developer/guide/vvp/vpi.html">VPI Within VVP</a></li>
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<li class="toctree-l4"><a class="reference internal" href="../developer/guide/vvp/vthread.html">Thread Details</a></li>
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<li class="toctree-l4"><a class="reference internal" href="../developer/guide/vvp/debug.html">Debug Aids For VVP</a></li>
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</ul>
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</li>
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<li class="toctree-l3"><a class="reference internal" href="../developer/guide/tgt-vvp/tgt-vvp.html">The VVP Target</a></li>
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<li class="toctree-l3"><a class="reference internal" href="../developer/guide/vpi/index.html">VPI in Icarus Verilog</a><ul>
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<li class="toctree-l4"><a class="reference internal" href="../developer/guide/vpi/vpi.html">VPI Modules in Icarus Verilog</a></li>
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<li class="toctree-l4"><a class="reference internal" href="../developer/guide/vpi/va_math.html">Verilog-A math library</a></li>
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</ul>
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</li>
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<li class="toctree-l3"><a class="reference internal" href="../developer/guide/cadpli/cadpli.html">Cadence PLI1 Modules</a></li>
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<li class="toctree-l3"><a class="reference internal" href="../developer/guide/misc/index.html">Miscellaneous</a><ul>
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<li class="toctree-l4"><a class="reference internal" href="../developer/guide/misc/ieee1364-notes.html">IEEE1364 Notes</a></li>
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<li class="toctree-l4"><a class="reference internal" href="../developer/guide/misc/swift.html">Swift Model Support (Preliminary)</a></li>
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<li class="toctree-l4"><a class="reference internal" href="../developer/guide/misc/xilinx-hint.html">Xilinx Hint</a></li>
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</ul>
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</li>
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</ul>
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</li>
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<li class="toctree-l2"><a class="reference internal" href="../developer/glossary.html">Glossary</a></li>
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</ul>
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</li>
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</ul>
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</div>
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</div>
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</div>
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</aside>
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<div class="lside-overlay js-menu" role="button" aria-label="Close left sidebar" aria-controls="lside" aria-expanded="false"></div>
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<div class="sy-scrollbar sy-rside-inner px-6 xl:top-16 xl:sticky xl:pl-0 pt-6 pb-4"><div class="localtoc"><h3>On this page</h3><ul>
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<li><a class="reference internal" href="#enter-interactive-mode">Enter Interactive Mode</a></li>
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<li><a class="reference internal" href="#browsing-the-design">Browsing the Design</a></li>
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<li><a class="reference internal" href="#leave-interactive-mode">Leave Interactive Mode</a></li>
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</ul>
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</div><a class="js-repo-stats repo-stats flex items-center" href="https://github.com/steveicarus/iverilog"
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data-type="github" data-user="steveicarus" data-repo="iverilog">
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<span class="flex-grow px-2 break-all">
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<span>iverilog</span>
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<span class="flex items-center pr-3">
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</a><div class="edit-this-page">
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<a href="https://github.com/steveicarus/iverilog/blob/master/Documentation/usage/vvp_debug.rst">Edit this page</a>
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<strong itemprop="name">VVP Interactive Mode</strong>
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<span>View Source</span></a><a role="menuitem" href="https://chatgpt.com/?hints=search&q=Read%20https%3A//raw.githubusercontent.com/steveicarus/iverilog/refs/heads/master/Documentation/usage/vvp_debug.rst.txt%20so%20I%20can%20ask%20questions%20about%20it." target="_blank" rel="nofollow">
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</div><article class="yue" role="main">
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<section id="vvp-interactive-mode">
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|
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<h1>VVP Interactive Mode<a class="headerlink" href="#vvp-interactive-mode" title="Link to this heading">¶</a></h1>
|
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|
|
<p>The vvp command has an interactive debug mode, where you can stop the
|
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|
|
simulation and browse the current state of the simulation. There are
|
|||
|
|
a couple ways to enter the debug mode, but once in interactive debug
|
|||
|
|
mode, the usage is the same. Consider the example below:</p>
|
|||
|
|
<div class="highlight-verilog notranslate"><div class="highlight"><pre><span></span><span data-line="1"><span class="k">module</span><span class="w"> </span><span class="n">clock</span><span class="p">(</span><span class="k">output</span><span class="w"> </span><span class="kt">reg</span><span class="w"> </span><span class="n">clock</span><span class="p">);</span>
|
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</span><span data-line="2"><span class="w"> </span><span class="k">initial</span><span class="w"> </span><span class="n">clock</span><span class="w"> </span><span class="o">=</span><span class="w"> </span><span class="mh">1</span><span class="mb">'b1</span><span class="p">;</span>
|
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|
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</span><span data-line="3"><span class="w"> </span><span class="k">always</span><span class="w"> </span><span class="p">#</span><span class="mh">100</span><span class="w"> </span><span class="n">clock</span><span class="w"> </span><span class="o">=</span><span class="w"> </span><span class="o">!</span><span class="n">clock</span><span class="p">;</span>
|
|||
|
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</span><span data-line="4"><span class="k">endmodule</span><span class="w"> </span><span class="c1">// clock</span>
|
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|
|
</span><span data-line="5">
|
|||
|
|
</span><span data-line="6"><span class="k">module</span><span class="w"> </span><span class="n">main</span><span class="p">;</span>
|
|||
|
|
</span><span data-line="7">
|
|||
|
|
</span><span data-line="8"><span class="w"> </span><span class="kt">reg</span><span class="w"> </span><span class="p">[</span><span class="mh">2</span><span class="o">:</span><span class="mh">0</span><span class="p">]</span><span class="w"> </span><span class="n">foo</span><span class="p">;</span>
|
|||
|
|
</span><span data-line="9"><span class="w"> </span><span class="kt">wire</span><span class="w"> </span><span class="n">clk</span><span class="p">;</span>
|
|||
|
|
</span><span data-line="10">
|
|||
|
|
</span><span data-line="11"><span class="w"> </span><span class="n">clock</span><span class="w"> </span><span class="n">foo_clock</span><span class="p">(</span><span class="n">clk</span><span class="p">);</span>
|
|||
|
|
</span><span data-line="12">
|
|||
|
|
</span><span data-line="13"><span class="w"> </span><span class="k">always</span><span class="w"> </span><span class="p">@(</span><span class="k">posedge</span><span class="w"> </span><span class="n">clk</span><span class="p">)</span>
|
|||
|
|
</span><span data-line="14"><span class="w"> </span><span class="n">foo</span><span class="w"> </span><span class="o"><=</span><span class="w"> </span><span class="n">foo</span><span class="w"> </span><span class="o">+</span><span class="w"> </span><span class="mh">1</span><span class="p">;</span>
|
|||
|
|
</span><span data-line="15">
|
|||
|
|
</span><span data-line="16"><span class="w"> </span><span class="k">initial</span><span class="w"> </span><span class="k">begin</span>
|
|||
|
|
</span><span data-line="17"><span class="w"> </span><span class="n">foo</span><span class="w"> </span><span class="o">=</span><span class="w"> </span><span class="mh">3</span><span class="mb">'b000</span><span class="p">;</span>
|
|||
|
|
</span><span data-line="18"><span class="w"> </span><span class="p">#</span><span class="mh">250</span><span class="w"> </span><span class="nb">$stop</span><span class="p">;</span>
|
|||
|
|
</span><span data-line="19"><span class="w"> </span><span class="k">end</span>
|
|||
|
|
</span><span data-line="20">
|
|||
|
|
</span><span data-line="21"><span class="k">endmodule</span>
|
|||
|
|
</span></pre></div>
|
|||
|
|
</div>
|
|||
|
|
<p>In examples that follow, we will use the above sample program.</p>
|
|||
|
|
<section id="enter-interactive-mode">
|
|||
|
|
<h2>Enter Interactive Mode<a class="headerlink" href="#enter-interactive-mode" title="Link to this heading">¶</a></h2>
|
|||
|
|
<p>The first and most common method is to put “$stop” system task
|
|||
|
|
calls in the simulation at the times where you want to simulation
|
|||
|
|
to break and enter interactive mode. The example above has a $stop,
|
|||
|
|
so the output looks like this:</p>
|
|||
|
|
<div class="highlight-none notranslate"><div class="highlight"><pre><span></span><span data-line="1">../foo.vl:25: $stop called at 250 (1s)
|
|||
|
|
</span><span data-line="2">** VVP Stop(0) **
|
|||
|
|
</span><span data-line="3">** Flushing output streams.
|
|||
|
|
</span><span data-line="4">** Current simulation time is 250 ticks.
|
|||
|
|
</span><span data-line="5">>
|
|||
|
|
</span></pre></div>
|
|||
|
|
</div>
|
|||
|
|
<p>You can get some interactive help by using the “help” command:</p>
|
|||
|
|
<div class="highlight-none notranslate"><div class="highlight"><pre><span></span><span data-line="1">> help
|
|||
|
|
</span><span data-line="2">Commands can be from the following table of base commands,
|
|||
|
|
</span><span data-line="3">or can be invocations of system tasks/functions.
|
|||
|
|
</span><span data-line="4">
|
|||
|
|
</span><span data-line="5">cd - Synonym for push.
|
|||
|
|
</span><span data-line="6">cont - Resume (continue) the simulation
|
|||
|
|
</span><span data-line="7">finish - Finish the simulation.
|
|||
|
|
</span><span data-line="8">help - Get help.
|
|||
|
|
</span><span data-line="9">list - List items in the current scope.
|
|||
|
|
</span><span data-line="10">load - Load a VPI module, a la vvp -m.
|
|||
|
|
</span><span data-line="11">ls - Shorthand for "list".
|
|||
|
|
</span><span data-line="12">pop - Pop one scope from the scope stack.
|
|||
|
|
</span><span data-line="13">push - Descend into the named scope.
|
|||
|
|
</span><span data-line="14">step - Single-step the scheduler for 1 event.
|
|||
|
|
</span><span data-line="15">time - Print the current simulation time.
|
|||
|
|
</span><span data-line="16">trace - Control statement tracing (on/off) when the code is instrumented.
|
|||
|
|
</span><span data-line="17">where - Show current scope, and scope hierarchy stack.
|
|||
|
|
</span><span data-line="18">
|
|||
|
|
</span><span data-line="19">If the command name starts with a '$' character, it
|
|||
|
|
</span><span data-line="20">is taken to be the name of a system task, and a call is
|
|||
|
|
</span><span data-line="21">built up and executed. For example, "$display foo" will
|
|||
|
|
</span><span data-line="22">call the function as $display(foo).
|
|||
|
|
</span></pre></div>
|
|||
|
|
</div>
|
|||
|
|
<p>You can also enter interactive mode at the terminal by interrupting the
|
|||
|
|
execution with a “^C” (Control-C) character. The vvp engine catches the
|
|||
|
|
terminal interrupt and drops you into the interactive prompt:</p>
|
|||
|
|
<div class="highlight-none notranslate"><div class="highlight"><pre><span></span><span data-line="1">^C** VVP Stop(0) **
|
|||
|
|
</span><span data-line="2">** Flushing output streams.
|
|||
|
|
</span><span data-line="3">** Current simulation time is 533928600 ticks.
|
|||
|
|
</span><span data-line="4">>
|
|||
|
|
</span></pre></div>
|
|||
|
|
</div>
|
|||
|
|
<p>This could be useful if you suspect that your simulation is stuck in
|
|||
|
|
an infinite loop and you want to rummage around and see what’s going on.</p>
|
|||
|
|
<p>And finally, you can pass the “-s” command line flag to vvp to tell it
|
|||
|
|
to execute “$stop” at the beginning of the simulation, before any other
|
|||
|
|
events are executed. This may be useful as a way to manually set up some
|
|||
|
|
details about the simulation.</p>
|
|||
|
|
</section>
|
|||
|
|
<section id="browsing-the-design">
|
|||
|
|
<h2>Browsing the Design<a class="headerlink" href="#browsing-the-design" title="Link to this heading">¶</a></h2>
|
|||
|
|
<p>Now that you are in the interactive prompt, you can browse
|
|||
|
|
around the design:</p>
|
|||
|
|
<div class="highlight-none notranslate"><div class="highlight"><pre><span></span><span data-line="1">> ls
|
|||
|
|
</span><span data-line="2">2 items in this scope:
|
|||
|
|
</span><span data-line="3">package : $unit
|
|||
|
|
</span><span data-line="4">module : main
|
|||
|
|
</span><span data-line="5">> cd main
|
|||
|
|
</span><span data-line="6">> ls
|
|||
|
|
</span><span data-line="7">3 items in this scope:
|
|||
|
|
</span><span data-line="8">reg : foo[2:0]
|
|||
|
|
</span><span data-line="9">module : foo_clock
|
|||
|
|
</span><span data-line="10">net : clk
|
|||
|
|
</span><span data-line="11">> where
|
|||
|
|
</span><span data-line="12">module main
|
|||
|
|
</span><span data-line="13">> $display foo
|
|||
|
|
</span><span data-line="14">1
|
|||
|
|
</span><span data-line="15">> cd foo_clock
|
|||
|
|
</span><span data-line="16">> where
|
|||
|
|
</span><span data-line="17">module foo_clock
|
|||
|
|
</span><span data-line="18">module main
|
|||
|
|
</span><span data-line="19">> ls
|
|||
|
|
</span><span data-line="20">2 items in this scope:
|
|||
|
|
</span><span data-line="21">port : clock -- output
|
|||
|
|
</span><span data-line="22">reg : clock
|
|||
|
|
</span></pre></div>
|
|||
|
|
</div>
|
|||
|
|
<p>In the above example, the ‘cd’ and ‘pop’ commands descend into a scope
|
|||
|
|
or pop back up a scope level. The ‘where’ command shows the scope stack,
|
|||
|
|
and the ‘ls’ command lists the items present in the scope. With these
|
|||
|
|
commands, one can browse freely throughout the design scope hierarchy.</p>
|
|||
|
|
<p>It is also possible to call system tasks within the debug mode. The call
|
|||
|
|
to the “$display” function is an example of this. In general, any system
|
|||
|
|
task can be invoked, in the current context, with the objects that are
|
|||
|
|
included on the command line passed as arguments. The arguments can be
|
|||
|
|
variables or nets, and various kinds of literals:</p>
|
|||
|
|
<div class="highlight-none notranslate"><div class="highlight"><pre><span></span><span data-line="1">> ls
|
|||
|
|
</span><span data-line="2">2 items in this scope:
|
|||
|
|
</span><span data-line="3">port : clock -- output
|
|||
|
|
</span><span data-line="4">reg : clock
|
|||
|
|
</span><span data-line="5">> $display "Hello, World! " 10 " " clock
|
|||
|
|
</span><span data-line="6">Hello, World! 10 1
|
|||
|
|
</span></pre></div>
|
|||
|
|
</div>
|
|||
|
|
<p>This is a great way to call custom system tasks as well. And system task
|
|||
|
|
that vvp knows about can be invoked this way.</p>
|
|||
|
|
</section>
|
|||
|
|
<section id="leave-interactive-mode">
|
|||
|
|
<h2>Leave Interactive Mode<a class="headerlink" href="#leave-interactive-mode" title="Link to this heading">¶</a></h2>
|
|||
|
|
<p>After you are done probing around in the interactive mode, you can
|
|||
|
|
resume the simulation, or termimate execution. Resume the simulation
|
|||
|
|
with the “cont” command, and terminate the simulation with the
|
|||
|
|
“finish” command. The latter is the same as executing the
|
|||
|
|
“$finish” system task.</p>
|
|||
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</section>
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</section>
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