68 lines
1.6 KiB
Coq
68 lines
1.6 KiB
Coq
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// Copyright (c) 2016 CERN
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// Maciej Suminski <maciej.suminski@cern.ch>
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//
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// This source code is free software; you can redistribute it
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// and/or modify it in source code form under the terms of the GNU
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// General Public License as published by the Free Software
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// Foundation; either version 2 of the License, or (at your option)
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// any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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// Test for vvp_net_fun_t::recv_vec4_pv() implementation (vvp).
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module vvp_recv_vec4_pv (input wire logic clk, input wire logic inp,
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output wire logic[16:0] arr_out);
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logic[16:0] arr;
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always begin
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arr[15:0] <= arr[16:1];
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@(clk); wait(clk == 1'b1);
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end
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assign arr[16] = inp;
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assign arr_out = arr;
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endmodule
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module vvp_recv_vec4_pv_test;
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logic clk, inp;
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logic [16:0] arr, src;
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vvp_recv_vec4_pv dut(clk, inp, arr);
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always #5 clk <= ~clk;
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initial begin
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int i;
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src <= 17'b01101110010011011;
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clk <= 1'b1;
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#5;
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for(i = 0; i < 17; i = i + 1) begin
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#10 inp = src[i];
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end
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#5; // wait for the last assignment occuring in the for loop above
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if(arr !== src) begin
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$display("FAILED");
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end else begin
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$display("PASSED");
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end
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$finish();
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end
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endmodule
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