71 lines
1.8 KiB
Coq
71 lines
1.8 KiB
Coq
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/*
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* Copyright (c) 2000 Stephen Williams (steve@icarus.com)
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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* General Public License as published by the Free Software
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* Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*
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* $Log: mem1.v,v $
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* Revision 1.2 2001/01/29 17:26:06 ka6s
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* Check in fixes contributed by Paul Campbell (Thanks Paul)
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*
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*/
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`define CLK 10
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module main;
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reg [31:0] counter;
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integer i;
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reg [23:0] testvec [15:0];
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reg clk;
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wire [23:0] data;
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reg write;
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initial
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begin
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write = 0;
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counter = 0;
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clk = 0;
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$readmemb("ivltests/mem1.dat", testvec, 0);
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for (i = 0; i < 16; i = i + 1)
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begin
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$write("mem[%d] = %x\n", i, testvec[i]);
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end
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end
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always
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begin
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#`CLK clk = ~clk;
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end
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assign data = (write) ? testvec[counter] : 24'bz;
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always @ (posedge clk)
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begin
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begin
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write = 1;
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#1 ;
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$write("%d %x\n", counter, data);
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write = 0;
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counter = counter + 1;
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if (counter == 16)
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$finish(0);
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end
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end
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endmodule
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