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iverilog/ivtest/gold/sv_end_labels_bad.gold

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Add helper function to check end label Most named constructs support a end label in SystemVerilog. The handling of this end label is always the same. * Generate an error if the end label does not match the name of the block * Generate an error if not in SystemVerilog mode * Delete the end label Factor this into a common helper function. This reduces code size a bit and results in consistent error messages. The latter requires refreshing of some gold files to match the slightly different error messages. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-02-04 12:27:17 +01:00
./ivltests/sv_end_labels_bad.v:14: error: block end label `dummy_label_bad` doesn't match block name `dummy_label`.
./ivltests/sv_end_labels_bad.v:16: error: module end label `test_bad` doesn't match module name `test`.