mirror of https://github.com/YosysHQ/icestorm.git
435 lines
11 KiB
C++
435 lines
11 KiB
C++
#include <stdio.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <assert.h>
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#include <string.h>
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#include <string>
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#include <vector>
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#include <map>
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#include <set>
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FILE *fin, *fout;
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std::string config_device;
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std::vector<std::vector<std::string>> config_tile_type;
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std::vector<std::vector<std::vector<std::vector<bool>>>> config_bits;
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struct net_segment_name
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{
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int tile_x, tile_y;
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std::string segment_name;
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net_segment_name(int x, int y, std::string n) :
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tile_x(x), tile_y(y), segment_name(n) { }
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bool operator<(const net_segment_name &other) const {
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if (tile_x != other.tile_x)
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return tile_x < other.tile_x;
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if (tile_y != other.tile_y)
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return tile_y < other.tile_y;
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return segment_name < other.segment_name;
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}
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};
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std::map<net_segment_name, int> segment_to_net;
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std::map<int, std::set<net_segment_name>> net_to_segments;
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std::map<int, std::set<int>> net_buffers, net_rbuffers, net_routing;
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std::map<std::pair<int, int>, std::pair<int, int>> connection_pos;
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std::set<int> used_nets;
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// netlist_cells[cell_name][port_name] = port_expr
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std::map<std::string, std::map<std::string, std::string>> netlist_cells;
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std::map<std::string, std::string> netlist_cell_types;
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std::string vstringf(const char *fmt, va_list ap)
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{
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std::string string;
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char *str = NULL;
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#ifdef _WIN32
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int sz = 64, rc;
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while (1) {
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va_list apc;
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va_copy(apc, ap);
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str = (char*)realloc(str, sz);
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rc = vsnprintf(str, sz, fmt, apc);
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va_end(apc);
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if (rc >= 0 && rc < sz)
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break;
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sz *= 2;
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}
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#else
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if (vasprintf(&str, fmt, ap) < 0)
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str = NULL;
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#endif
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if (str != NULL) {
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string = str;
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free(str);
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}
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return string;
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}
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std::string stringf(const char *fmt, ...)
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{
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std::string string;
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va_list ap;
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va_start(ap, fmt);
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string = vstringf(fmt, ap);
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va_end(ap);
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return string;
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}
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void read_config()
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{
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char buffer[128];
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int tile_x, tile_y, line_nr = -1;
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while (fgets(buffer, 128, fin))
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{
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if (buffer[0] == '.')
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{
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line_nr = -1;
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const char *tok = strtok(buffer, " \t\r\n");
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if (!strcmp(tok, ".device"))
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{
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config_device = strtok(nullptr, " \t\r\n");
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} else
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if (!strcmp(tok, ".io_tile") || !strcmp(tok, ".logic_tile") ||
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!strcmp(tok, ".ramb_tile") || !strcmp(tok, ".ramt_tile"))
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{
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line_nr = 0;
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tile_x = atoi(strtok(nullptr, " \t\r\n"));
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tile_y = atoi(strtok(nullptr, " \t\r\n"));
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if (tile_x >= int(config_tile_type.size())) {
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config_tile_type.resize(tile_x+1);
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config_bits.resize(tile_x+1);
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}
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if (tile_y >= int(config_tile_type.at(tile_x).size())) {
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config_tile_type.at(tile_x).resize(tile_y+1);
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config_bits.at(tile_x).resize(tile_y+1);
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}
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if (!strcmp(tok, ".io_tile"))
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config_tile_type.at(tile_x).at(tile_y) = "io";
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if (!strcmp(tok, ".logic_tile"))
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config_tile_type.at(tile_x).at(tile_y) = "logic";
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if (!strcmp(tok, ".ramb_tile"))
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config_tile_type.at(tile_x).at(tile_y) = "ramb";
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if (!strcmp(tok, ".ramt_tile"))
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config_tile_type.at(tile_x).at(tile_y) = "ramt";
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}
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} else
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if (line_nr >= 0)
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{
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assert(int(config_bits.at(tile_x).at(tile_y).size()) == line_nr);
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config_bits.at(tile_x).at(tile_y).resize(line_nr+1);
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for (int i = 0; buffer[i] == '0' || buffer[i] == '1'; i++)
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config_bits.at(tile_x).at(tile_y).at(line_nr).push_back(buffer[i] == '1');
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line_nr++;
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}
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}
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}
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void read_chipdb()
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{
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char buffer[1024];
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snprintf(buffer, 1024, "/usr/local/share/icebox/chipdb-%s.txt", config_device.c_str());
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FILE *fdb = fopen(buffer, "r");
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if (fdb == nullptr) {
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perror("Can't open chipdb file");
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exit(1);
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}
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std::string mode;
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int current_net = -1;
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int tile_x = -1, tile_y = -1;
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std::string thiscfg;
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while (fgets(buffer, 1024, fdb))
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{
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if (buffer[0] == '#')
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continue;
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const char *tok = strtok(buffer, " \t\r\n");
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if (tok == nullptr)
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continue;
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if (tok[0] == '.')
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{
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mode = tok;
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if (mode == ".net")
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{
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current_net = atoi(strtok(nullptr, " \t\r\n"));
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continue;
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}
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if (mode == ".buffer" || mode == ".routing")
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{
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tile_x = atoi(strtok(nullptr, " \t\r\n"));
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tile_y = atoi(strtok(nullptr, " \t\r\n"));
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current_net = atoi(strtok(nullptr, " \t\r\n"));
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thiscfg = "";
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while ((tok = strtok(nullptr, " \t\r\n")) != nullptr) {
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int bit_row, bit_col, rc;
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rc = sscanf(tok, "B%d[%d]", &bit_row, &bit_col);
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assert(rc == 2);
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thiscfg.push_back(config_bits[tile_x][tile_y][bit_row][bit_col] ? '1' : '0');
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}
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continue;
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}
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continue;
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}
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if (mode == ".net") {
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int tile_x = atoi(tok);
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int tile_y = atoi(strtok(nullptr, " \t\r\n"));
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std::string segment_name = strtok(nullptr, " \t\r\n");
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net_segment_name seg(tile_x, tile_y, segment_name);
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segment_to_net[seg] = current_net;
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net_to_segments[current_net].insert(seg);
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}
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if (mode == ".buffer" && !strcmp(tok, thiscfg.c_str())) {
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int other_net = atoi(strtok(nullptr, " \t\r\n"));
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net_rbuffers[current_net].insert(other_net);
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net_buffers[other_net].insert(current_net);
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connection_pos[std::pair<int, int>(current_net, other_net)] =
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connection_pos[std::pair<int, int>(other_net, current_net)] =
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std::pair<int, int>(tile_x, tile_y);
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used_nets.insert(current_net);
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used_nets.insert(other_net);
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}
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if (mode == ".routing" && !strcmp(tok, thiscfg.c_str())) {
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int other_net = atoi(strtok(nullptr, " \t\r\n"));
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net_routing[current_net].insert(other_net);
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net_routing[other_net].insert(current_net);
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connection_pos[std::pair<int, int>(current_net, other_net)] =
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connection_pos[std::pair<int, int>(other_net, current_net)] =
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std::pair<int, int>(tile_x, tile_y);
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used_nets.insert(current_net);
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used_nets.insert(other_net);
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}
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}
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fclose(fdb);
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// purge unused nets from memory
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int max_net = net_to_segments.rbegin()->first;
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for (int net = 0; net <= max_net; net++)
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{
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if (used_nets.count(net))
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continue;
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for (auto seg : net_to_segments[net])
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segment_to_net.erase(seg);
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net_to_segments.erase(net);
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for (auto other : net_buffers[net])
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net_rbuffers[other].erase(net);
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net_buffers.erase(net);
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for (auto other : net_rbuffers[net])
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net_buffers[other].erase(net);
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net_rbuffers.erase(net);
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for (auto other : net_routing[net])
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net_routing[other].erase(net);
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net_routing.erase(net);
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}
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#if 1
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for (int net : used_nets)
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{
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printf("// NET %d:\n", net);
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for (auto seg : net_to_segments[net])
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printf("// SEG %d %d %s\n", seg.tile_x, seg.tile_y, seg.segment_name.c_str());
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for (auto other : net_buffers[net])
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printf("// BUFFER %d %d %d\n", connection_pos[std::pair<int, int>(net, other)].first,
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connection_pos[std::pair<int, int>(net, other)].second, other);
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for (auto other : net_rbuffers[net])
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printf("// RBUFFER %d %d %d\n", connection_pos[std::pair<int, int>(net, other)].first,
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connection_pos[std::pair<int, int>(net, other)].second, other);
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for (auto other : net_routing[net])
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printf("// ROUTE %d %d %d\n", connection_pos[std::pair<int, int>(net, other)].first,
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connection_pos[std::pair<int, int>(net, other)].second, other);
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}
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#endif
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}
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std::string make_seg_pre_io(int x, int y, int z)
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{
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auto cell = stringf("pre_io_%d_%d_%d", x, y, z);
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if (netlist_cell_types.count(cell))
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return cell;
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netlist_cell_types[cell] = "PRE_IO";
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netlist_cells[cell]["PADIN"] = stringf("io_pad_%d_%d_%d_dout", x, y, z);
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netlist_cells[cell]["PADOUT"] = stringf("io_pad_%d_%d_%d_din", x, y, z);
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netlist_cells[cell]["PADOEN"] = stringf("io_pad_%d_%d_%d_oe", x, y, z);
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netlist_cells[cell]["LATCHINPUTVALUE"] = "";
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netlist_cells[cell]["CLOCKENABLE"] = "";
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netlist_cells[cell]["INPUTCLK"] = "";
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netlist_cells[cell]["OUTPUTCLK"] = "";
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netlist_cells[cell]["OUTPUTENABLE"] = "";
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netlist_cells[cell]["DOUT1"] = "";
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netlist_cells[cell]["DOUT0"] = "";
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netlist_cells[cell]["DIN1"] = "";
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netlist_cells[cell]["DIN0"] = "";
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fprintf(fout, " wire io_pad_%d_%d_%d_din;\n", x, y, z);
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fprintf(fout, " wire io_pad_%d_%d_%d_dout;\n", x, y, z);
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fprintf(fout, " wire io_pad_%d_%d_%d_oe;\n", x, y, z);
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fprintf(fout, " (* keep *) wire io_pad_%d_%d_%d_pin;\n", x, y, z);
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fprintf(fout, " IO_PAD io_pad_%d_%d_%d (\n", x, y, z);
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fprintf(fout, " .DIN(io_pad_%d_%d_%d_din),\n", x, y, z);
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fprintf(fout, " .DOUT(io_pad_%d_%d_%d_dout),\n", x, y, z);
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fprintf(fout, " .OE(io_pad_%d_%d_%d_oe),\n", x, y, z);
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fprintf(fout, " .PACKAGEPIN(io_pad_%d_%d_%d_pin)\n", x, y, z);
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fprintf(fout, " );\n");
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return cell;
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}
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void make_odrv(int x, int y, int src)
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{
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for (int dst : net_buffers[src])
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{
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auto cell = stringf("odrv_%d_%d_%d_%d", x, y, src, dst);
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if (netlist_cell_types.count(cell))
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continue;
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bool is4 = false, is12 = false;
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for (auto &seg : net_to_segments[dst]) {
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if (seg.segment_name.substr(0, 4) == "sp4_") is4 = true;
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if (seg.segment_name.substr(0, 5) == "sp12_") is12 = true;
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}
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assert(is4 != is12);
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netlist_cell_types[cell] = is4 ? "Odrv4" : "Odrv12";
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netlist_cells[cell]["I"] = stringf("net_%d", src);
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netlist_cells[cell]["O"] = stringf("net_%d", dst);
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}
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}
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void make_inmux(int x, int y, int dst)
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{
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for (int src : net_rbuffers[dst])
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{
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auto cell = stringf("inmux_%d_%d_%d_%d", x, y, src, dst);
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if (netlist_cell_types.count(cell))
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continue;
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netlist_cell_types[cell] = config_tile_type[x][y] == "io" ? "IoInMux" : "InMux";
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netlist_cells[cell]["I"] = stringf("net_%d", src);
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netlist_cells[cell]["O"] = stringf("net_%d", dst);
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}
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}
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void make_seg_cell(int net, const net_segment_name &seg)
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{
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int a, b;
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if (sscanf(seg.segment_name.c_str(), "io_%d/D_IN_%d", &a, &b) == 2) {
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auto cell = make_seg_pre_io(seg.tile_x, seg.tile_y, a);
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netlist_cells[cell][stringf("DIN%d", b)] = stringf("net_%d", net);
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make_odrv(seg.tile_x, seg.tile_y, net);
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return;
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}
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if (sscanf(seg.segment_name.c_str(), "io_%d/D_OUT_%d", &a, &b) == 2) {
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auto cell = make_seg_pre_io(seg.tile_x, seg.tile_y, a);
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netlist_cells[cell][stringf("DOUT%d", b)] = stringf("net_%d", net);
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make_inmux(seg.tile_x, seg.tile_y, net);
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return;
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}
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}
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void help(const char *cmd)
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{
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printf("\n");
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printf("Usage: %s [options] input.txt [output.v]\n", cmd);
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printf("\n");
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exit(1);
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}
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int main(int argc, char **argv)
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{
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int opt;
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while ((opt = getopt(argc, argv, "")) != -1)
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{
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switch (opt)
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{
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default:
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help(argv[0]);
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}
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}
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if (optind+1 == argc) {
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fin = fopen(argv[optind], "r");
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if (fin == nullptr) {
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perror("Can't open input file");
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exit(1);
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}
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fout = stdout;
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} else
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if (optind+2 == argc) {
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fin = fopen(argv[optind], "r");
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if (fin == nullptr) {
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perror("Can't open input file");
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exit(1);
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}
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fout = fopen(argv[optind+1], "w");
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if (fout == nullptr) {
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perror("Can't open output file");
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exit(1);
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}
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} else
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help(argv[0]);
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printf("// Reading input .txt file..\n");
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read_config();
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printf("// Reading chipdb file..\n");
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read_chipdb();
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fprintf(fout, "module chip;\n");
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for (int net : used_nets)
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fprintf(fout, " (* keep *) wire net_%d;\n", net);
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for (int net : used_nets)
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for (auto seg : net_to_segments[net])
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make_seg_cell(net, seg);
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for (auto it : netlist_cell_types) {
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const char *sep = "";
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fprintf(fout, " %s %s (", it.second.c_str(), it.first.c_str());
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for (auto port : netlist_cells[it.first]) {
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fprintf(fout, "%s\n .%s(%s)", sep, port.first.c_str(), port.second.c_str());
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sep = ",";
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}
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fprintf(fout, "\n );\n");
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}
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fprintf(fout, "endmodule\n");
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return 0;
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}
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