mirror of https://github.com/YosysHQ/icestorm.git
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d06a967590 | |
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bc9e33418d |
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@ -55,9 +55,8 @@ further defined and clarified by project maintainers.
|
|||
Enforcement
|
||||
|
||||
Instances of abusive, harassing, or otherwise unacceptable behavior may be
|
||||
reported by contacting the project team at clifford@clifford.at (and/or
|
||||
cliffordvienna@gmail.com if you think your mail to the other address got
|
||||
stuck in the spam filter). All complaints will be reviewed and investigated and
|
||||
reported by contacting the project team at office@yosyshq.com.
|
||||
All complaints will be reviewed and investigated and
|
||||
will result in a response that is deemed necessary and appropriate to the
|
||||
circumstances. The project team is obligated to maintain confidentiality with
|
||||
regard to the reporter of an incident. Further details of specific enforcement
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||||
|
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Binary file not shown.
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After Width: | Height: | Size: 1.8 MiB |
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@ -13,7 +13,9 @@ author = 'YosysHQ'
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# -- General configuration ---------------------------------------------------
|
||||
# https://www.sphinx-doc.org/en/master/usage/configuration.html#general-configuration
|
||||
|
||||
extensions = ['sphinx_rtd_theme']
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||||
extensions = ['sphinx_rtd_theme',
|
||||
'sphinxcontrib.rsvgconverter'
|
||||
]
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||||
|
||||
templates_path = ['_templates']
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||||
exclude_patterns = []
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||||
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@ -31,3 +33,5 @@ html_theme_options = {
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|||
"titles_only": False
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||||
}
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||||
html_static_path = ['_static']
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||||
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||||
latex_engine = 'lualatex'
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||||
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@ -1,2 +1,3 @@
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sphinx
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||||
sphinx_rtd_theme
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||||
sphinxcontrib-svg2pdfconverter
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||||
|
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@ -1,6 +1,6 @@
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#!/usr/bin/env python3
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||||
#
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||||
# Copyright (C) 2015 Clifford Wolf <clifford@clifford.at>
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||||
# Copyright (C) 2015 Claire Xenia Wolf <claire@clairexen.net>
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||||
#
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||||
# Permission to use, copy, modify, and/or distribute this software for any
|
||||
# purpose with or without fee is hereby granted, provided that the above
|
||||
|
|
@ -1258,21 +1258,21 @@ def pos_follow_net(pos, direction, netname, is_ultra):
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n = sp4h_normalize(netname, "l")
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if n is not None:
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if direction == "l" or is_ultra:
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n = re_sub_cached("_l_", "_r_", n)
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n = re_sub_cached(r"_l_", "_r_", n)
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n = sp4h_normalize(n)
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else:
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n = re_sub_cached("_l_", "_", n)
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n = re_sub_cached("sp4_h_", "span4_horz_", n)
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n = re_sub_cached(r"_l_", "_", n)
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n = re_sub_cached(r"sp4_h_", "span4_horz_", n)
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return n
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if m and direction in ("r", "R"):
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n = sp4h_normalize(netname, "r")
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if n is not None:
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if direction == "r" or is_ultra:
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n = re_sub_cached("_r_", "_l_", n)
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n = re_sub_cached(r"_r_", "_l_", n)
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n = sp4h_normalize(n)
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else:
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n = re_sub_cached("_r_", "_", n)
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n = re_sub_cached("sp4_h_", "span4_horz_", n)
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n = re_sub_cached(r"_r_", "_", n)
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n = re_sub_cached(r"sp4_h_", "span4_horz_", n)
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return n
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m = re_match_cached(r"sp4_v_[tb]_(\d+)$", netname)
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@ -1280,25 +1280,25 @@ def pos_follow_net(pos, direction, netname, is_ultra):
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n = sp4v_normalize(netname, "t")
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if n is not None:
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if is_ultra and direction == "T" and pos in ("l", "r"):
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||||
return re_sub_cached("sp4_v_", "span4_vert_", n)
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return re_sub_cached(r"sp4_v_", "span4_vert_", n)
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elif direction == "t":
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||||
n = re_sub_cached("_t_", "_b_", n)
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n = re_sub_cached(r"_t_", "_b_", n)
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n = sp4v_normalize(n)
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else:
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||||
n = re_sub_cached("_t_", "_", n)
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n = re_sub_cached("sp4_v_", "span4_vert_", n)
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n = re_sub_cached(r"_t_", "_", n)
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||||
n = re_sub_cached(r"sp4_v_", "span4_vert_", n)
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||||
return n
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||||
if m and direction in ("b", "B"):
|
||||
n = sp4v_normalize(netname, "b")
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||||
if n is not None:
|
||||
if is_ultra and direction == "B" and pos in ("l", "r"):
|
||||
return re_sub_cached("sp4_v_", "span4_vert_", n)
|
||||
return re_sub_cached(r"sp4_v_", "span4_vert_", n)
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||||
elif direction == "b":
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||||
n = re_sub_cached("_b_", "_t_", n)
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||||
n = re_sub_cached(r"_b_", "_t_", n)
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||||
n = sp4v_normalize(n)
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||||
else:
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||||
n = re_sub_cached("_b_", "_", n)
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||||
n = re_sub_cached("sp4_v_", "span4_vert_", n)
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||||
n = re_sub_cached(r"_b_", "_", n)
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||||
n = re_sub_cached(r"sp4_v_", "span4_vert_", n)
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||||
return n
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||||
|
||||
m = re_match_cached(r"sp12_h_[lr]_(\d+)$", netname)
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||||
|
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@ -1306,21 +1306,21 @@ def pos_follow_net(pos, direction, netname, is_ultra):
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|||
n = sp12h_normalize(netname, "l")
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||||
if n is not None:
|
||||
if direction == "l" or is_ultra:
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||||
n = re_sub_cached("_l_", "_r_", n)
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||||
n = re_sub_cached(r"_l_", "_r_", n)
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||||
n = sp12h_normalize(n)
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||||
else:
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||||
n = re_sub_cached("_l_", "_", n)
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||||
n = re_sub_cached("sp12_h_", "span12_horz_", n)
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||||
n = re_sub_cached(r"_l_", "_", n)
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||||
n = re_sub_cached(r"sp12_h_", "span12_horz_", n)
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||||
return n
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||||
if m and direction in ("r", "R"):
|
||||
n = sp12h_normalize(netname, "r")
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||||
if n is not None:
|
||||
if direction == "r" or is_ultra:
|
||||
n = re_sub_cached("_r_", "_l_", n)
|
||||
n = re_sub_cached(r"_r_", "_l_", n)
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||||
n = sp12h_normalize(n)
|
||||
else:
|
||||
n = re_sub_cached("_r_", "_", n)
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||||
n = re_sub_cached("sp12_h_", "span12_horz_", n)
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||||
n = re_sub_cached(r"_r_", "_", n)
|
||||
n = re_sub_cached(r"sp12_h_", "span12_horz_", n)
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||||
return n
|
||||
|
||||
m = re_match_cached(r"sp12_v_[tb]_(\d+)$", netname)
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||||
|
|
@ -1328,25 +1328,25 @@ def pos_follow_net(pos, direction, netname, is_ultra):
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|||
n = sp12v_normalize(netname, "t")
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||||
if n is not None:
|
||||
if direction == "t":
|
||||
n = re_sub_cached("_t_", "_b_", n)
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||||
n = re_sub_cached(r"_t_", "_b_", n)
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||||
n = sp12v_normalize(n)
|
||||
elif direction == "T" and pos in ("l", "r"):
|
||||
pass
|
||||
else:
|
||||
n = re_sub_cached("_t_", "_", n)
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||||
n = re_sub_cached("sp12_v_", "span12_vert_", n)
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||||
n = re_sub_cached(r"_t_", "_", n)
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||||
n = re_sub_cached(r"sp12_v_", "span12_vert_", n)
|
||||
return n
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||||
if m and direction in ("b", "B"):
|
||||
n = sp12v_normalize(netname, "b")
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||||
if n is not None:
|
||||
if direction == "b":
|
||||
n = re_sub_cached("_b_", "_t_", n)
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||||
n = re_sub_cached(r"_b_", "_t_", n)
|
||||
n = sp12v_normalize(n)
|
||||
elif direction == "B" and pos in ("l", "r"):
|
||||
pass
|
||||
else:
|
||||
n = re_sub_cached("_b_", "_", n)
|
||||
n = re_sub_cached("sp12_v_", "span12_vert_", n)
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||||
n = re_sub_cached(r"_b_", "_", n)
|
||||
n = re_sub_cached(r"sp12_v_", "span12_vert_", n)
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||||
return n
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||||
|
||||
if (pos in ("l", "r" )) and (not is_ultra):
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||||
|
|
|
|||
|
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@ -1,6 +1,6 @@
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|||
#!/usr/bin/env python3
|
||||
#
|
||||
# Copyright (C) 2015 Clifford Wolf <clifford@clifford.at>
|
||||
# Copyright (C) 2015 Claire Xenia Wolf <claire@clairexen.net>
|
||||
#
|
||||
# Permission to use, copy, modify, and/or distribute this software for any
|
||||
# purpose with or without fee is hereby granted, provided that the above
|
||||
|
|
|
|||
|
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@ -1,6 +1,6 @@
|
|||
#!/usr/bin/env python3
|
||||
#
|
||||
# Copyright (C) 2015 Clifford Wolf <clifford@clifford.at>
|
||||
# Copyright (C) 2015 Claire Xenia Wolf <claire@clairexen.net>
|
||||
#
|
||||
# Permission to use, copy, modify, and/or distribute this software for any
|
||||
# purpose with or without fee is hereby granted, provided that the above
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
#!/usr/bin/env python3
|
||||
#
|
||||
# Copyright (C) 2015 Clifford Wolf <clifford@clifford.at>
|
||||
# Copyright (C) 2015 Claire Xenia Wolf <claire@clairexen.net>
|
||||
#
|
||||
# Permission to use, copy, modify, and/or distribute this software for any
|
||||
# purpose with or without fee is hereby granted, provided that the above
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
#!/usr/bin/env python3
|
||||
#
|
||||
# Copyright (C) 2015 Clifford Wolf <clifford@clifford.at>
|
||||
# Copyright (C) 2015 Claire Xenia Wolf <claire@clairexen.net>
|
||||
#
|
||||
# Permission to use, copy, modify, and/or distribute this software for any
|
||||
# purpose with or without fee is hereby granted, provided that the above
|
||||
|
|
|
|||
|
|
@ -509,7 +509,7 @@ def parse_verilog_bitvector_to_bits(in_str):
|
|||
#replace x with 0
|
||||
in_str = re_sub_cached('[xX]', '0', in_str)
|
||||
|
||||
m = re_match_cached("([0-9]+)'([hdob])([0-9a-fA-F]+)", in_str)
|
||||
m = re_match_cached(r"([0-9]+)'([hdob])([0-9a-fA-F]+)", in_str)
|
||||
if m:
|
||||
num_bits = int(m.group(1))
|
||||
prefix = m.group(2)
|
||||
|
|
@ -879,7 +879,7 @@ class LogicCell:
|
|||
if fields[0] == 'lut' and len(fields) == 2:
|
||||
self.lut_bits = fields[1]
|
||||
elif fields[0] == 'out' and len(fields) >= 3 and fields[1] == '=':
|
||||
m = re_match_cached("([0-9]+)'b([01]+)", fields[2])
|
||||
m = re_match_cached(r"([0-9]+)'b([01]+)", fields[2])
|
||||
if m:
|
||||
lut_bits = parse_verilog_bitvector_to_bits(fields[2])
|
||||
# Verilog 16'bXXXX is MSB first but the bitstream wants LSB.
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
#!/usr/bin/env python3
|
||||
#
|
||||
# Copyright (C) 2015 Clifford Wolf <clifford@clifford.at>
|
||||
# Copyright (C) 2015 Claire Xenia Wolf <claire@clairexen.net>
|
||||
#
|
||||
# Permission to use, copy, modify, and/or distribute this software for any
|
||||
# purpose with or without fee is hereby granted, provided that the above
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
#!/usr/bin/env python3
|
||||
#
|
||||
# Copyright (C) 2015 Clifford Wolf <clifford@clifford.at>
|
||||
# Copyright (C) 2015 Claire Xenia Wolf <claire@clairexen.net>
|
||||
#
|
||||
# Permission to use, copy, modify, and/or distribute this software for any
|
||||
# purpose with or without fee is hereby granted, provided that the above
|
||||
|
|
@ -60,7 +60,7 @@ def get_bit_group(x, y, db):
|
|||
funcs.add("r")
|
||||
elif entry[1] == "buffer":
|
||||
funcs.add("b")
|
||||
elif re_match_cached("LC_", entry[1]):
|
||||
elif re_match_cached(r"LC_", entry[1]):
|
||||
funcs.add("l")
|
||||
elif entry[1] == "NegClk":
|
||||
funcs.add("N")
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
#!/usr/bin/env python3
|
||||
#
|
||||
# Copyright (C) 2015 Clifford Wolf <clifford@clifford.at>
|
||||
# Copyright (C) 2015 Claire Xenia Wolf <claire@clairexen.net>
|
||||
#
|
||||
# Permission to use, copy, modify, and/or distribute this software for any
|
||||
# purpose with or without fee is hereby granted, provided that the above
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
#!/usr/bin/env python3
|
||||
#
|
||||
# Copyright (C) 2015 Clifford Wolf <clifford@clifford.at>
|
||||
# Copyright (C) 2015 Claire Xenia Wolf <claire@clairexen.net>
|
||||
#
|
||||
# Permission to use, copy, modify, and/or distribute this software for any
|
||||
# purpose with or without fee is hereby granted, provided that the above
|
||||
|
|
@ -94,7 +94,7 @@ for o, a in opts:
|
|||
elif o in ("-p", "-P"):
|
||||
with open(a, "r") as f:
|
||||
for line in f:
|
||||
if o == "-P" and not re_search_cached(" # ICE_(GB_)?IO", line):
|
||||
if o == "-P" and not re_search_cached(r" # ICE_(GB_)?IO", line):
|
||||
continue
|
||||
line = re_sub_cached(r"#.*", "", line.strip()).split()
|
||||
if "--warn-no-port" in line:
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
//
|
||||
// Copyright (C) 2016 Clifford Wolf <clifford@clifford.at>
|
||||
// Copyright (C) 2016 Claire Xenia Wolf <claire@clairexen.net>
|
||||
// Copyright (C) 2023 Sylvain Munaut <tnt@246tNt.com>
|
||||
//
|
||||
// Permission to use, copy, modify, and/or distribute this software for any
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
//
|
||||
// Copyright (C) 2015 Clifford Wolf <clifford@clifford.at>
|
||||
// Copyright (C) 2015 Claire Xenia Wolf <claire@clairexen.net>
|
||||
//
|
||||
// Based on a reference implementation provided by Mathias Lasser
|
||||
//
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
//
|
||||
// Copyright (C) 2015 Clifford Wolf <clifford@clifford.at>
|
||||
// Copyright (C) 2015 Claire Xenia Wolf <claire@clairexen.net>
|
||||
//
|
||||
// Permission to use, copy, modify, and/or distribute this software for any
|
||||
// purpose with or without fee is hereby granted, provided that the above
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* iceprog -- simple programming tool for FTDI-based Lattice iCE programmers
|
||||
*
|
||||
* Copyright (C) 2015 Clifford Wolf <clifford@clifford.at>
|
||||
* Copyright (C) 2015 Claire Xenia Wolf <claire@clairexen.net>
|
||||
* Copyright (C) 2018 Piotr Esden-Tempski <piotr@esden.net>
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for any
|
||||
|
|
@ -549,14 +549,14 @@ static void help(const char *progname)
|
|||
fprintf(stderr, " programming the flash chip and one zero ohm resistor must be desoldered\n");
|
||||
fprintf(stderr, " and the FT2232H SI pin must be connected to the iCE SPI_SI pin, as shown\n");
|
||||
fprintf(stderr, " in this picture:\n");
|
||||
fprintf(stderr, " http://www.clifford.at/gallery/2014-elektronik/IMG_20141115_183838\n");
|
||||
fprintf(stderr, " https://github.com/yosyshq/icestorm/blob/master/docs/source/_static/images/icestick.jpg\n");
|
||||
fprintf(stderr, "\n");
|
||||
fprintf(stderr, "Notes for the iCE40-HX8K Breakout Board:\n");
|
||||
fprintf(stderr, " Make sure that the jumper settings on the board match the selected\n");
|
||||
fprintf(stderr, " mode (SRAM or FLASH). See the iCE40-HX8K user manual for details.\n");
|
||||
fprintf(stderr, "\n");
|
||||
fprintf(stderr, "If you have a bug report, please file an issue on github:\n");
|
||||
fprintf(stderr, " https://github.com/cliffordwolf/icestorm/issues\n");
|
||||
fprintf(stderr, " https://github.com/YosysHQ/icestorm/issues\n");
|
||||
}
|
||||
|
||||
int main(int argc, char **argv)
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* iceprog -- simple programming tool for FTDI-based Lattice iCE programmers
|
||||
*
|
||||
* Copyright (C) 2015 Clifford Wolf <clifford@clifford.at>
|
||||
* Copyright (C) 2015 Claire Xenia Wolf <claire@clairexen.net>
|
||||
* Copyright (C) 2018 Piotr Esden-Tempski <piotr@esden.net>
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for any
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* iceprog -- simple programming tool for FTDI-based Lattice iCE programmers
|
||||
*
|
||||
* Copyright (C) 2015 Clifford Wolf <clifford@clifford.at>
|
||||
* Copyright (C) 2015 Claire Xenia Wolf <claire@clairexen.net>
|
||||
* Copyright (C) 2018 Piotr Esden-Tempski <piotr@esden.net>
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for any
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
//
|
||||
// Copyright (C) 2015 Clifford Wolf <clifford@clifford.at>
|
||||
// Copyright (C) 2015 Claire Xenia Wolf <claire@clairexen.net>
|
||||
//
|
||||
// Permission to use, copy, modify, and/or distribute this software for any
|
||||
// purpose with or without fee is hereby granted, provided that the above
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* yosys -- Yosys Open SYnthesis Suite
|
||||
*
|
||||
* Copyright (C) 2012 Clifford Wolf <clifford@clifford.at>
|
||||
* Copyright (C) 2012 Claire Xenia Wolf <claire@clairexen.net>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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Reference in New Issue