Commit Graph

489 Commits

Author SHA1 Message Date
David Shah ed61efa023 Merge branch 'master' into up5k 2017-11-18 18:03:20 +00:00
Clifford Wolf b8832a2cda Merge commit '05440e4' 2017-11-18 16:53:19 +01:00
David Shah b059f37b50 Add all cf_bits and pullup strength notes 2017-11-18 15:38:14 +00:00
Clifford Wolf 95bdd0a29b Update udev rule in docs/index.html 2017-11-18 16:31:21 +01:00
David Shah 8fc49d0756 Corrections and changes to UltraPlus doc 2017-11-18 11:40:52 +00:00
David Shah 6fcccb0fa8 Merge branch 'master' into up5k 2017-11-18 10:53:29 +00:00
David Shah 614c60df25 Add missing 5k BRAM bits 2017-11-17 18:29:14 +00:00
David Shah 902e972cc5 Make 5k db as a default target 2017-11-17 15:27:07 +00:00
David Shah 095b8404e8 Remove non-existing routing resources (5k) 2017-11-17 15:10:04 +00:00
David Shah afcc653b78 Add support for UltraPlus SPRAM 2017-11-17 15:10:04 +00:00
David Shah c71db50a27 Add UltraPlus LED driver support and demo 2017-11-17 15:09:58 +00:00
David Shah e7d22f2277 UltraPlus Internal Oscillator support 2017-11-17 15:09:58 +00:00
David Shah cdf6883639 UltraPlus DSPs working 2017-11-17 15:09:51 +00:00
David Shah 8f9eba3fe3 Add new tile types and MAC16s to chipdb 2017-11-17 15:09:41 +00:00
David Shah c9160c77dc Tidy up some of the icebox changes 2017-11-17 15:09:40 +00:00
David Shah 25ad7a24b9 5k RGB driver reverse engineered 2017-11-17 15:09:40 +00:00
David Shah 2f962ac92e Fix 5k corner routing, and reverse engineer SPRAM 2017-11-17 15:09:17 +00:00
David Shah 64e3c1a9cd Figure out DSP config bits for all locs 2017-11-17 15:08:58 +00:00
David Shah 88eebff7db Start UltraPlus DSP documentation 2017-11-17 15:08:47 +00:00
David Shah 94aa596cb1 Trace DSP routing 2017-11-17 15:08:25 +00:00
David Shah 96b527bfef Create icefuzz scripts for DSP and 5k 2017-11-17 15:07:52 +00:00
Robert Ou 05440e4d62 Fix up build system to work with emscripten 2017-11-15 03:13:35 -08:00
Clifford Wolf 539cf999dd
Merge pull request #107 from daveshah1/ultraplus_experiments
Basic support for UltraPlus 5k
2017-11-14 19:08:47 +01:00
David Shah 629621642f Preparations for DSP and IpCon fuzzing 2017-11-08 16:05:42 +00:00
David Shah c69b87d593 Fix 5k gbin configuration 2017-11-06 16:14:41 +00:00
David Shah 5e7924c8c1 Add more 5k RAM bits to db 2017-11-05 19:14:42 +00:00
David Shah 1c56e56032 Fix 5k padin_glb_netwk bits 2017-11-05 16:32:58 +00:00
David Shah 1d149133b5 5k-related fixes to icepack 2017-11-05 16:17:57 +00:00
David Shah 7e58f47639 Add 5k colbuf fuzzing scripts 2017-11-02 11:48:29 +00:00
David Shah e75e9171ac Fix global network 1 padin bit 2017-11-01 20:16:33 +00:00
David Shah 3a6b05c6aa Work on 5k global buffer pads 2017-11-01 15:37:51 +00:00
David Shah 3bd601c0cd Fix BRAM initialisation on 5k parts 2017-11-01 12:02:44 +00:00
David Shah c0b6c1b98d Merge branch 'master' into ultraplus_experiments 2017-11-01 09:49:33 +00:00
David Shah 6f76600881 Add missing up5k global buffer pads 2017-10-31 19:45:27 +00:00
Clifford Wolf 3ba18d0017 Merge branch 'daveshah1-u5k' 2017-10-31 18:24:01 +01:00
David Shah 2ad5600b47 Working up5k PLL support 2017-10-31 15:11:40 +00:00
David Shah 938bf7b65e Fix loading 5k asc files 2017-10-31 14:21:08 +00:00
David Shah 3059607dd7 PLL configuration fuzzing script 2017-10-30 11:32:17 +00:00
David Shah b78417ee78 Add new 5k IO config bits to database 2017-10-29 17:07:18 +00:00
David Shah e9e9d0e9cb Share glb_netwk data between 5k and 8k parts 2017-10-29 16:14:15 +00:00
David Shah d5b610f0e8 Fix global network data for up5k 2017-10-25 16:20:28 +01:00
David Shah 42325a4774 Fix colbuf db for up5k 2017-10-25 14:49:33 +01:00
David Shah 2a7c32e49a Add ColBufCtrl bits to database for 5k parts 2017-10-25 10:50:36 +01:00
David Shah 6e80f13b56 Add CarryInSet bit to DB 2017-10-24 19:38:35 +01:00
David Shah 81e0d3c361 Add some verilog tests for analysing up5k features 2017-10-23 17:48:22 +01:00
David Shah bf21b64498 Fix IeRen database for up5k 2017-10-23 11:30:23 +01:00
David Shah 5afdeee0e0 Swap IEREN for pin 26 to get example working, other inputs still need fixing 2017-10-21 20:16:10 +01:00
David Shah 88f91de113 Basic example, outputs work but inputs don't 2017-10-21 19:14:06 +01:00
David Shah ec419b4206 Fix RAM tile location in icebox.py 2017-10-21 18:30:14 +01:00
David Shah 29593ed2cb Fix icebox to generate a working chipdb 2017-10-21 18:22:00 +01:00